SparcTargetMachine.cpp revision 0cf0c3746995e8b95fc055cdf8e7210200cb942d 
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "SparcV8TargetMachine.h"
14#include "SparcV8.h"
15#include "llvm/Module.h"
16#include "llvm/PassManager.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/Passes.h"
19#include "llvm/Target/TargetOptions.h"
20#include "llvm/Target/TargetMachineRegistry.h"
21#include "llvm/Transforms/Scalar.h"
22#include <iostream>
23using namespace llvm;
24
25namespace {
26  // Register the target.
27  RegisterTarget<SparcV8TargetMachine> X("sparcv8","  SPARC V8 (experimental)");
28}
29
30/// SparcV8TargetMachine ctor - Create an ILP32 architecture model
31///
32SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
33                                           IntrinsicLowering *IL)
34  : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
35    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
36}
37
38/// addPassesToEmitAssembly - Add passes to the specified pass manager
39/// to implement a static compiler for this target.
40///
41bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
42					       std::ostream &Out) {
43  // FIXME: Implement efficient support for garbage collection intrinsics.
44  PM.add(createLowerGCPass());
45
46  // Replace malloc and free instructions with library calls.
47  PM.add(createLowerAllocationsPass());
48
49  // FIXME: implement the select instruction in the instruction selector.
50  PM.add(createLowerSelectPass());
51
52  // FIXME: implement the switch instruction in the instruction selector.
53  PM.add(createLowerSwitchPass());
54
55  // FIXME: implement the invoke/unwind instructions!
56  PM.add(createLowerInvokePass());
57
58  PM.add(createLowerConstantExpressionsPass());
59
60  // Make sure that no unreachable blocks are instruction selected.
61  PM.add(createUnreachableBlockEliminationPass());
62
63  PM.add(createSparcV8SimpleInstructionSelector(*this));
64
65  // Print machine instructions as they were initially generated.
66  if (PrintMachineCode)
67    PM.add(createMachineFunctionPrinterPass(&std::cerr));
68
69  PM.add(createRegisterAllocator());
70  PM.add(createPrologEpilogCodeInserter());
71
72  // Print machine instructions after register allocation and prolog/epilog
73  // insertion.
74  if (PrintMachineCode)
75    PM.add(createMachineFunctionPrinterPass(&std::cerr));
76
77  PM.add(createSparcV8DelaySlotFillerPass(*this));
78
79  // Print machine instructions after filling delay slots.
80  if (PrintMachineCode)
81    PM.add(createMachineFunctionPrinterPass(&std::cerr));
82
83  // Output assembly language.
84  PM.add(createSparcV8CodePrinterPass(Out, *this));
85
86  // Delete the MachineInstrs we generated, since they're no longer needed.
87  PM.add(createMachineCodeDeleter());
88  return false;
89}
90
91/// addPassesToJITCompile - Add passes to the specified pass manager to
92/// implement a fast dynamic compiler for this target.
93///
94void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
95  // FIXME: Implement efficient support for garbage collection intrinsics.
96  PM.add(createLowerGCPass());
97
98  // Replace malloc and free instructions with library calls.
99  PM.add(createLowerAllocationsPass());
100
101  // FIXME: implement the select instruction in the instruction selector.
102  PM.add(createLowerSelectPass());
103
104  // FIXME: implement the switch instruction in the instruction selector.
105  PM.add(createLowerSwitchPass());
106
107  // FIXME: implement the invoke/unwind instructions!
108  PM.add(createLowerInvokePass());
109
110  PM.add(createLowerConstantExpressionsPass());
111
112  // Make sure that no unreachable blocks are instruction selected.
113  PM.add(createUnreachableBlockEliminationPass());
114
115  PM.add(createSparcV8SimpleInstructionSelector(TM));
116
117  // Print machine instructions as they were initially generated.
118  if (PrintMachineCode)
119    PM.add(createMachineFunctionPrinterPass(&std::cerr));
120
121  PM.add(createRegisterAllocator());
122  PM.add(createPrologEpilogCodeInserter());
123
124  // Print machine instructions after register allocation and prolog/epilog
125  // insertion.
126  if (PrintMachineCode)
127    PM.add(createMachineFunctionPrinterPass(&std::cerr));
128
129  PM.add(createSparcV8DelaySlotFillerPass(TM));
130
131  // Print machine instructions after filling delay slots.
132  if (PrintMachineCode)
133    PM.add(createMachineFunctionPrinterPass(&std::cerr));
134}
135