SparcTargetMachine.cpp revision 56c5d7369bc06aa7555cc5436aeef4f3ae565fa4
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcV8TargetMachine.h" 14#include "SparcV8.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include <iostream> 24using namespace llvm; 25 26namespace { 27 // Register the target. 28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 29} 30 31/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 32/// 33SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 34 IntrinsicLowering *IL) 35 : TargetMachine("SparcV8", IL, false, 4, 4), 36 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) { 37} 38 39unsigned SparcV8TargetMachine::getJITMatchQuality() { 40 return 0; // No JIT yet. 41} 42 43unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 44 if (M.getEndianness() == Module::BigEndian && 45 M.getPointerSize() == Module::Pointer32) 46#ifdef __sparc__ 47 return 20; // BE/32 ==> Prefer sparcv8 on sparc 48#else 49 return 5; // BE/32 ==> Prefer ppc elsewhere 50#endif 51 else if (M.getEndianness() != Module::AnyEndianness || 52 M.getPointerSize() != Module::AnyPointerSize) 53 return 0; // Match for some other target 54 55 return getJITMatchQuality()/2; 56} 57 58/// addPassesToEmitAssembly - Add passes to the specified pass manager 59/// to implement a static compiler for this target. 60/// 61bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM, 62 std::ostream &Out) { 63 // FIXME: Implement efficient support for garbage collection intrinsics. 64 PM.add(createLowerGCPass()); 65 66 // Replace malloc and free instructions with library calls. 67 PM.add(createLowerAllocationsPass()); 68 69 // FIXME: implement the switch instruction in the instruction selector. 70 PM.add(createLowerSwitchPass()); 71 72 // FIXME: implement the invoke/unwind instructions! 73 PM.add(createLowerInvokePass()); 74 75 PM.add(createLowerConstantExpressionsPass()); 76 77 // Make sure that no unreachable blocks are instruction selected. 78 PM.add(createUnreachableBlockEliminationPass()); 79 80 // FIXME: implement the select instruction in the instruction selector. 81 PM.add(createLowerSelectPass()); 82 83 // Print LLVM code input to instruction selector: 84 if (PrintMachineCode) 85 PM.add(new PrintModulePass()); 86 87 PM.add(createSparcV8SimpleInstructionSelector(*this)); 88 89 // Print machine instructions as they were initially generated. 90 if (PrintMachineCode) 91 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 92 93 PM.add(createRegisterAllocator()); 94 PM.add(createPrologEpilogCodeInserter()); 95 96 // Print machine instructions after register allocation and prolog/epilog 97 // insertion. 98 if (PrintMachineCode) 99 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 100 101 PM.add(createSparcV8FPMoverPass(*this)); 102 PM.add(createSparcV8DelaySlotFillerPass(*this)); 103 104 // Print machine instructions after filling delay slots. 105 if (PrintMachineCode) 106 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 107 108 // Output assembly language. 109 PM.add(createSparcV8CodePrinterPass(Out, *this)); 110 111 // Delete the MachineInstrs we generated, since they're no longer needed. 112 PM.add(createMachineCodeDeleter()); 113 return false; 114} 115 116/// addPassesToJITCompile - Add passes to the specified pass manager to 117/// implement a fast dynamic compiler for this target. 118/// 119void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 120 // FIXME: Implement efficient support for garbage collection intrinsics. 121 PM.add(createLowerGCPass()); 122 123 // Replace malloc and free instructions with library calls. 124 PM.add(createLowerAllocationsPass()); 125 126 // FIXME: implement the switch instruction in the instruction selector. 127 PM.add(createLowerSwitchPass()); 128 129 // FIXME: implement the invoke/unwind instructions! 130 PM.add(createLowerInvokePass()); 131 132 PM.add(createLowerConstantExpressionsPass()); 133 134 // Make sure that no unreachable blocks are instruction selected. 135 PM.add(createUnreachableBlockEliminationPass()); 136 137 // FIXME: implement the select instruction in the instruction selector. 138 PM.add(createLowerSelectPass()); 139 140 PM.add(createSparcV8SimpleInstructionSelector(TM)); 141 142 // Print machine instructions as they were initially generated. 143 if (PrintMachineCode) 144 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 145 146 PM.add(createRegisterAllocator()); 147 PM.add(createPrologEpilogCodeInserter()); 148 149 // Print machine instructions after register allocation and prolog/epilog 150 // insertion. 151 if (PrintMachineCode) 152 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 153 154 PM.add(createSparcV8FPMoverPass(TM)); 155 PM.add(createSparcV8DelaySlotFillerPass(TM)); 156 157 // Print machine instructions after filling delay slots. 158 if (PrintMachineCode) 159 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 160} 161