SparcTargetMachine.cpp revision 72fe0af68fd6cd0d38f1a8710f0f6768c0684b60
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcV8TargetMachine.h" 14#include "SparcV8.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include <iostream> 24using namespace llvm; 25 26namespace { 27 // Register the target. 28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 29} 30 31/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 32/// 33SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 34 IntrinsicLowering *IL, 35 const std::string &FS) 36 : TargetMachine("SparcV8", IL, false, 4, 4), 37 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) { 38} 39 40unsigned SparcV8TargetMachine::getJITMatchQuality() { 41 return 0; // No JIT yet. 42} 43 44unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 45 std::string TT = M.getTargetTriple(); 46 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 47 return 20; 48 49 if (M.getEndianness() == Module::BigEndian && 50 M.getPointerSize() == Module::Pointer32) 51#ifdef __sparc__ 52 return 20; // BE/32 ==> Prefer sparcv8 on sparc 53#else 54 return 5; // BE/32 ==> Prefer ppc elsewhere 55#endif 56 else if (M.getEndianness() != Module::AnyEndianness || 57 M.getPointerSize() != Module::AnyPointerSize) 58 return 0; // Match for some other target 59 60 return getJITMatchQuality()/2; 61} 62 63/// addPassesToEmitFile - Add passes to the specified pass manager 64/// to implement a static compiler for this target. 65/// 66bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM, 67 std::ostream &Out, 68 CodeGenFileType FileType) { 69 if (FileType != TargetMachine::AssemblyFile) return true; 70 71 // FIXME: Implement efficient support for garbage collection intrinsics. 72 PM.add(createLowerGCPass()); 73 74 // Replace malloc and free instructions with library calls. 75 PM.add(createLowerAllocationsPass()); 76 77 // FIXME: implement the switch instruction in the instruction selector. 78 PM.add(createLowerSwitchPass()); 79 80 // FIXME: implement the invoke/unwind instructions! 81 PM.add(createLowerInvokePass()); 82 83 // Make sure that no unreachable blocks are instruction selected. 84 PM.add(createUnreachableBlockEliminationPass()); 85 86 // FIXME: implement the select instruction in the instruction selector. 87 PM.add(createLowerSelectPass()); 88 89 // Print LLVM code input to instruction selector: 90 if (PrintMachineCode) 91 PM.add(new PrintFunctionPass()); 92 93 PM.add(createSparcV8SimpleInstructionSelector(*this)); 94 95 // Print machine instructions as they were initially generated. 96 if (PrintMachineCode) 97 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 98 99 PM.add(createRegisterAllocator()); 100 PM.add(createPrologEpilogCodeInserter()); 101 102 // Print machine instructions after register allocation and prolog/epilog 103 // insertion. 104 if (PrintMachineCode) 105 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 106 107 PM.add(createSparcV8FPMoverPass(*this)); 108 PM.add(createSparcV8DelaySlotFillerPass(*this)); 109 110 // Print machine instructions after filling delay slots. 111 if (PrintMachineCode) 112 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 113 114 // Output assembly language. 115 PM.add(createSparcV8CodePrinterPass(Out, *this)); 116 117 // Delete the MachineInstrs we generated, since they're no longer needed. 118 PM.add(createMachineCodeDeleter()); 119 return false; 120} 121 122/// addPassesToJITCompile - Add passes to the specified pass manager to 123/// implement a fast dynamic compiler for this target. 124/// 125void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 126 // FIXME: Implement efficient support for garbage collection intrinsics. 127 PM.add(createLowerGCPass()); 128 129 // Replace malloc and free instructions with library calls. 130 PM.add(createLowerAllocationsPass()); 131 132 // FIXME: implement the switch instruction in the instruction selector. 133 PM.add(createLowerSwitchPass()); 134 135 // FIXME: implement the invoke/unwind instructions! 136 PM.add(createLowerInvokePass()); 137 138 // Make sure that no unreachable blocks are instruction selected. 139 PM.add(createUnreachableBlockEliminationPass()); 140 141 // FIXME: implement the select instruction in the instruction selector. 142 PM.add(createLowerSelectPass()); 143 144 // Print LLVM code input to instruction selector: 145 if (PrintMachineCode) 146 PM.add(new PrintFunctionPass()); 147 148 PM.add(createSparcV8SimpleInstructionSelector(TM)); 149 150 // Print machine instructions as they were initially generated. 151 if (PrintMachineCode) 152 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 153 154 PM.add(createRegisterAllocator()); 155 PM.add(createPrologEpilogCodeInserter()); 156 157 // Print machine instructions after register allocation and prolog/epilog 158 // insertion. 159 if (PrintMachineCode) 160 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 161 162 PM.add(createSparcV8FPMoverPass(TM)); 163 PM.add(createSparcV8DelaySlotFillerPass(TM)); 164 165 // Print machine instructions after filling delay slots. 166 if (PrintMachineCode) 167 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 168} 169