SparcTargetMachine.cpp revision 7c4ce30ea6a9d0410f306e805403dd224c3df65c 
1//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "SparcTargetMachine.h"
14#include "Sparc.h"
15#include "llvm/PassManager.h"
16#include "llvm/CodeGen/Passes.h"
17#include "llvm/Support/TargetRegistry.h"
18using namespace llvm;
19
20extern "C" void LLVMInitializeSparcTarget() {
21  // Register the target.
22  RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
23  RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
24}
25
26/// SparcTargetMachine ctor - Create an ILP32 architecture model
27///
28SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
29                                       StringRef CPU, StringRef FS,
30                                       const TargetOptions &Options,
31                                       Reloc::Model RM, CodeModel::Model CM,
32                                       CodeGenOpt::Level OL,
33                                       bool is64bit)
34  : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35    Subtarget(TT, CPU, FS, is64bit),
36    DataLayout(Subtarget.getDataLayout()),
37    TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
38    FrameLowering(Subtarget) {
39}
40
41namespace {
42/// Sparc Code Generator Pass Configuration Options.
43class SparcPassConfig : public TargetPassConfig {
44public:
45  SparcPassConfig(SparcTargetMachine *TM, PassManagerBase &PM)
46    : TargetPassConfig(TM, PM) {}
47
48  SparcTargetMachine &getSparcTargetMachine() const {
49    return getTM<SparcTargetMachine>();
50  }
51
52  virtual bool addInstSelector();
53  virtual bool addPreEmitPass();
54};
55} // namespace
56
57TargetPassConfig *SparcTargetMachine::createPassConfig(PassManagerBase &PM) {
58  return new SparcPassConfig(this, PM);
59}
60
61bool SparcPassConfig::addInstSelector() {
62  PM->add(createSparcISelDag(getSparcTargetMachine()));
63  return false;
64}
65
66/// addPreEmitPass - This pass may be implemented by targets that want to run
67/// passes immediately before machine code is emitted.  This should return
68/// true if -print-machineinstrs should print out the code after the passes.
69bool SparcPassConfig::addPreEmitPass(){
70  PM->add(createSparcFPMoverPass(getSparcTargetMachine()));
71  PM->add(createSparcDelaySlotFillerPass(getSparcTargetMachine()));
72  return true;
73}
74
75void SparcV8TargetMachine::anchor() { }
76
77SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
78                                           StringRef TT, StringRef CPU,
79                                           StringRef FS,
80                                           const TargetOptions &Options,
81                                           Reloc::Model RM,
82                                           CodeModel::Model CM,
83                                           CodeGenOpt::Level OL)
84  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
85}
86
87void SparcV9TargetMachine::anchor() { }
88
89SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
90                                           StringRef TT,  StringRef CPU,
91                                           StringRef FS,
92                                           const TargetOptions &Options,
93                                           Reloc::Model RM,
94                                           CodeModel::Model CM,
95                                           CodeGenOpt::Level OL)
96  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
97}
98