SparcTargetMachine.cpp revision 843ee2e6a46b2b2d74a84c2eea68dec35cb359cc 
1//===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "Sparc.h"
14#include "SparcTargetMachine.h"
15#include "llvm/PassManager.h"
16#include "llvm/CodeGen/Passes.h"
17#include "llvm/Support/TargetRegistry.h"
18using namespace llvm;
19
20extern "C" void LLVMInitializeSparcTarget() {
21  // Register the target.
22  RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
23  RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
24}
25
26/// SparcTargetMachine ctor - Create an ILP32 architecture model
27///
28SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
29                                       StringRef CPU, StringRef FS,
30                                       const TargetOptions &Options,
31                                       Reloc::Model RM, CodeModel::Model CM,
32                                       CodeGenOpt::Level OL,
33                                       bool is64bit)
34  : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35    Subtarget(TT, CPU, FS, is64bit),
36    DataLayout(Subtarget.getDataLayout()),
37    TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
38    FrameLowering(Subtarget) {
39}
40
41namespace {
42/// Sparc Code Generator Pass Configuration Options.
43class SparcPassConfig : public TargetPassConfig {
44public:
45  SparcPassConfig(SparcTargetMachine *TM, PassManagerBase &PM,
46                  bool DisableVerifyFlag)
47    : TargetPassConfig(TM, PM, DisableVerifyFlag) {}
48
49  SparcTargetMachine &getSparcTargetMachine() const {
50    return getTM<SparcTargetMachine>();
51  }
52
53  virtual bool addInstSelector();
54  virtual bool addPreEmitPass();
55};
56} // namespace
57
58TargetPassConfig *SparcTargetMachine::createPassConfig(PassManagerBase &PM,
59                                                       bool DisableVerify) {
60  return new SparcPassConfig(this, PM, DisableVerify);
61}
62
63bool SparcPassConfig::addInstSelector() {
64  PM.add(createSparcISelDag(getSparcTargetMachine()));
65  return false;
66}
67
68/// addPreEmitPass - This pass may be implemented by targets that want to run
69/// passes immediately before machine code is emitted.  This should return
70/// true if -print-machineinstrs should print out the code after the passes.
71bool SparcPassConfig::addPreEmitPass(){
72  PM.add(createSparcFPMoverPass(getSparcTargetMachine()));
73  PM.add(createSparcDelaySlotFillerPass(getSparcTargetMachine()));
74  return true;
75}
76
77void SparcV8TargetMachine::anchor() { }
78
79SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
80                                           StringRef TT, StringRef CPU,
81                                           StringRef FS,
82                                           const TargetOptions &Options,
83                                           Reloc::Model RM,
84                                           CodeModel::Model CM,
85                                           CodeGenOpt::Level OL)
86  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
87}
88
89void SparcV9TargetMachine::anchor() { }
90
91SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
92                                           StringRef TT,  StringRef CPU,
93                                           StringRef FS,
94                                           const TargetOptions &Options,
95                                           Reloc::Model RM,
96                                           CodeModel::Model CM,
97                                           CodeGenOpt::Level OL)
98  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
99}
100