SparcTargetMachine.cpp revision ce8eb0c16b7197eaa886f90c1ef9ab9bbf1957c4
1//===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "SparcV8TargetMachine.h" 14#include "SparcV8.h" 15#include "llvm/Assembly/PrintModulePass.h" 16#include "llvm/Module.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Target/TargetMachineRegistry.h" 22#include "llvm/Transforms/Scalar.h" 23#include <iostream> 24using namespace llvm; 25 26namespace { 27 // Register the target. 28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)"); 29} 30 31/// SparcV8TargetMachine ctor - Create an ILP32 architecture model 32/// 33SparcV8TargetMachine::SparcV8TargetMachine(const Module &M, 34 IntrinsicLowering *IL, 35 const std::string &FS) 36 : TargetMachine("SparcV8", IL, false, 4, 4), 37 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) { 38} 39 40unsigned SparcV8TargetMachine::getJITMatchQuality() { 41 return 0; // No JIT yet. 42} 43 44unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) { 45 std::string TT = M.getTargetTriple(); 46 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-") 47 return 20; 48 49 if (M.getEndianness() == Module::BigEndian && 50 M.getPointerSize() == Module::Pointer32) 51#ifdef __sparc__ 52 return 20; // BE/32 ==> Prefer sparcv8 on sparc 53#else 54 return 5; // BE/32 ==> Prefer ppc elsewhere 55#endif 56 else if (M.getEndianness() != Module::AnyEndianness || 57 M.getPointerSize() != Module::AnyPointerSize) 58 return 0; // Match for some other target 59 60 return getJITMatchQuality()/2; 61} 62 63/// addPassesToEmitFile - Add passes to the specified pass manager 64/// to implement a static compiler for this target. 65/// 66bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM, 67 std::ostream &Out, 68 CodeGenFileType FileType, 69 bool Fast) { 70 if (FileType != TargetMachine::AssemblyFile) return true; 71 72 // FIXME: Implement efficient support for garbage collection intrinsics. 73 PM.add(createLowerGCPass()); 74 75 // Replace malloc and free instructions with library calls. 76 PM.add(createLowerAllocationsPass()); 77 78 // FIXME: implement the switch instruction in the instruction selector. 79 PM.add(createLowerSwitchPass()); 80 81 // FIXME: implement the invoke/unwind instructions! 82 PM.add(createLowerInvokePass()); 83 84 // Make sure that no unreachable blocks are instruction selected. 85 PM.add(createUnreachableBlockEliminationPass()); 86 87 // FIXME: implement the select instruction in the instruction selector. 88 PM.add(createLowerSelectPass()); 89 90 // Print LLVM code input to instruction selector: 91 if (PrintMachineCode) 92 PM.add(new PrintFunctionPass()); 93 94 PM.add(createSparcV8SimpleInstructionSelector(*this)); 95 96 // Print machine instructions as they were initially generated. 97 if (PrintMachineCode) 98 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 99 100 PM.add(createRegisterAllocator()); 101 PM.add(createPrologEpilogCodeInserter()); 102 103 // Print machine instructions after register allocation and prolog/epilog 104 // insertion. 105 if (PrintMachineCode) 106 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 107 108 PM.add(createSparcV8FPMoverPass(*this)); 109 PM.add(createSparcV8DelaySlotFillerPass(*this)); 110 111 // Print machine instructions after filling delay slots. 112 if (PrintMachineCode) 113 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 114 115 // Output assembly language. 116 PM.add(createSparcV8CodePrinterPass(Out, *this)); 117 118 // Delete the MachineInstrs we generated, since they're no longer needed. 119 PM.add(createMachineCodeDeleter()); 120 return false; 121} 122 123/// addPassesToJITCompile - Add passes to the specified pass manager to 124/// implement a fast dynamic compiler for this target. 125/// 126void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 127 // FIXME: Implement efficient support for garbage collection intrinsics. 128 PM.add(createLowerGCPass()); 129 130 // Replace malloc and free instructions with library calls. 131 PM.add(createLowerAllocationsPass()); 132 133 // FIXME: implement the switch instruction in the instruction selector. 134 PM.add(createLowerSwitchPass()); 135 136 // FIXME: implement the invoke/unwind instructions! 137 PM.add(createLowerInvokePass()); 138 139 // Make sure that no unreachable blocks are instruction selected. 140 PM.add(createUnreachableBlockEliminationPass()); 141 142 // FIXME: implement the select instruction in the instruction selector. 143 PM.add(createLowerSelectPass()); 144 145 // Print LLVM code input to instruction selector: 146 if (PrintMachineCode) 147 PM.add(new PrintFunctionPass()); 148 149 PM.add(createSparcV8SimpleInstructionSelector(TM)); 150 151 // Print machine instructions as they were initially generated. 152 if (PrintMachineCode) 153 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 154 155 PM.add(createRegisterAllocator()); 156 PM.add(createPrologEpilogCodeInserter()); 157 158 // Print machine instructions after register allocation and prolog/epilog 159 // insertion. 160 if (PrintMachineCode) 161 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 162 163 PM.add(createSparcV8FPMoverPass(TM)); 164 PM.add(createSparcV8DelaySlotFillerPass(TM)); 165 166 // Print machine instructions after filling delay slots. 167 if (PrintMachineCode) 168 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 169} 170