SparcTargetMachine.h revision 38aceb871478893bfa87f94c2cb3a344a4c8c2df 
1//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the Sparc specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef SPARCTARGETMACHINE_H
15#define SPARCTARGETMACHINE_H
16
17#include "SparcFrameLowering.h"
18#include "SparcISelLowering.h"
19#include "SparcInstrInfo.h"
20#include "SparcJITInfo.h"
21#include "SparcSelectionDAGInfo.h"
22#include "SparcSubtarget.h"
23#include "llvm/IR/DataLayout.h"
24#include "llvm/Target/TargetFrameLowering.h"
25#include "llvm/Target/TargetMachine.h"
26
27namespace llvm {
28
29class SparcTargetMachine : public LLVMTargetMachine {
30  SparcSubtarget Subtarget;
31  const DataLayout DL;       // Calculates type size & alignment
32  SparcInstrInfo InstrInfo;
33  SparcTargetLowering TLInfo;
34  SparcSelectionDAGInfo TSInfo;
35  SparcFrameLowering FrameLowering;
36  SparcJITInfo JITInfo;
37public:
38  SparcTargetMachine(const Target &T, StringRef TT,
39                     StringRef CPU, StringRef FS, const TargetOptions &Options,
40                     Reloc::Model RM, CodeModel::Model CM,
41                     CodeGenOpt::Level OL, bool is64bit);
42
43  virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
44  virtual const TargetFrameLowering  *getFrameLowering() const {
45    return &FrameLowering;
46  }
47  virtual const SparcSubtarget   *getSubtargetImpl() const{ return &Subtarget; }
48  virtual const SparcRegisterInfo *getRegisterInfo() const {
49    return &InstrInfo.getRegisterInfo();
50  }
51  virtual const SparcTargetLowering* getTargetLowering() const {
52    return &TLInfo;
53  }
54  virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const {
55    return &TSInfo;
56  }
57  virtual SparcJITInfo *getJITInfo() {
58    return &JITInfo;
59  }
60  virtual const DataLayout       *getDataLayout() const { return &DL; }
61
62  // Pass Pipeline Configuration
63  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
64  virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
65};
66
67/// SparcV8TargetMachine - Sparc 32-bit target machine
68///
69class SparcV8TargetMachine : public SparcTargetMachine {
70  virtual void anchor();
71public:
72  SparcV8TargetMachine(const Target &T, StringRef TT,
73                       StringRef CPU, StringRef FS,
74                       const TargetOptions &Options,
75                       Reloc::Model RM, CodeModel::Model CM,
76                       CodeGenOpt::Level OL);
77};
78
79/// SparcV9TargetMachine - Sparc 64-bit target machine
80///
81class SparcV9TargetMachine : public SparcTargetMachine {
82  virtual void anchor();
83public:
84  SparcV9TargetMachine(const Target &T, StringRef TT,
85                       StringRef CPU, StringRef FS,
86                       const TargetOptions &Options,
87                       Reloc::Model RM, CodeModel::Model CM,
88                       CodeGenOpt::Level OL);
89};
90
91} // end namespace llvm
92
93#endif
94