1//===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "SystemZMCTargetDesc.h"
11#include "InstPrinter/SystemZInstPrinter.h"
12#include "SystemZMCAsmInfo.h"
13#include "llvm/MC/MCCodeGenInfo.h"
14#include "llvm/MC/MCInstrInfo.h"
15#include "llvm/MC/MCStreamer.h"
16#include "llvm/MC/MCSubtargetInfo.h"
17#include "llvm/Support/TargetRegistry.h"
18
19using namespace llvm;
20
21#define GET_INSTRINFO_MC_DESC
22#include "SystemZGenInstrInfo.inc"
23
24#define GET_SUBTARGETINFO_MC_DESC
25#include "SystemZGenSubtargetInfo.inc"
26
27#define GET_REGINFO_MC_DESC
28#include "SystemZGenRegisterInfo.inc"
29
30const unsigned SystemZMC::GR32Regs[16] = {
31  SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L,
32  SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L,
33  SystemZ::R8L, SystemZ::R9L, SystemZ::R10L, SystemZ::R11L,
34  SystemZ::R12L, SystemZ::R13L, SystemZ::R14L, SystemZ::R15L
35};
36
37const unsigned SystemZMC::GRH32Regs[16] = {
38  SystemZ::R0H, SystemZ::R1H, SystemZ::R2H, SystemZ::R3H,
39  SystemZ::R4H, SystemZ::R5H, SystemZ::R6H, SystemZ::R7H,
40  SystemZ::R8H, SystemZ::R9H, SystemZ::R10H, SystemZ::R11H,
41  SystemZ::R12H, SystemZ::R13H, SystemZ::R14H, SystemZ::R15H
42};
43
44const unsigned SystemZMC::GR64Regs[16] = {
45  SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
46  SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D,
47  SystemZ::R8D, SystemZ::R9D, SystemZ::R10D, SystemZ::R11D,
48  SystemZ::R12D, SystemZ::R13D, SystemZ::R14D, SystemZ::R15D
49};
50
51const unsigned SystemZMC::GR128Regs[16] = {
52  SystemZ::R0Q, 0, SystemZ::R2Q, 0,
53  SystemZ::R4Q, 0, SystemZ::R6Q, 0,
54  SystemZ::R8Q, 0, SystemZ::R10Q, 0,
55  SystemZ::R12Q, 0, SystemZ::R14Q, 0
56};
57
58const unsigned SystemZMC::FP32Regs[16] = {
59  SystemZ::F0S, SystemZ::F1S, SystemZ::F2S, SystemZ::F3S,
60  SystemZ::F4S, SystemZ::F5S, SystemZ::F6S, SystemZ::F7S,
61  SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S,
62  SystemZ::F12S, SystemZ::F13S, SystemZ::F14S, SystemZ::F15S
63};
64
65const unsigned SystemZMC::FP64Regs[16] = {
66  SystemZ::F0D, SystemZ::F1D, SystemZ::F2D, SystemZ::F3D,
67  SystemZ::F4D, SystemZ::F5D, SystemZ::F6D, SystemZ::F7D,
68  SystemZ::F8D, SystemZ::F9D, SystemZ::F10D, SystemZ::F11D,
69  SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D
70};
71
72const unsigned SystemZMC::FP128Regs[16] = {
73  SystemZ::F0Q, SystemZ::F1Q, 0, 0,
74  SystemZ::F4Q, SystemZ::F5Q, 0, 0,
75  SystemZ::F8Q, SystemZ::F9Q, 0, 0,
76  SystemZ::F12Q, SystemZ::F13Q, 0, 0
77};
78
79unsigned SystemZMC::getFirstReg(unsigned Reg) {
80  static unsigned Map[SystemZ::NUM_TARGET_REGS];
81  static bool Initialized = false;
82  if (!Initialized) {
83    for (unsigned I = 0; I < 16; ++I) {
84      Map[GR32Regs[I]] = I;
85      Map[GRH32Regs[I]] = I;
86      Map[GR64Regs[I]] = I;
87      Map[GR128Regs[I]] = I;
88      Map[FP32Regs[I]] = I;
89      Map[FP64Regs[I]] = I;
90      Map[FP128Regs[I]] = I;
91    }
92  }
93  assert(Reg < SystemZ::NUM_TARGET_REGS);
94  return Map[Reg];
95}
96
97static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI,
98                                         StringRef TT) {
99  MCAsmInfo *MAI = new SystemZMCAsmInfo(TT);
100  MCCFIInstruction Inst =
101      MCCFIInstruction::createDefCfa(nullptr,
102                                     MRI.getDwarfRegNum(SystemZ::R15D, true),
103                                     SystemZMC::CFAOffsetFromInitialSP);
104  MAI->addInitialFrameState(Inst);
105  return MAI;
106}
107
108static MCInstrInfo *createSystemZMCInstrInfo() {
109  MCInstrInfo *X = new MCInstrInfo();
110  InitSystemZMCInstrInfo(X);
111  return X;
112}
113
114static MCRegisterInfo *createSystemZMCRegisterInfo(StringRef TT) {
115  MCRegisterInfo *X = new MCRegisterInfo();
116  InitSystemZMCRegisterInfo(X, SystemZ::R14D);
117  return X;
118}
119
120static MCSubtargetInfo *createSystemZMCSubtargetInfo(StringRef TT,
121                                                     StringRef CPU,
122                                                     StringRef FS) {
123  MCSubtargetInfo *X = new MCSubtargetInfo();
124  InitSystemZMCSubtargetInfo(X, TT, CPU, FS);
125  return X;
126}
127
128static MCCodeGenInfo *createSystemZMCCodeGenInfo(StringRef TT, Reloc::Model RM,
129                                                 CodeModel::Model CM,
130                                                 CodeGenOpt::Level OL) {
131  MCCodeGenInfo *X = new MCCodeGenInfo();
132
133  // Static code is suitable for use in a dynamic executable; there is no
134  // separate DynamicNoPIC model.
135  if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
136    RM = Reloc::Static;
137
138  // For SystemZ we define the models as follows:
139  //
140  // Small:  BRASL can call any function and will use a stub if necessary.
141  //         Locally-binding symbols will always be in range of LARL.
142  //
143  // Medium: BRASL can call any function and will use a stub if necessary.
144  //         GOT slots and locally-defined text will always be in range
145  //         of LARL, but other symbols might not be.
146  //
147  // Large:  Equivalent to Medium for now.
148  //
149  // Kernel: Equivalent to Medium for now.
150  //
151  // This means that any PIC module smaller than 4GB meets the
152  // requirements of Small, so Small seems like the best default there.
153  //
154  // All symbols bind locally in a non-PIC module, so the choice is less
155  // obvious.  There are two cases:
156  //
157  // - When creating an executable, PLTs and copy relocations allow
158  //   us to treat external symbols as part of the executable.
159  //   Any executable smaller than 4GB meets the requirements of Small,
160  //   so that seems like the best default.
161  //
162  // - When creating JIT code, stubs will be in range of BRASL if the
163  //   image is less than 4GB in size.  GOT entries will likewise be
164  //   in range of LARL.  However, the JIT environment has no equivalent
165  //   of copy relocs, so locally-binding data symbols might not be in
166  //   the range of LARL.  We need the Medium model in that case.
167  if (CM == CodeModel::Default)
168    CM = CodeModel::Small;
169  else if (CM == CodeModel::JITDefault)
170    CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
171  X->InitMCCodeGenInfo(RM, CM, OL);
172  return X;
173}
174
175static MCInstPrinter *createSystemZMCInstPrinter(const Target &T,
176                                                 unsigned SyntaxVariant,
177                                                 const MCAsmInfo &MAI,
178                                                 const MCInstrInfo &MII,
179                                                 const MCRegisterInfo &MRI,
180                                                 const MCSubtargetInfo &STI) {
181  return new SystemZInstPrinter(MAI, MII, MRI);
182}
183
184static MCStreamer *createSystemZMCObjectStreamer(const Target &T, StringRef TT,
185                                                 MCContext &Ctx,
186                                                 MCAsmBackend &MAB,
187                                                 raw_ostream &OS,
188                                                 MCCodeEmitter *Emitter,
189                                                 const MCSubtargetInfo &STI,
190                                                 bool RelaxAll,
191                                                 bool NoExecStack) {
192  return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
193}
194
195extern "C" void LLVMInitializeSystemZTargetMC() {
196  // Register the MCAsmInfo.
197  TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget,
198                                    createSystemZMCAsmInfo);
199
200  // Register the MCCodeGenInfo.
201  TargetRegistry::RegisterMCCodeGenInfo(TheSystemZTarget,
202                                        createSystemZMCCodeGenInfo);
203
204  // Register the MCCodeEmitter.
205  TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget,
206					createSystemZMCCodeEmitter);
207
208  // Register the MCInstrInfo.
209  TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
210                                      createSystemZMCInstrInfo);
211
212  // Register the MCRegisterInfo.
213  TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
214                                    createSystemZMCRegisterInfo);
215
216  // Register the MCSubtargetInfo.
217  TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
218                                          createSystemZMCSubtargetInfo);
219
220  // Register the MCAsmBackend.
221  TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget,
222                                       createSystemZMCAsmBackend);
223
224  // Register the MCInstPrinter.
225  TargetRegistry::RegisterMCInstPrinter(TheSystemZTarget,
226                                        createSystemZMCInstPrinter);
227
228  // Register the MCObjectStreamer;
229  TargetRegistry::RegisterMCObjectStreamer(TheSystemZTarget,
230                                           createSystemZMCObjectStreamer);
231}
232