1//===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "SystemZInstrInfo.h"
11#include "SystemZRegisterInfo.h"
12#include "SystemZSubtarget.h"
13#include "llvm/CodeGen/MachineInstrBuilder.h"
14#include "llvm/CodeGen/MachineRegisterInfo.h"
15#include "llvm/Target/TargetFrameLowering.h"
16
17using namespace llvm;
18
19#define GET_REGINFO_TARGET_DESC
20#include "SystemZGenRegisterInfo.inc"
21
22SystemZRegisterInfo::SystemZRegisterInfo()
23    : SystemZGenRegisterInfo(SystemZ::R14D) {}
24
25const MCPhysReg *
26SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
27  return CSR_SystemZ_SaveList;
28}
29
30const uint32_t *
31SystemZRegisterInfo::getCallPreservedMask(CallingConv::ID CC) const {
32  return CSR_SystemZ_RegMask;
33}
34
35BitVector
36SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
37  BitVector Reserved(getNumRegs());
38  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
39
40  if (TFI->hasFP(MF)) {
41    // R11D is the frame pointer.  Reserve all aliases.
42    Reserved.set(SystemZ::R11D);
43    Reserved.set(SystemZ::R11L);
44    Reserved.set(SystemZ::R11H);
45    Reserved.set(SystemZ::R10Q);
46  }
47
48  // R15D is the stack pointer.  Reserve all aliases.
49  Reserved.set(SystemZ::R15D);
50  Reserved.set(SystemZ::R15L);
51  Reserved.set(SystemZ::R15H);
52  Reserved.set(SystemZ::R14Q);
53  return Reserved;
54}
55
56void
57SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
58                                         int SPAdj, unsigned FIOperandNum,
59                                         RegScavenger *RS) const {
60  assert(SPAdj == 0 && "Outgoing arguments should be part of the frame");
61
62  MachineBasicBlock &MBB = *MI->getParent();
63  MachineFunction &MF = *MBB.getParent();
64  auto *TII =
65      static_cast<const SystemZInstrInfo *>(MF.getTarget().getInstrInfo());
66  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
67  DebugLoc DL = MI->getDebugLoc();
68
69  // Decompose the frame index into a base and offset.
70  int FrameIndex = MI->getOperand(FIOperandNum).getIndex();
71  unsigned BasePtr = getFrameRegister(MF);
72  int64_t Offset = (TFI->getFrameIndexOffset(MF, FrameIndex) +
73                    MI->getOperand(FIOperandNum + 1).getImm());
74
75  // Special handling of dbg_value instructions.
76  if (MI->isDebugValue()) {
77    MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
78    MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
79    return;
80  }
81
82  // See if the offset is in range, or if an equivalent instruction that
83  // accepts the offset exists.
84  unsigned Opcode = MI->getOpcode();
85  unsigned OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
86  if (OpcodeForOffset)
87    MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
88  else {
89    // Create an anchor point that is in range.  Start at 0xffff so that
90    // can use LLILH to load the immediate.
91    int64_t OldOffset = Offset;
92    int64_t Mask = 0xffff;
93    do {
94      Offset = OldOffset & Mask;
95      OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
96      Mask >>= 1;
97      assert(Mask && "One offset must be OK");
98    } while (!OpcodeForOffset);
99
100    unsigned ScratchReg =
101      MF.getRegInfo().createVirtualRegister(&SystemZ::ADDR64BitRegClass);
102    int64_t HighOffset = OldOffset - Offset;
103
104    if (MI->getDesc().TSFlags & SystemZII::HasIndex
105        && MI->getOperand(FIOperandNum + 2).getReg() == 0) {
106      // Load the offset into the scratch register and use it as an index.
107      // The scratch register then dies here.
108      TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
109      MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
110      MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
111                                                        false, false, true);
112    } else {
113      // Load the anchor address into a scratch register.
114      unsigned LAOpcode = TII->getOpcodeForOffset(SystemZ::LA, HighOffset);
115      if (LAOpcode)
116        BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
117          .addReg(BasePtr).addImm(HighOffset).addReg(0);
118      else {
119        // Load the high offset into the scratch register and use it as
120        // an index.
121        TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
122        BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
123          .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
124      }
125
126      // Use the scratch register as the base.  It then dies here.
127      MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg,
128                                                    false, false, true);
129    }
130  }
131  MI->setDesc(TII->get(OpcodeForOffset));
132  MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
133}
134
135unsigned
136SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
137  const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
138  return TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D;
139}
140