X86MCTargetDesc.h revision dce4a407a24b04eebc6a376f8e62b41aaa7b071f 
1//===-- X86MCTargetDesc.h - X86 Target Descriptions -------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides X86 specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86MCTARGETDESC_H
15#define X86MCTARGETDESC_H
16
17#include "llvm/Support/DataTypes.h"
18#include <string>
19
20namespace llvm {
21class MCAsmBackend;
22class MCCodeEmitter;
23class MCContext;
24class MCInstrInfo;
25class MCObjectWriter;
26class MCRegisterInfo;
27class MCSubtargetInfo;
28class MCRelocationInfo;
29class MCStreamer;
30class Target;
31class StringRef;
32class raw_ostream;
33
34extern Target TheX86_32Target, TheX86_64Target;
35
36/// DWARFFlavour - Flavour of dwarf regnumbers
37///
38namespace DWARFFlavour {
39  enum {
40    X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2
41  };
42}
43
44/// N86 namespace - Native X86 register numbers
45///
46namespace N86 {
47  enum {
48    EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
49  };
50}
51
52namespace X86_MC {
53  std::string ParseX86Triple(StringRef TT);
54
55  /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in
56  /// the specified arguments.  If we can't run cpuid on the host, return true.
57  bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX,
58                       unsigned *rEBX, unsigned *rECX, unsigned *rEDX);
59  /// GetCpuIDAndInfoEx - Execute the specified cpuid with subleaf and return
60  /// the 4 values in the specified arguments.  If we can't run cpuid on the
61  /// host, return true.
62  bool GetCpuIDAndInfoEx(unsigned value, unsigned subleaf, unsigned *rEAX,
63                       unsigned *rEBX, unsigned *rECX, unsigned *rEDX);
64
65  void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model);
66
67  unsigned getDwarfRegFlavour(StringRef TT, bool isEH);
68
69  void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI);
70
71  /// createX86MCSubtargetInfo - Create a X86 MCSubtargetInfo instance.
72  /// This is exposed so Asm parser, etc. do not need to go through
73  /// TargetRegistry.
74  MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
75                                            StringRef FS);
76}
77
78MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII,
79                                      const MCRegisterInfo &MRI,
80                                      const MCSubtargetInfo &STI,
81                                      MCContext &Ctx);
82
83MCAsmBackend *createX86_32AsmBackend(const Target &T, const MCRegisterInfo &MRI,
84                                     StringRef TT, StringRef CPU);
85MCAsmBackend *createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI,
86                                     StringRef TT, StringRef CPU);
87
88/// createX86WinCOFFStreamer - Construct an X86 Windows COFF machine code
89/// streamer which will generate PE/COFF format object files.
90///
91/// Takes ownership of \p AB and \p CE.
92MCStreamer *createX86WinCOFFStreamer(MCContext &C, MCAsmBackend &AB,
93                                     MCCodeEmitter *CE, raw_ostream &OS,
94                                     bool RelaxAll);
95
96/// createX86MachObjectWriter - Construct an X86 Mach-O object writer.
97MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS,
98                                          bool Is64Bit,
99                                          uint32_t CPUType,
100                                          uint32_t CPUSubtype);
101
102/// createX86ELFObjectWriter - Construct an X86 ELF object writer.
103MCObjectWriter *createX86ELFObjectWriter(raw_ostream &OS,
104                                         bool IsELF64,
105                                         uint8_t OSABI,
106                                         uint16_t EMachine);
107/// createX86WinCOFFObjectWriter - Construct an X86 Win COFF object writer.
108MCObjectWriter *createX86WinCOFFObjectWriter(raw_ostream &OS, bool Is64Bit);
109
110/// createX86_64MachORelocationInfo - Construct X86-64 Mach-O relocation info.
111MCRelocationInfo *createX86_64MachORelocationInfo(MCContext &Ctx);
112
113/// createX86_64ELFORelocationInfo - Construct X86-64 ELF relocation info.
114MCRelocationInfo *createX86_64ELFRelocationInfo(MCContext &Ctx);
115} // End llvm namespace
116
117
118// Defines symbolic names for X86 registers.  This defines a mapping from
119// register name to register number.
120//
121#define GET_REGINFO_ENUM
122#include "X86GenRegisterInfo.inc"
123
124// Defines symbolic names for the X86 instructions.
125//
126#define GET_INSTRINFO_ENUM
127#include "X86GenInstrInfo.inc"
128
129#define GET_SUBTARGETINFO_ENUM
130#include "X86GenSubtargetInfo.inc"
131
132#endif
133