X86FixupLEAs.cpp revision 2967a804126c6081a18d8b75adf2d9fd5a3c096e
1//===-- X86FixupLEAs.cpp - use or replace LEA instructions -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the pass which will find  instructions  which
11// can be re-written as LEA instructions in order to reduce pipeline
12// delays for some models of the Intel Atom family.
13//
14//===----------------------------------------------------------------------===//
15
16#define DEBUG_TYPE "x86-fixup-LEAs"
17#include "X86.h"
18#include "X86InstrInfo.h"
19#include "X86Subtarget.h"
20#include "llvm/ADT/Statistic.h"
21#include "llvm/CodeGen/LiveVariables.h"
22#include "llvm/CodeGen/MachineFunctionPass.h"
23#include "llvm/CodeGen/MachineInstrBuilder.h"
24#include "llvm/CodeGen/MachineRegisterInfo.h"
25#include "llvm/CodeGen/Passes.h"
26#include "llvm/Support/Debug.h"
27#include "llvm/Support/raw_ostream.h"
28#include "llvm/Target/TargetInstrInfo.h"
29using namespace llvm;
30
31STATISTIC(NumLEAs, "Number of LEA instructions created");
32
33namespace {
34  class FixupLEAPass : public MachineFunctionPass {
35    enum RegUsageState { RU_NotUsed, RU_Write, RU_Read };
36    static char ID;
37    /// \brief Loop over all of the instructions in the basic block
38    /// replacing applicable instructions with LEA instructions,
39    /// where appropriate.
40    bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
41
42    virtual const char *getPassName() const { return "X86 Atom LEA Fixup";}
43
44    /// \brief Given a machine register, look for the instruction
45    /// which writes it in the current basic block. If found,
46    /// try to replace it with an equivalent LEA instruction.
47    /// If replacement succeeds, then also process the the newly created
48    /// instruction.
49    void  seekLEAFixup(MachineOperand& p, MachineBasicBlock::iterator& I,
50                      MachineFunction::iterator MFI);
51
52    /// \brief Given a memory access or LEA instruction
53    /// whose address mode uses a base and/or index register, look for
54    /// an opportunity to replace the instruction which sets the base or index
55    /// register with an equivalent LEA instruction.
56    void processInstruction(MachineBasicBlock::iterator& I,
57                            MachineFunction::iterator MFI);
58
59    /// \brief Determine if an instruction references a machine register
60    /// and, if so, whether it reads or writes the register.
61    RegUsageState usesRegister(MachineOperand& p,
62                               MachineBasicBlock::iterator I);
63
64    /// \brief Step backwards through a basic block, looking
65    /// for an instruction which writes a register within
66    /// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles.
67    MachineBasicBlock::iterator searchBackwards(MachineOperand& p,
68                                                MachineBasicBlock::iterator& I,
69                                                MachineFunction::iterator MFI);
70
71    /// \brief if an instruction can be converted to an
72    /// equivalent LEA, insert the new instruction into the basic block
73    /// and return a pointer to it. Otherwise, return zero.
74    MachineInstr* postRAConvertToLEA(MachineFunction::iterator &MFI,
75                                     MachineBasicBlock::iterator &MBBI) const;
76
77  public:
78    FixupLEAPass() : MachineFunctionPass(ID) {}
79
80    /// \brief Loop over all of the basic blocks,
81    /// replacing instructions by equivalent LEA instructions
82    /// if needed and when possible.
83    virtual bool runOnMachineFunction(MachineFunction &MF);
84
85  private:
86    MachineFunction *MF;
87    const TargetMachine *TM;
88    const TargetInstrInfo *TII; // Machine instruction info.
89
90  };
91  char FixupLEAPass::ID = 0;
92}
93
94MachineInstr *
95FixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI,
96                                 MachineBasicBlock::iterator &MBBI) const {
97  MachineInstr* MI = MBBI;
98  MachineInstr* NewMI;
99  switch (MI->getOpcode()) {
100  case X86::MOV32rr:
101  case X86::MOV64rr: {
102    const MachineOperand& Src = MI->getOperand(1);
103    const MachineOperand& Dest = MI->getOperand(0);
104    NewMI = BuildMI(*MF, MI->getDebugLoc(),
105      TII->get( MI->getOpcode() == X86::MOV32rr ? X86::LEA32r : X86::LEA64r))
106      .addOperand(Dest)
107      .addOperand(Src).addImm(1).addReg(0).addImm(0).addReg(0);
108    MFI->insert(MBBI, NewMI);   // Insert the new inst
109    return NewMI;
110  }
111  case X86::ADD64ri32:
112  case X86::ADD64ri8:
113  case X86::ADD64ri32_DB:
114  case X86::ADD64ri8_DB:
115  case X86::ADD32ri:
116  case X86::ADD32ri8:
117  case X86::ADD32ri_DB:
118  case X86::ADD32ri8_DB:
119  case X86::ADD16ri:
120  case X86::ADD16ri8:
121  case X86::ADD16ri_DB:
122  case X86::ADD16ri8_DB:
123    if (!MI->getOperand(2).isImm()) {
124      // convertToThreeAddress will call getImm()
125      // which requires isImm() to be true
126      return 0;
127    }
128  case X86::ADD16rr:
129  case X86::ADD16rr_DB:
130    if (MI->getOperand(1).getReg() != MI->getOperand(2).getReg()) {
131      // if src1 != src2, then convertToThreeAddress will
132      // need to create a Virtual register, which we cannot do
133      // after register allocation.
134      return 0;
135    }
136  }
137  return TII->convertToThreeAddress(MFI, MBBI, 0);
138}
139
140FunctionPass *llvm::createX86FixupLEAs() {
141  return new FixupLEAPass();
142}
143
144bool FixupLEAPass::runOnMachineFunction(MachineFunction &Func) {
145  MF = &Func;
146  TM = &MF->getTarget();
147  TII = TM->getInstrInfo();
148
149  DEBUG(dbgs() << "Start X86FixupLEAs\n";);
150  // Process all basic blocks.
151  for (MachineFunction::iterator I = Func.begin(), E = Func.end(); I != E; ++I)
152    processBasicBlock(Func, I);
153  DEBUG(dbgs() << "End X86FixupLEAs\n";);
154
155  return true;
156}
157
158FixupLEAPass::RegUsageState FixupLEAPass::usesRegister(MachineOperand& p,
159                                MachineBasicBlock::iterator I) {
160  RegUsageState RegUsage = RU_NotUsed;
161  MachineInstr* MI = I;
162
163  for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
164    MachineOperand& opnd = MI->getOperand(i);
165    if (opnd.isReg() && opnd.getReg() == p.getReg()){
166      if (opnd.isDef())
167        return RU_Write;
168      RegUsage = RU_Read;
169    }
170  }
171  return RegUsage;
172}
173
174/// getPreviousInstr - Given a reference to an instruction in a basic
175/// block, return a reference to the previous instruction in the block,
176/// wrapping around to the last instruction of the block if the block
177/// branches to itself.
178static inline bool getPreviousInstr(MachineBasicBlock::iterator& I,
179                                    MachineFunction::iterator MFI) {
180  if (I == MFI->begin()) {
181    if (MFI->isPredecessor(MFI)) {
182      I = --MFI->end();
183      return true;
184    }
185    else
186      return false;
187  }
188  --I;
189  return true;
190}
191
192MachineBasicBlock::iterator FixupLEAPass::searchBackwards(MachineOperand& p,
193                                   MachineBasicBlock::iterator& I,
194                                   MachineFunction::iterator MFI) {
195  int InstrDistance = 1;
196  MachineBasicBlock::iterator CurInst;
197  static const int INSTR_DISTANCE_THRESHOLD = 5;
198
199  CurInst = I;
200  bool Found;
201  Found = getPreviousInstr(CurInst, MFI);
202  while( Found && I != CurInst) {
203    if (CurInst->isCall() || CurInst->isInlineAsm())
204      break;
205    if (InstrDistance > INSTR_DISTANCE_THRESHOLD)
206      break; // too far back to make a difference
207    if (usesRegister(p, CurInst) == RU_Write){
208      return CurInst;
209    }
210    InstrDistance += TII->getInstrLatency(TM->getInstrItineraryData(), CurInst);
211    Found = getPreviousInstr(CurInst, MFI);
212  }
213  return 0;
214}
215
216void FixupLEAPass::processInstruction(MachineBasicBlock::iterator& I,
217                                      MachineFunction::iterator MFI) {
218  // Process a load, store, or LEA instruction.
219  MachineInstr *MI = I;
220  int opcode = MI->getOpcode();
221  const MCInstrDesc& Desc = MI->getDesc();
222  int AddrOffset = X86II::getMemoryOperandNo(Desc.TSFlags, opcode);
223  if (AddrOffset >= 0) {
224    AddrOffset += X86II::getOperandBias(Desc);
225    MachineOperand& p = MI->getOperand(AddrOffset + X86::AddrBaseReg);
226    if (p.isReg() && p.getReg() != X86::ESP) {
227      seekLEAFixup(p, I, MFI);
228    }
229    MachineOperand& q = MI->getOperand(AddrOffset + X86::AddrIndexReg);
230    if (q.isReg() && q.getReg() != X86::ESP) {
231      seekLEAFixup(q, I, MFI);
232    }
233  }
234}
235
236void FixupLEAPass::seekLEAFixup(MachineOperand& p,
237                                MachineBasicBlock::iterator& I,
238                                MachineFunction::iterator MFI) {
239  MachineBasicBlock::iterator MBI = searchBackwards(p, I, MFI);
240  if (MBI) {
241    MachineInstr* NewMI = postRAConvertToLEA(MFI, MBI);
242    if (NewMI) {
243      ++NumLEAs;
244      DEBUG(dbgs() << "Candidate to replace:"; MBI->dump(););
245      // now to replace with an equivalent LEA...
246      DEBUG(dbgs() << "Replaced by: "; NewMI->dump(););
247      MFI->erase(MBI);
248      MachineBasicBlock::iterator J =
249                             static_cast<MachineBasicBlock::iterator> (NewMI);
250      processInstruction(J, MFI);
251    }
252  }
253}
254
255bool FixupLEAPass::processBasicBlock(MachineFunction &MF,
256                                     MachineFunction::iterator MFI) {
257
258  for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I)
259    processInstruction(I, MFI);
260  return false;
261}
262