X86FloatingPoint.cpp revision 2268684f6fef2ef7e5b523d21dbd376f09ec1174
1//===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the pass which converts floating point instructions from 11// virtual registers into register stack instructions. This pass uses live 12// variable information to indicate where the FPn registers are used and their 13// lifetimes. 14// 15// This pass is hampered by the lack of decent CFG manipulation routines for 16// machine code. In particular, this wants to be able to split critical edges 17// as necessary, traverse the machine basic block CFG in depth-first order, and 18// allow there to be multiple machine basic blocks for each LLVM basicblock 19// (needed for critical edge splitting). 20// 21// In particular, this pass currently barfs on critical edges. Because of this, 22// it requires the instruction selector to insert FP_REG_KILL instructions on 23// the exits of any basic block that has critical edges going from it, or which 24// branch to a critical basic block. 25// 26// FIXME: this is not implemented yet. The stackifier pass only works on local 27// basic blocks. 28// 29//===----------------------------------------------------------------------===// 30 31#define DEBUG_TYPE "fp" 32#include "X86.h" 33#include "X86InstrInfo.h" 34#include "llvm/CodeGen/MachineFunctionPass.h" 35#include "llvm/CodeGen/MachineInstrBuilder.h" 36#include "llvm/CodeGen/LiveVariables.h" 37#include "llvm/CodeGen/Passes.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "Support/Debug.h" 41#include "Support/DepthFirstIterator.h" 42#include "Support/Statistic.h" 43#include "Support/STLExtras.h" 44#include <algorithm> 45#include <set> 46using namespace llvm; 47 48namespace { 49 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted"); 50 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions"); 51 52 struct FPS : public MachineFunctionPass { 53 virtual bool runOnMachineFunction(MachineFunction &MF); 54 55 virtual const char *getPassName() const { return "X86 FP Stackifier"; } 56 57 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 58 AU.addRequired<LiveVariables>(); 59 MachineFunctionPass::getAnalysisUsage(AU); 60 } 61 private: 62 LiveVariables *LV; // Live variable info for current function... 63 MachineBasicBlock *MBB; // Current basic block 64 unsigned Stack[8]; // FP<n> Registers in each stack slot... 65 unsigned RegMap[8]; // Track which stack slot contains each register 66 unsigned StackTop; // The current top of the FP stack. 67 68 void dumpStack() const { 69 std::cerr << "Stack contents:"; 70 for (unsigned i = 0; i != StackTop; ++i) { 71 std::cerr << " FP" << Stack[i]; 72 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!"); 73 } 74 std::cerr << "\n"; 75 } 76 private: 77 // getSlot - Return the stack slot number a particular register number is 78 // in... 79 unsigned getSlot(unsigned RegNo) const { 80 assert(RegNo < 8 && "Regno out of range!"); 81 return RegMap[RegNo]; 82 } 83 84 // getStackEntry - Return the X86::FP<n> register in register ST(i) 85 unsigned getStackEntry(unsigned STi) const { 86 assert(STi < StackTop && "Access past stack top!"); 87 return Stack[StackTop-1-STi]; 88 } 89 90 // getSTReg - Return the X86::ST(i) register which contains the specified 91 // FP<RegNo> register 92 unsigned getSTReg(unsigned RegNo) const { 93 return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0; 94 } 95 96 // pushReg - Push the specified FP<n> register onto the stack 97 void pushReg(unsigned Reg) { 98 assert(Reg < 8 && "Register number out of range!"); 99 assert(StackTop < 8 && "Stack overflow!"); 100 Stack[StackTop] = Reg; 101 RegMap[Reg] = StackTop++; 102 } 103 104 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; } 105 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) { 106 if (!isAtTop(RegNo)) { 107 unsigned Slot = getSlot(RegNo); 108 unsigned STReg = getSTReg(RegNo); 109 unsigned RegOnTop = getStackEntry(0); 110 111 // Swap the slots the regs are in 112 std::swap(RegMap[RegNo], RegMap[RegOnTop]); 113 114 // Swap stack slot contents 115 assert(RegMap[RegOnTop] < StackTop); 116 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]); 117 118 // Emit an fxch to update the runtime processors version of the state 119 BuildMI(*MBB, I, X86::FXCH, 1).addReg(STReg); 120 NumFXCH++; 121 } 122 } 123 124 void duplicateToTop(unsigned RegNo, unsigned AsReg, MachineInstr *I) { 125 unsigned STReg = getSTReg(RegNo); 126 pushReg(AsReg); // New register on top of stack 127 128 BuildMI(*MBB, I, X86::FLDrr, 1).addReg(STReg); 129 } 130 131 // popStackAfter - Pop the current value off of the top of the FP stack 132 // after the specified instruction. 133 void popStackAfter(MachineBasicBlock::iterator &I); 134 135 // freeStackSlotAfter - Free the specified register from the register stack, 136 // so that it is no longer in a register. If the register is currently at 137 // the top of the stack, we just pop the current instruction, otherwise we 138 // store the current top-of-stack into the specified slot, then pop the top 139 // of stack. 140 void freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned Reg); 141 142 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); 143 144 void handleZeroArgFP(MachineBasicBlock::iterator &I); 145 void handleOneArgFP(MachineBasicBlock::iterator &I); 146 void handleOneArgFPRW(MachineBasicBlock::iterator &I); 147 void handleTwoArgFP(MachineBasicBlock::iterator &I); 148 void handleCondMovFP(MachineBasicBlock::iterator &I); 149 void handleSpecialFP(MachineBasicBlock::iterator &I); 150 }; 151} 152 153FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } 154 155/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP 156/// register references into FP stack references. 157/// 158bool FPS::runOnMachineFunction(MachineFunction &MF) { 159 LV = &getAnalysis<LiveVariables>(); 160 StackTop = 0; 161 162 // Process the function in depth first order so that we process at least one 163 // of the predecessors for every reachable block in the function. 164 std::set<MachineBasicBlock*> Processed; 165 MachineBasicBlock *Entry = MF.begin(); 166 167 bool Changed = false; 168 for (df_ext_iterator<MachineBasicBlock*, std::set<MachineBasicBlock*> > 169 I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed); 170 I != E; ++I) 171 Changed |= processBasicBlock(MF, **I); 172 173 return Changed; 174} 175 176/// processBasicBlock - Loop over all of the instructions in the basic block, 177/// transforming FP instructions into their stack form. 178/// 179bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { 180 const TargetInstrInfo &TII = MF.getTarget().getInstrInfo(); 181 bool Changed = false; 182 MBB = &BB; 183 184 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) { 185 MachineInstr *MI = I; 186 unsigned Flags = TII.get(MI->getOpcode()).TSFlags; 187 if ((Flags & X86II::FPTypeMask) == X86II::NotFP) 188 continue; // Efficiently ignore non-fp insts! 189 190 MachineInstr *PrevMI = 0; 191 if (I != BB.begin()) 192 PrevMI = prior(I); 193 194 ++NumFP; // Keep track of # of pseudo instrs 195 DEBUG(std::cerr << "\nFPInst:\t"; 196 MI->print(std::cerr, MF.getTarget())); 197 198 // Get dead variables list now because the MI pointer may be deleted as part 199 // of processing! 200 LiveVariables::killed_iterator IB = LV->dead_begin(MI); 201 LiveVariables::killed_iterator IE = LV->dead_end(MI); 202 203 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo(); 204 LiveVariables::killed_iterator I = LV->killed_begin(MI); 205 LiveVariables::killed_iterator E = LV->killed_end(MI); 206 if (I != E) { 207 std::cerr << "Killed Operands:"; 208 for (; I != E; ++I) 209 std::cerr << " %" << MRI->getName(I->second); 210 std::cerr << "\n"; 211 }); 212 213 switch (Flags & X86II::FPTypeMask) { 214 case X86II::ZeroArgFP: handleZeroArgFP(I); break; 215 case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0) 216 case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0)) 217 case X86II::TwoArgFP: handleTwoArgFP(I); break; 218 case X86II::CondMovFP: handleCondMovFP(I); break; 219 case X86II::SpecialFP: handleSpecialFP(I); break; 220 default: assert(0 && "Unknown FP Type!"); 221 } 222 223 // Check to see if any of the values defined by this instruction are dead 224 // after definition. If so, pop them. 225 for (; IB != IE; ++IB) { 226 unsigned Reg = IB->second; 227 if (Reg >= X86::FP0 && Reg <= X86::FP6) { 228 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n"); 229 ++I; // Insert fxch AFTER the instruction 230 moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary 231 --I; // Move to fxch or old instruction 232 popStackAfter(I); // Pop the top of the stack, killing value 233 } 234 } 235 236 // Print out all of the instructions expanded to if -debug 237 DEBUG( 238 MachineBasicBlock::iterator PrevI(PrevMI); 239 if (I == PrevI) { 240 std::cerr << "Just deleted pseudo instruction\n"; 241 } else { 242 MachineBasicBlock::iterator Start = I; 243 // Rewind to first instruction newly inserted. 244 while (Start != BB.begin() && prior(Start) != PrevI) --Start; 245 std::cerr << "Inserted instructions:\n\t"; 246 Start->print(std::cerr, MF.getTarget()); 247 while (++Start != next(I)); 248 } 249 dumpStack(); 250 ); 251 252 Changed = true; 253 } 254 255 assert(StackTop == 0 && "Stack not empty at end of basic block?"); 256 return Changed; 257} 258 259//===----------------------------------------------------------------------===// 260// Efficient Lookup Table Support 261//===----------------------------------------------------------------------===// 262 263namespace { 264 struct TableEntry { 265 unsigned from; 266 unsigned to; 267 bool operator<(const TableEntry &TE) const { return from < TE.from; } 268 bool operator<(unsigned V) const { return from < V; } 269 }; 270} 271 272static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { 273 for (unsigned i = 0; i != NumEntries-1; ++i) 274 if (!(Table[i] < Table[i+1])) return false; 275 return true; 276} 277 278static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) { 279 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode); 280 if (I != Table+N && I->from == Opcode) 281 return I->to; 282 return -1; 283} 284 285#define ARRAY_SIZE(TABLE) \ 286 (sizeof(TABLE)/sizeof(TABLE[0])) 287 288#ifdef NDEBUG 289#define ASSERT_SORTED(TABLE) 290#else 291#define ASSERT_SORTED(TABLE) \ 292 { static bool TABLE##Checked = false; \ 293 if (!TABLE##Checked) \ 294 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \ 295 "All lookup tables must be sorted for efficient access!"); \ 296 } 297#endif 298 299 300//===----------------------------------------------------------------------===// 301// Helper Methods 302//===----------------------------------------------------------------------===// 303 304// PopTable - Sorted map of instructions to their popping version. The first 305// element is an instruction, the second is the version which pops. 306// 307static const TableEntry PopTable[] = { 308 { X86::FADDrST0 , X86::FADDPrST0 }, 309 310 { X86::FDIVRrST0, X86::FDIVRPrST0 }, 311 { X86::FDIVrST0 , X86::FDIVPrST0 }, 312 313 { X86::FIST16m , X86::FISTP16m }, 314 { X86::FIST32m , X86::FISTP32m }, 315 316 { X86::FMULrST0 , X86::FMULPrST0 }, 317 318 { X86::FST32m , X86::FSTP32m }, 319 { X86::FST64m , X86::FSTP64m }, 320 { X86::FSTrr , X86::FSTPrr }, 321 322 { X86::FSUBRrST0, X86::FSUBRPrST0 }, 323 { X86::FSUBrST0 , X86::FSUBPrST0 }, 324 325 { X86::FUCOMIr , X86::FUCOMIPr }, 326 327 { X86::FUCOMPr , X86::FUCOMPPr }, 328 { X86::FUCOMr , X86::FUCOMPr }, 329}; 330 331/// popStackAfter - Pop the current value off of the top of the FP stack after 332/// the specified instruction. This attempts to be sneaky and combine the pop 333/// into the instruction itself if possible. The iterator is left pointing to 334/// the last instruction, be it a new pop instruction inserted, or the old 335/// instruction if it was modified in place. 336/// 337void FPS::popStackAfter(MachineBasicBlock::iterator &I) { 338 ASSERT_SORTED(PopTable); 339 assert(StackTop > 0 && "Cannot pop empty stack!"); 340 RegMap[Stack[--StackTop]] = ~0; // Update state 341 342 // Check to see if there is a popping version of this instruction... 343 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode()); 344 if (Opcode != -1) { 345 I->setOpcode(Opcode); 346 if (Opcode == X86::FUCOMPPr) 347 I->RemoveOperand(0); 348 349 } else { // Insert an explicit pop 350 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(X86::ST0); 351 } 352} 353 354/// freeStackSlotAfter - Free the specified register from the register stack, so 355/// that it is no longer in a register. If the register is currently at the top 356/// of the stack, we just pop the current instruction, otherwise we store the 357/// current top-of-stack into the specified slot, then pop the top of stack. 358void FPS::freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned FPRegNo) { 359 if (getStackEntry(0) == FPRegNo) { // already at the top of stack? easy. 360 popStackAfter(I); 361 return; 362 } 363 364 // Otherwise, store the top of stack into the dead slot, killing the operand 365 // without having to add in an explicit xchg then pop. 366 // 367 unsigned STReg = getSTReg(FPRegNo); 368 unsigned OldSlot = getSlot(FPRegNo); 369 unsigned TopReg = Stack[StackTop-1]; 370 Stack[OldSlot] = TopReg; 371 RegMap[TopReg] = OldSlot; 372 RegMap[FPRegNo] = ~0; 373 Stack[--StackTop] = ~0; 374 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(STReg); 375} 376 377 378static unsigned getFPReg(const MachineOperand &MO) { 379 assert(MO.isRegister() && "Expected an FP register!"); 380 unsigned Reg = MO.getReg(); 381 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); 382 return Reg - X86::FP0; 383} 384 385 386//===----------------------------------------------------------------------===// 387// Instruction transformation implementation 388//===----------------------------------------------------------------------===// 389 390/// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem> 391/// 392void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) { 393 MachineInstr *MI = I; 394 unsigned DestReg = getFPReg(MI->getOperand(0)); 395 MI->RemoveOperand(0); // Remove the explicit ST(0) operand 396 397 // Result gets pushed on the stack... 398 pushReg(DestReg); 399} 400 401/// handleOneArgFP - fst <mem>, ST(0) 402/// 403void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) { 404 MachineInstr *MI = I; 405 assert((MI->getNumOperands() == 5 || MI->getNumOperands() == 1) && 406 "Can only handle fst* & ftst instructions!"); 407 408 // Is this the last use of the source register? 409 unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1)); 410 bool KillsSrc = false; 411 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 412 E = LV->killed_end(MI); KI != E; ++KI) 413 KillsSrc |= KI->second == X86::FP0+Reg; 414 415 // FSTP80r and FISTP64r are strange because there are no non-popping versions. 416 // If we have one _and_ we don't want to pop the operand, duplicate the value 417 // on the stack instead of moving it. This ensure that popping the value is 418 // always ok. 419 // 420 if ((MI->getOpcode() == X86::FSTP80m || 421 MI->getOpcode() == X86::FISTP64m) && !KillsSrc) { 422 duplicateToTop(Reg, 7 /*temp register*/, I); 423 } else { 424 moveToTop(Reg, I); // Move to the top of the stack... 425 } 426 MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand 427 428 if (MI->getOpcode() == X86::FSTP80m || MI->getOpcode() == X86::FISTP64m) { 429 assert(StackTop > 0 && "Stack empty??"); 430 --StackTop; 431 } else if (KillsSrc) { // Last use of operand? 432 popStackAfter(I); 433 } 434} 435 436 437/// handleOneArgFPRW: Handle instructions that read from the top of stack and 438/// replace the value with a newly computed value. These instructions may have 439/// non-fp operands after their FP operands. 440/// 441/// Examples: 442/// R1 = fchs R2 443/// R1 = fadd R2, [mem] 444/// 445void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) { 446 MachineInstr *MI = I; 447 assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!"); 448 449 // Is this the last use of the source register? 450 unsigned Reg = getFPReg(MI->getOperand(1)); 451 bool KillsSrc = false; 452 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 453 E = LV->killed_end(MI); KI != E; ++KI) 454 KillsSrc |= KI->second == X86::FP0+Reg; 455 456 if (KillsSrc) { 457 // If this is the last use of the source register, just make sure it's on 458 // the top of the stack. 459 moveToTop(Reg, I); 460 assert(StackTop > 0 && "Stack cannot be empty!"); 461 --StackTop; 462 pushReg(getFPReg(MI->getOperand(0))); 463 } else { 464 // If this is not the last use of the source register, _copy_ it to the top 465 // of the stack. 466 duplicateToTop(Reg, getFPReg(MI->getOperand(0)), I); 467 } 468 469 MI->RemoveOperand(1); // Drop the source operand. 470 MI->RemoveOperand(0); // Drop the destination operand. 471} 472 473 474//===----------------------------------------------------------------------===// 475// Define tables of various ways to map pseudo instructions 476// 477 478// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i) 479static const TableEntry ForwardST0Table[] = { 480 { X86::FpADD , X86::FADDST0r }, 481 { X86::FpDIV , X86::FDIVST0r }, 482 { X86::FpMUL , X86::FMULST0r }, 483 { X86::FpSUB , X86::FSUBST0r }, 484 { X86::FpUCOM , X86::FUCOMr }, 485 { X86::FpUCOMI, X86::FUCOMIr }, 486}; 487 488// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0) 489static const TableEntry ReverseST0Table[] = { 490 { X86::FpADD , X86::FADDST0r }, // commutative 491 { X86::FpDIV , X86::FDIVRST0r }, 492 { X86::FpMUL , X86::FMULST0r }, // commutative 493 { X86::FpSUB , X86::FSUBRST0r }, 494 { X86::FpUCOM , ~0 }, 495 { X86::FpUCOMI, ~0 }, 496}; 497 498// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i) 499static const TableEntry ForwardSTiTable[] = { 500 { X86::FpADD , X86::FADDrST0 }, // commutative 501 { X86::FpDIV , X86::FDIVRrST0 }, 502 { X86::FpMUL , X86::FMULrST0 }, // commutative 503 { X86::FpSUB , X86::FSUBRrST0 }, 504 { X86::FpUCOM , X86::FUCOMr }, 505 { X86::FpUCOMI, X86::FUCOMIr }, 506}; 507 508// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0) 509static const TableEntry ReverseSTiTable[] = { 510 { X86::FpADD , X86::FADDrST0 }, 511 { X86::FpDIV , X86::FDIVrST0 }, 512 { X86::FpMUL , X86::FMULrST0 }, 513 { X86::FpSUB , X86::FSUBrST0 }, 514 { X86::FpUCOM , ~0 }, 515 { X86::FpUCOMI, ~0 }, 516}; 517 518 519/// handleTwoArgFP - Handle instructions like FADD and friends which are virtual 520/// instructions which need to be simplified and possibly transformed. 521/// 522/// Result: ST(0) = fsub ST(0), ST(i) 523/// ST(i) = fsub ST(0), ST(i) 524/// ST(0) = fsubr ST(0), ST(i) 525/// ST(i) = fsubr ST(0), ST(i) 526/// 527/// In addition to three address instructions, this also handles the FpUCOM 528/// instruction which only has two operands, but no destination. This 529/// instruction is also annoying because there is no "reverse" form of it 530/// available. 531/// 532void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) { 533 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 534 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 535 MachineInstr *MI = I; 536 537 unsigned NumOperands = MI->getNumOperands(); 538 bool isCompare = MI->getOpcode() == X86::FpUCOM || 539 MI->getOpcode() == X86::FpUCOMI; 540 assert((NumOperands == 3 || (NumOperands == 2 && isCompare)) && 541 "Illegal TwoArgFP instruction!"); 542 unsigned Dest = getFPReg(MI->getOperand(0)); 543 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 544 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 545 bool KillsOp0 = false, KillsOp1 = false; 546 547 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 548 E = LV->killed_end(MI); KI != E; ++KI) { 549 KillsOp0 |= (KI->second == X86::FP0+Op0); 550 KillsOp1 |= (KI->second == X86::FP0+Op1); 551 } 552 553 // If this is an FpUCOM instruction, we must make sure the first operand is on 554 // the top of stack, the other one can be anywhere... 555 if (isCompare) 556 moveToTop(Op0, I); 557 558 unsigned TOS = getStackEntry(0); 559 560 // One of our operands must be on the top of the stack. If neither is yet, we 561 // need to move one. 562 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? 563 // We can choose to move either operand to the top of the stack. If one of 564 // the operands is killed by this instruction, we want that one so that we 565 // can update right on top of the old version. 566 if (KillsOp0) { 567 moveToTop(Op0, I); // Move dead operand to TOS. 568 TOS = Op0; 569 } else if (KillsOp1) { 570 moveToTop(Op1, I); 571 TOS = Op1; 572 } else { 573 // All of the operands are live after this instruction executes, so we 574 // cannot update on top of any operand. Because of this, we must 575 // duplicate one of the stack elements to the top. It doesn't matter 576 // which one we pick. 577 // 578 duplicateToTop(Op0, Dest, I); 579 Op0 = TOS = Dest; 580 KillsOp0 = true; 581 } 582 } else if (!KillsOp0 && !KillsOp1 && !isCompare) { 583 // If we DO have one of our operands at the top of the stack, but we don't 584 // have a dead operand, we must duplicate one of the operands to a new slot 585 // on the stack. 586 duplicateToTop(Op0, Dest, I); 587 Op0 = TOS = Dest; 588 KillsOp0 = true; 589 } 590 591 // Now we know that one of our operands is on the top of the stack, and at 592 // least one of our operands is killed by this instruction. 593 assert((TOS == Op0 || TOS == Op1) && 594 (KillsOp0 || KillsOp1 || isCompare) && 595 "Stack conditions not set up right!"); 596 597 // We decide which form to use based on what is on the top of the stack, and 598 // which operand is killed by this instruction. 599 const TableEntry *InstTable; 600 bool isForward = TOS == Op0; 601 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0); 602 if (updateST0) { 603 if (isForward) 604 InstTable = ForwardST0Table; 605 else 606 InstTable = ReverseST0Table; 607 } else { 608 if (isForward) 609 InstTable = ForwardSTiTable; 610 else 611 InstTable = ReverseSTiTable; 612 } 613 614 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode()); 615 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!"); 616 617 // NotTOS - The register which is not on the top of stack... 618 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; 619 620 // Replace the old instruction with a new instruction 621 MBB->remove(I++); 622 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(NotTOS)); 623 624 // If both operands are killed, pop one off of the stack in addition to 625 // overwriting the other one. 626 if (KillsOp0 && KillsOp1 && Op0 != Op1) { 627 assert(!updateST0 && "Should have updated other operand!"); 628 popStackAfter(I); // Pop the top of stack 629 } 630 631 // Insert an explicit pop of the "updated" operand for FUCOM 632 if (isCompare) { 633 if (KillsOp0 && !KillsOp1) 634 popStackAfter(I); // If we kill the first operand, pop it! 635 else if (KillsOp1 && Op0 != Op1) 636 freeStackSlotAfter(I, Op1); 637 } 638 639 // Update stack information so that we know the destination register is now on 640 // the stack. 641 if (!isCompare) { 642 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS); 643 assert(UpdatedSlot < StackTop && Dest < 7); 644 Stack[UpdatedSlot] = Dest; 645 RegMap[Dest] = UpdatedSlot; 646 } 647 delete MI; // Remove the old instruction 648} 649 650/// handleCondMovFP - Handle two address conditional move instructions. These 651/// instructions move a st(i) register to st(0) iff a condition is true. These 652/// instructions require that the first operand is at the top of the stack, but 653/// otherwise don't modify the stack at all. 654void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) { 655 MachineInstr *MI = I; 656 657 unsigned Op0 = getFPReg(MI->getOperand(0)); 658 unsigned Op1 = getFPReg(MI->getOperand(1)); 659 660 // The first operand *must* be on the top of the stack. 661 moveToTop(Op0, I); 662 663 // Change the second operand to the stack register that the operand is in. 664 MI->RemoveOperand(0); 665 MI->getOperand(0).setReg(getSTReg(Op1)); 666 667 // If we kill the second operand, make sure to pop it from the stack. 668 if (Op0 != Op1) 669 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 670 E = LV->killed_end(MI); KI != E; ++KI) 671 if (KI->second == X86::FP0+Op1) { 672 // Get this value off of the register stack. 673 freeStackSlotAfter(I, Op1); 674 break; 675 } 676} 677 678 679/// handleSpecialFP - Handle special instructions which behave unlike other 680/// floating point instructions. This is primarily intended for use by pseudo 681/// instructions. 682/// 683void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { 684 MachineInstr *MI = I; 685 switch (MI->getOpcode()) { 686 default: assert(0 && "Unknown SpecialFP instruction!"); 687 case X86::FpGETRESULT: // Appears immediately after a call returning FP type! 688 assert(StackTop == 0 && "Stack should be empty after a call!"); 689 pushReg(getFPReg(MI->getOperand(0))); 690 break; 691 case X86::FpSETRESULT: 692 assert(StackTop == 1 && "Stack should have one element on it to return!"); 693 --StackTop; // "Forget" we have something on the top of stack! 694 break; 695 case X86::FpMOV: { 696 unsigned SrcReg = getFPReg(MI->getOperand(1)); 697 unsigned DestReg = getFPReg(MI->getOperand(0)); 698 bool KillsSrc = false; 699 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 700 E = LV->killed_end(MI); KI != E; ++KI) 701 KillsSrc |= KI->second == X86::FP0+SrcReg; 702 703 if (KillsSrc) { 704 // If the input operand is killed, we can just change the owner of the 705 // incoming stack slot into the result. 706 unsigned Slot = getSlot(SrcReg); 707 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!"); 708 Stack[Slot] = DestReg; 709 RegMap[DestReg] = Slot; 710 711 } else { 712 // For FMOV we just duplicate the specified value to a new stack slot. 713 // This could be made better, but would require substantial changes. 714 duplicateToTop(SrcReg, DestReg, I); 715 } 716 break; 717 } 718 } 719 720 I = MBB->erase(I); // Remove the pseudo instruction 721 --I; 722} 723