X86FloatingPoint.cpp revision 4cf15e7a3bed2ff3a7fa87f18cdf65b7eecccee2
1//===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the pass which converts floating point instructions from 11// virtual registers into register stack instructions. This pass uses live 12// variable information to indicate where the FPn registers are used and their 13// lifetimes. 14// 15// This pass is hampered by the lack of decent CFG manipulation routines for 16// machine code. In particular, this wants to be able to split critical edges 17// as necessary, traverse the machine basic block CFG in depth-first order, and 18// allow there to be multiple machine basic blocks for each LLVM basicblock 19// (needed for critical edge splitting). 20// 21// In particular, this pass currently barfs on critical edges. Because of this, 22// it requires the instruction selector to insert FP_REG_KILL instructions on 23// the exits of any basic block that has critical edges going from it, or which 24// branch to a critical basic block. 25// 26// FIXME: this is not implemented yet. The stackifier pass only works on local 27// basic blocks. 28// 29//===----------------------------------------------------------------------===// 30 31#define DEBUG_TYPE "fp" 32#include "X86.h" 33#include "X86InstrInfo.h" 34#include "llvm/CodeGen/MachineFunctionPass.h" 35#include "llvm/CodeGen/MachineInstrBuilder.h" 36#include "llvm/CodeGen/LiveVariables.h" 37#include "llvm/CodeGen/Passes.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Function.h" // FIXME: remove when using MBB CFG! 41#include "llvm/Support/CFG.h" // FIXME: remove when using MBB CFG! 42#include "Support/Debug.h" 43#include "Support/DepthFirstIterator.h" 44#include "Support/Statistic.h" 45#include "Support/STLExtras.h" 46#include <algorithm> 47#include <set> 48using namespace llvm; 49 50namespace { 51 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted"); 52 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions"); 53 54 struct FPS : public MachineFunctionPass { 55 virtual bool runOnMachineFunction(MachineFunction &MF); 56 57 virtual const char *getPassName() const { return "X86 FP Stackifier"; } 58 59 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 60 AU.addRequired<LiveVariables>(); 61 MachineFunctionPass::getAnalysisUsage(AU); 62 } 63 private: 64 LiveVariables *LV; // Live variable info for current function... 65 MachineBasicBlock *MBB; // Current basic block 66 unsigned Stack[8]; // FP<n> Registers in each stack slot... 67 unsigned RegMap[8]; // Track which stack slot contains each register 68 unsigned StackTop; // The current top of the FP stack. 69 70 void dumpStack() const { 71 std::cerr << "Stack contents:"; 72 for (unsigned i = 0; i != StackTop; ++i) { 73 std::cerr << " FP" << Stack[i]; 74 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!"); 75 } 76 std::cerr << "\n"; 77 } 78 private: 79 // getSlot - Return the stack slot number a particular register number is 80 // in... 81 unsigned getSlot(unsigned RegNo) const { 82 assert(RegNo < 8 && "Regno out of range!"); 83 return RegMap[RegNo]; 84 } 85 86 // getStackEntry - Return the X86::FP<n> register in register ST(i) 87 unsigned getStackEntry(unsigned STi) const { 88 assert(STi < StackTop && "Access past stack top!"); 89 return Stack[StackTop-1-STi]; 90 } 91 92 // getSTReg - Return the X86::ST(i) register which contains the specified 93 // FP<RegNo> register 94 unsigned getSTReg(unsigned RegNo) const { 95 return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0; 96 } 97 98 // pushReg - Push the specified FP<n> register onto the stack 99 void pushReg(unsigned Reg) { 100 assert(Reg < 8 && "Register number out of range!"); 101 assert(StackTop < 8 && "Stack overflow!"); 102 Stack[StackTop] = Reg; 103 RegMap[Reg] = StackTop++; 104 } 105 106 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; } 107 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) { 108 if (!isAtTop(RegNo)) { 109 unsigned Slot = getSlot(RegNo); 110 unsigned STReg = getSTReg(RegNo); 111 unsigned RegOnTop = getStackEntry(0); 112 113 // Swap the slots the regs are in 114 std::swap(RegMap[RegNo], RegMap[RegOnTop]); 115 116 // Swap stack slot contents 117 assert(RegMap[RegOnTop] < StackTop); 118 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]); 119 120 // Emit an fxch to update the runtime processors version of the state 121 BuildMI(*MBB, I, X86::FXCH, 1).addReg(STReg); 122 NumFXCH++; 123 } 124 } 125 126 void duplicateToTop(unsigned RegNo, unsigned AsReg, MachineInstr *I) { 127 unsigned STReg = getSTReg(RegNo); 128 pushReg(AsReg); // New register on top of stack 129 130 BuildMI(*MBB, I, X86::FLDrr, 1).addReg(STReg); 131 } 132 133 // popStackAfter - Pop the current value off of the top of the FP stack 134 // after the specified instruction. 135 void popStackAfter(MachineBasicBlock::iterator &I); 136 137 // freeStackSlotAfter - Free the specified register from the register stack, 138 // so that it is no longer in a register. If the register is currently at 139 // the top of the stack, we just pop the current instruction, otherwise we 140 // store the current top-of-stack into the specified slot, then pop the top 141 // of stack. 142 void freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned Reg); 143 144 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); 145 146 void handleZeroArgFP(MachineBasicBlock::iterator &I); 147 void handleOneArgFP(MachineBasicBlock::iterator &I); 148 void handleOneArgFPRW(MachineBasicBlock::iterator &I); 149 void handleTwoArgFP(MachineBasicBlock::iterator &I); 150 void handleCondMovFP(MachineBasicBlock::iterator &I); 151 void handleSpecialFP(MachineBasicBlock::iterator &I); 152 }; 153} 154 155FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } 156 157/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP 158/// register references into FP stack references. 159/// 160bool FPS::runOnMachineFunction(MachineFunction &MF) { 161 LV = &getAnalysis<LiveVariables>(); 162 StackTop = 0; 163 164 // Figure out the mapping of MBB's to BB's. 165 // 166 // FIXME: Eventually we should be able to traverse the MBB CFG directly, and 167 // we will need to extend this when one llvm basic block can codegen to 168 // multiple MBBs. 169 // 170 // FIXME again: Just use the mapping established by LiveVariables! 171 // 172 std::map<const BasicBlock*, MachineBasicBlock *> MBBMap; 173 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 174 MBBMap[I->getBasicBlock()] = I; 175 176 // Process the function in depth first order so that we process at least one 177 // of the predecessors for every reachable block in the function. 178 std::set<const BasicBlock*> Processed; 179 const BasicBlock *Entry = MF.getFunction()->begin(); 180 181 bool Changed = false; 182 for (df_ext_iterator<const BasicBlock*, std::set<const BasicBlock*> > 183 I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed); 184 I != E; ++I) 185 Changed |= processBasicBlock(MF, *MBBMap[*I]); 186 187 assert(MBBMap.size() == Processed.size() && 188 "Doesn't handle unreachable code yet!"); 189 190 return Changed; 191} 192 193/// processBasicBlock - Loop over all of the instructions in the basic block, 194/// transforming FP instructions into their stack form. 195/// 196bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { 197 const TargetInstrInfo &TII = MF.getTarget().getInstrInfo(); 198 bool Changed = false; 199 MBB = &BB; 200 201 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) { 202 MachineInstr *MI = I; 203 unsigned Flags = TII.get(MI->getOpcode()).TSFlags; 204 if ((Flags & X86II::FPTypeMask) == X86II::NotFP) 205 continue; // Efficiently ignore non-fp insts! 206 207 MachineInstr *PrevMI = 0; 208 if (I != BB.begin()) 209 PrevMI = prior(I); 210 211 ++NumFP; // Keep track of # of pseudo instrs 212 DEBUG(std::cerr << "\nFPInst:\t"; 213 MI->print(std::cerr, MF.getTarget())); 214 215 // Get dead variables list now because the MI pointer may be deleted as part 216 // of processing! 217 LiveVariables::killed_iterator IB = LV->dead_begin(MI); 218 LiveVariables::killed_iterator IE = LV->dead_end(MI); 219 220 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo(); 221 LiveVariables::killed_iterator I = LV->killed_begin(MI); 222 LiveVariables::killed_iterator E = LV->killed_end(MI); 223 if (I != E) { 224 std::cerr << "Killed Operands:"; 225 for (; I != E; ++I) 226 std::cerr << " %" << MRI->getName(I->second); 227 std::cerr << "\n"; 228 }); 229 230 switch (Flags & X86II::FPTypeMask) { 231 case X86II::ZeroArgFP: handleZeroArgFP(I); break; 232 case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0) 233 case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0)) 234 case X86II::TwoArgFP: handleTwoArgFP(I); break; 235 case X86II::CondMovFP: handleCondMovFP(I); break; 236 case X86II::SpecialFP: handleSpecialFP(I); break; 237 default: assert(0 && "Unknown FP Type!"); 238 } 239 240 // Check to see if any of the values defined by this instruction are dead 241 // after definition. If so, pop them. 242 for (; IB != IE; ++IB) { 243 unsigned Reg = IB->second; 244 if (Reg >= X86::FP0 && Reg <= X86::FP6) { 245 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n"); 246 ++I; // Insert fxch AFTER the instruction 247 moveToTop(Reg-X86::FP0, I); // Insert fxch if necessary 248 --I; // Move to fxch or old instruction 249 popStackAfter(I); // Pop the top of the stack, killing value 250 } 251 } 252 253 // Print out all of the instructions expanded to if -debug 254 DEBUG( 255 MachineBasicBlock::iterator PrevI(PrevMI); 256 if (I == PrevI) { 257 std::cerr << "Just deleted pseudo instruction\n"; 258 } else { 259 MachineBasicBlock::iterator Start = I; 260 // Rewind to first instruction newly inserted. 261 while (Start != BB.begin() && prior(Start) != PrevI) --Start; 262 std::cerr << "Inserted instructions:\n\t"; 263 Start->print(std::cerr, MF.getTarget()); 264 while (++Start != next(I)); 265 } 266 dumpStack(); 267 ); 268 269 Changed = true; 270 } 271 272 assert(StackTop == 0 && "Stack not empty at end of basic block?"); 273 return Changed; 274} 275 276//===----------------------------------------------------------------------===// 277// Efficient Lookup Table Support 278//===----------------------------------------------------------------------===// 279 280namespace { 281 struct TableEntry { 282 unsigned from; 283 unsigned to; 284 bool operator<(const TableEntry &TE) const { return from < TE.from; } 285 bool operator<(unsigned V) const { return from < V; } 286 }; 287} 288 289static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { 290 for (unsigned i = 0; i != NumEntries-1; ++i) 291 if (!(Table[i] < Table[i+1])) return false; 292 return true; 293} 294 295static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) { 296 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode); 297 if (I != Table+N && I->from == Opcode) 298 return I->to; 299 return -1; 300} 301 302#define ARRAY_SIZE(TABLE) \ 303 (sizeof(TABLE)/sizeof(TABLE[0])) 304 305#ifdef NDEBUG 306#define ASSERT_SORTED(TABLE) 307#else 308#define ASSERT_SORTED(TABLE) \ 309 { static bool TABLE##Checked = false; \ 310 if (!TABLE##Checked) \ 311 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \ 312 "All lookup tables must be sorted for efficient access!"); \ 313 } 314#endif 315 316 317//===----------------------------------------------------------------------===// 318// Helper Methods 319//===----------------------------------------------------------------------===// 320 321// PopTable - Sorted map of instructions to their popping version. The first 322// element is an instruction, the second is the version which pops. 323// 324static const TableEntry PopTable[] = { 325 { X86::FADDrST0 , X86::FADDPrST0 }, 326 327 { X86::FDIVRrST0, X86::FDIVRPrST0 }, 328 { X86::FDIVrST0 , X86::FDIVPrST0 }, 329 330 { X86::FIST16m , X86::FISTP16m }, 331 { X86::FIST32m , X86::FISTP32m }, 332 333 { X86::FMULrST0 , X86::FMULPrST0 }, 334 335 { X86::FST32m , X86::FSTP32m }, 336 { X86::FST64m , X86::FSTP64m }, 337 { X86::FSTrr , X86::FSTPrr }, 338 339 { X86::FSUBRrST0, X86::FSUBRPrST0 }, 340 { X86::FSUBrST0 , X86::FSUBPrST0 }, 341 342 { X86::FUCOMPr , X86::FUCOMPPr }, 343 { X86::FUCOMr , X86::FUCOMPr }, 344}; 345 346/// popStackAfter - Pop the current value off of the top of the FP stack after 347/// the specified instruction. This attempts to be sneaky and combine the pop 348/// into the instruction itself if possible. The iterator is left pointing to 349/// the last instruction, be it a new pop instruction inserted, or the old 350/// instruction if it was modified in place. 351/// 352void FPS::popStackAfter(MachineBasicBlock::iterator &I) { 353 ASSERT_SORTED(PopTable); 354 assert(StackTop > 0 && "Cannot pop empty stack!"); 355 RegMap[Stack[--StackTop]] = ~0; // Update state 356 357 // Check to see if there is a popping version of this instruction... 358 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode()); 359 if (Opcode != -1) { 360 I->setOpcode(Opcode); 361 if (Opcode == X86::FUCOMPPr) 362 I->RemoveOperand(0); 363 364 } else { // Insert an explicit pop 365 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(X86::ST0); 366 } 367} 368 369/// freeStackSlotAfter - Free the specified register from the register stack, so 370/// that it is no longer in a register. If the register is currently at the top 371/// of the stack, we just pop the current instruction, otherwise we store the 372/// current top-of-stack into the specified slot, then pop the top of stack. 373void FPS::freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned FPRegNo) { 374 if (getStackEntry(0) == FPRegNo) { // already at the top of stack? easy. 375 popStackAfter(I); 376 return; 377 } 378 379 // Otherwise, store the top of stack into the dead slot, killing the operand 380 // without having to add in an explicit xchg then pop. 381 // 382 unsigned STReg = getSTReg(FPRegNo); 383 unsigned OldSlot = getSlot(FPRegNo); 384 unsigned TopReg = Stack[StackTop-1]; 385 Stack[OldSlot] = TopReg; 386 RegMap[TopReg] = OldSlot; 387 RegMap[FPRegNo] = ~0; 388 Stack[--StackTop] = ~0; 389 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(STReg); 390} 391 392 393static unsigned getFPReg(const MachineOperand &MO) { 394 assert(MO.isRegister() && "Expected an FP register!"); 395 unsigned Reg = MO.getReg(); 396 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); 397 return Reg - X86::FP0; 398} 399 400 401//===----------------------------------------------------------------------===// 402// Instruction transformation implementation 403//===----------------------------------------------------------------------===// 404 405/// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem> 406/// 407void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) { 408 MachineInstr *MI = I; 409 unsigned DestReg = getFPReg(MI->getOperand(0)); 410 MI->RemoveOperand(0); // Remove the explicit ST(0) operand 411 412 // Result gets pushed on the stack... 413 pushReg(DestReg); 414} 415 416/// handleOneArgFP - fst <mem>, ST(0) 417/// 418void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) { 419 MachineInstr *MI = I; 420 assert((MI->getNumOperands() == 5 || MI->getNumOperands() == 1) && 421 "Can only handle fst* & ftst instructions!"); 422 423 // Is this the last use of the source register? 424 unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1)); 425 bool KillsSrc = false; 426 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 427 E = LV->killed_end(MI); KI != E; ++KI) 428 KillsSrc |= KI->second == X86::FP0+Reg; 429 430 // FSTP80r and FISTP64r are strange because there are no non-popping versions. 431 // If we have one _and_ we don't want to pop the operand, duplicate the value 432 // on the stack instead of moving it. This ensure that popping the value is 433 // always ok. 434 // 435 if ((MI->getOpcode() == X86::FSTP80m || 436 MI->getOpcode() == X86::FISTP64m) && !KillsSrc) { 437 duplicateToTop(Reg, 7 /*temp register*/, I); 438 } else { 439 moveToTop(Reg, I); // Move to the top of the stack... 440 } 441 MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand 442 443 if (MI->getOpcode() == X86::FSTP80m || MI->getOpcode() == X86::FISTP64m) { 444 assert(StackTop > 0 && "Stack empty??"); 445 --StackTop; 446 } else if (KillsSrc) { // Last use of operand? 447 popStackAfter(I); 448 } 449} 450 451 452/// handleOneArgFPRW: Handle instructions that read from the top of stack and 453/// replace the value with a newly computed value. These instructions may have 454/// non-fp operands after their FP operands. 455/// 456/// Examples: 457/// R1 = fchs R2 458/// R1 = fadd R2, [mem] 459/// 460void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) { 461 MachineInstr *MI = I; 462 assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!"); 463 464 // Is this the last use of the source register? 465 unsigned Reg = getFPReg(MI->getOperand(1)); 466 bool KillsSrc = false; 467 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 468 E = LV->killed_end(MI); KI != E; ++KI) 469 KillsSrc |= KI->second == X86::FP0+Reg; 470 471 if (KillsSrc) { 472 // If this is the last use of the source register, just make sure it's on 473 // the top of the stack. 474 moveToTop(Reg, I); 475 assert(StackTop > 0 && "Stack cannot be empty!"); 476 --StackTop; 477 pushReg(getFPReg(MI->getOperand(0))); 478 } else { 479 // If this is not the last use of the source register, _copy_ it to the top 480 // of the stack. 481 duplicateToTop(Reg, getFPReg(MI->getOperand(0)), I); 482 } 483 484 MI->RemoveOperand(1); // Drop the source operand. 485 MI->RemoveOperand(0); // Drop the destination operand. 486} 487 488 489//===----------------------------------------------------------------------===// 490// Define tables of various ways to map pseudo instructions 491// 492 493// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i) 494static const TableEntry ForwardST0Table[] = { 495 { X86::FpADD, X86::FADDST0r }, 496 { X86::FpDIV, X86::FDIVST0r }, 497 { X86::FpMUL, X86::FMULST0r }, 498 { X86::FpSUB, X86::FSUBST0r }, 499 { X86::FpUCOM, X86::FUCOMr }, 500}; 501 502// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0) 503static const TableEntry ReverseST0Table[] = { 504 { X86::FpADD, X86::FADDST0r }, // commutative 505 { X86::FpDIV, X86::FDIVRST0r }, 506 { X86::FpMUL, X86::FMULST0r }, // commutative 507 { X86::FpSUB, X86::FSUBRST0r }, 508 { X86::FpUCOM, ~0 }, 509}; 510 511// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i) 512static const TableEntry ForwardSTiTable[] = { 513 { X86::FpADD, X86::FADDrST0 }, // commutative 514 { X86::FpDIV, X86::FDIVRrST0 }, 515 { X86::FpMUL, X86::FMULrST0 }, // commutative 516 { X86::FpSUB, X86::FSUBRrST0 }, 517 { X86::FpUCOM, X86::FUCOMr }, 518}; 519 520// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0) 521static const TableEntry ReverseSTiTable[] = { 522 { X86::FpADD, X86::FADDrST0 }, 523 { X86::FpDIV, X86::FDIVrST0 }, 524 { X86::FpMUL, X86::FMULrST0 }, 525 { X86::FpSUB, X86::FSUBrST0 }, 526 { X86::FpUCOM, ~0 }, 527}; 528 529 530/// handleTwoArgFP - Handle instructions like FADD and friends which are virtual 531/// instructions which need to be simplified and possibly transformed. 532/// 533/// Result: ST(0) = fsub ST(0), ST(i) 534/// ST(i) = fsub ST(0), ST(i) 535/// ST(0) = fsubr ST(0), ST(i) 536/// ST(i) = fsubr ST(0), ST(i) 537/// 538/// In addition to three address instructions, this also handles the FpUCOM 539/// instruction which only has two operands, but no destination. This 540/// instruction is also annoying because there is no "reverse" form of it 541/// available. 542/// 543void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) { 544 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 545 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 546 MachineInstr *MI = I; 547 548 unsigned NumOperands = MI->getNumOperands(); 549 assert(NumOperands == 3 || 550 (NumOperands == 2 && MI->getOpcode() == X86::FpUCOM) && 551 "Illegal TwoArgFP instruction!"); 552 unsigned Dest = getFPReg(MI->getOperand(0)); 553 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 554 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 555 bool KillsOp0 = false, KillsOp1 = false; 556 557 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 558 E = LV->killed_end(MI); KI != E; ++KI) { 559 KillsOp0 |= (KI->second == X86::FP0+Op0); 560 KillsOp1 |= (KI->second == X86::FP0+Op1); 561 } 562 563 // If this is an FpUCOM instruction, we must make sure the first operand is on 564 // the top of stack, the other one can be anywhere... 565 if (MI->getOpcode() == X86::FpUCOM) 566 moveToTop(Op0, I); 567 568 unsigned TOS = getStackEntry(0); 569 570 // One of our operands must be on the top of the stack. If neither is yet, we 571 // need to move one. 572 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? 573 // We can choose to move either operand to the top of the stack. If one of 574 // the operands is killed by this instruction, we want that one so that we 575 // can update right on top of the old version. 576 if (KillsOp0) { 577 moveToTop(Op0, I); // Move dead operand to TOS. 578 TOS = Op0; 579 } else if (KillsOp1) { 580 moveToTop(Op1, I); 581 TOS = Op1; 582 } else { 583 // All of the operands are live after this instruction executes, so we 584 // cannot update on top of any operand. Because of this, we must 585 // duplicate one of the stack elements to the top. It doesn't matter 586 // which one we pick. 587 // 588 duplicateToTop(Op0, Dest, I); 589 Op0 = TOS = Dest; 590 KillsOp0 = true; 591 } 592 } else if (!KillsOp0 && !KillsOp1 && MI->getOpcode() != X86::FpUCOM) { 593 // If we DO have one of our operands at the top of the stack, but we don't 594 // have a dead operand, we must duplicate one of the operands to a new slot 595 // on the stack. 596 duplicateToTop(Op0, Dest, I); 597 Op0 = TOS = Dest; 598 KillsOp0 = true; 599 } 600 601 // Now we know that one of our operands is on the top of the stack, and at 602 // least one of our operands is killed by this instruction. 603 assert((TOS == Op0 || TOS == Op1) && 604 (KillsOp0 || KillsOp1 || MI->getOpcode() == X86::FpUCOM) && 605 "Stack conditions not set up right!"); 606 607 // We decide which form to use based on what is on the top of the stack, and 608 // which operand is killed by this instruction. 609 const TableEntry *InstTable; 610 bool isForward = TOS == Op0; 611 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0); 612 if (updateST0) { 613 if (isForward) 614 InstTable = ForwardST0Table; 615 else 616 InstTable = ReverseST0Table; 617 } else { 618 if (isForward) 619 InstTable = ForwardSTiTable; 620 else 621 InstTable = ReverseSTiTable; 622 } 623 624 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode()); 625 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!"); 626 627 // NotTOS - The register which is not on the top of stack... 628 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; 629 630 // Replace the old instruction with a new instruction 631 MBB->remove(I++); 632 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(NotTOS)); 633 634 // If both operands are killed, pop one off of the stack in addition to 635 // overwriting the other one. 636 if (KillsOp0 && KillsOp1 && Op0 != Op1) { 637 assert(!updateST0 && "Should have updated other operand!"); 638 popStackAfter(I); // Pop the top of stack 639 } 640 641 // Insert an explicit pop of the "updated" operand for FUCOM 642 if (MI->getOpcode() == X86::FpUCOM) { 643 if (KillsOp0 && !KillsOp1) 644 popStackAfter(I); // If we kill the first operand, pop it! 645 else if (KillsOp1 && Op0 != Op1) 646 freeStackSlotAfter(I, Op1); 647 } 648 649 // Update stack information so that we know the destination register is now on 650 // the stack. 651 if (MI->getOpcode() != X86::FpUCOM) { 652 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS); 653 assert(UpdatedSlot < StackTop && Dest < 7); 654 Stack[UpdatedSlot] = Dest; 655 RegMap[Dest] = UpdatedSlot; 656 } 657 delete MI; // Remove the old instruction 658} 659 660/// handleCondMovFP - Handle two address conditional move instructions. These 661/// instructions move a st(i) register to st(0) iff a condition is true. These 662/// instructions require that the first operand is at the top of the stack, but 663/// otherwise don't modify the stack at all. 664void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) { 665 MachineInstr *MI = I; 666 667 unsigned Op0 = getFPReg(MI->getOperand(0)); 668 unsigned Op1 = getFPReg(MI->getOperand(1)); 669 670 // The first operand *must* be on the top of the stack. 671 moveToTop(Op0, I); 672 673 // Change the second operand to the stack register that the operand is in. 674 MI->RemoveOperand(0); 675 MI->getOperand(0).setReg(getSTReg(Op1)); 676 677 // If we kill the second operand, make sure to pop it from the stack. 678 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 679 E = LV->killed_end(MI); KI != E; ++KI) 680 if (KI->second == X86::FP0+Op1) { 681 // Get this value off of the register stack. 682 freeStackSlotAfter(I, Op1); 683 break; 684 } 685} 686 687 688/// handleSpecialFP - Handle special instructions which behave unlike other 689/// floating point instructions. This is primarily intended for use by pseudo 690/// instructions. 691/// 692void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { 693 MachineInstr *MI = I; 694 switch (MI->getOpcode()) { 695 default: assert(0 && "Unknown SpecialFP instruction!"); 696 case X86::FpGETRESULT: // Appears immediately after a call returning FP type! 697 assert(StackTop == 0 && "Stack should be empty after a call!"); 698 pushReg(getFPReg(MI->getOperand(0))); 699 break; 700 case X86::FpSETRESULT: 701 assert(StackTop == 1 && "Stack should have one element on it to return!"); 702 --StackTop; // "Forget" we have something on the top of stack! 703 break; 704 case X86::FpMOV: { 705 unsigned SrcReg = getFPReg(MI->getOperand(1)); 706 unsigned DestReg = getFPReg(MI->getOperand(0)); 707 bool KillsSrc = false; 708 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 709 E = LV->killed_end(MI); KI != E; ++KI) 710 KillsSrc |= KI->second == X86::FP0+SrcReg; 711 712 if (KillsSrc) { 713 // If the input operand is killed, we can just change the owner of the 714 // incoming stack slot into the result. 715 unsigned Slot = getSlot(SrcReg); 716 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!"); 717 Stack[Slot] = DestReg; 718 RegMap[DestReg] = Slot; 719 720 } else { 721 // For FMOV we just duplicate the specified value to a new stack slot. 722 // This could be made better, but would require substantial changes. 723 duplicateToTop(SrcReg, DestReg, I); 724 } 725 break; 726 } 727 } 728 729 I = MBB->erase(I); // Remove the pseudo instruction 730 --I; 731} 732