X86FloatingPoint.cpp revision d1775798607f12b31dc2fc186312673ff417eadd
1//===-- X86FloatingPoint.cpp - Floating point Reg -> Stack converter ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the pass which converts floating point instructions from 11// virtual registers into register stack instructions. This pass uses live 12// variable information to indicate where the FPn registers are used and their 13// lifetimes. 14// 15// This pass is hampered by the lack of decent CFG manipulation routines for 16// machine code. In particular, this wants to be able to split critical edges 17// as necessary, traverse the machine basic block CFG in depth-first order, and 18// allow there to be multiple machine basic blocks for each LLVM basicblock 19// (needed for critical edge splitting). 20// 21// In particular, this pass currently barfs on critical edges. Because of this, 22// it requires the instruction selector to insert FP_REG_KILL instructions on 23// the exits of any basic block that has critical edges going from it, or which 24// branch to a critical basic block. 25// 26// FIXME: this is not implemented yet. The stackifier pass only works on local 27// basic blocks. 28// 29//===----------------------------------------------------------------------===// 30 31#define DEBUG_TYPE "fp" 32#include "X86.h" 33#include "X86InstrInfo.h" 34#include "llvm/CodeGen/MachineFunctionPass.h" 35#include "llvm/CodeGen/MachineInstrBuilder.h" 36#include "llvm/CodeGen/LiveVariables.h" 37#include "llvm/CodeGen/Passes.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/ADT/DepthFirstIterator.h" 42#include "llvm/ADT/Statistic.h" 43#include "llvm/ADT/STLExtras.h" 44#include <algorithm> 45#include <set> 46using namespace llvm; 47 48namespace { 49 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted"); 50 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions"); 51 52 struct FPS : public MachineFunctionPass { 53 virtual bool runOnMachineFunction(MachineFunction &MF); 54 55 virtual const char *getPassName() const { return "X86 FP Stackifier"; } 56 57 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 58 AU.addRequired<LiveVariables>(); 59 MachineFunctionPass::getAnalysisUsage(AU); 60 } 61 private: 62 LiveVariables *LV; // Live variable info for current function... 63 MachineBasicBlock *MBB; // Current basic block 64 unsigned Stack[8]; // FP<n> Registers in each stack slot... 65 unsigned RegMap[8]; // Track which stack slot contains each register 66 unsigned StackTop; // The current top of the FP stack. 67 68 void dumpStack() const { 69 std::cerr << "Stack contents:"; 70 for (unsigned i = 0; i != StackTop; ++i) { 71 std::cerr << " FP" << Stack[i]; 72 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!"); 73 } 74 std::cerr << "\n"; 75 } 76 private: 77 // getSlot - Return the stack slot number a particular register number is 78 // in... 79 unsigned getSlot(unsigned RegNo) const { 80 assert(RegNo < 8 && "Regno out of range!"); 81 return RegMap[RegNo]; 82 } 83 84 // getStackEntry - Return the X86::FP<n> register in register ST(i) 85 unsigned getStackEntry(unsigned STi) const { 86 assert(STi < StackTop && "Access past stack top!"); 87 return Stack[StackTop-1-STi]; 88 } 89 90 // getSTReg - Return the X86::ST(i) register which contains the specified 91 // FP<RegNo> register 92 unsigned getSTReg(unsigned RegNo) const { 93 return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0; 94 } 95 96 // pushReg - Push the specified FP<n> register onto the stack 97 void pushReg(unsigned Reg) { 98 assert(Reg < 8 && "Register number out of range!"); 99 assert(StackTop < 8 && "Stack overflow!"); 100 Stack[StackTop] = Reg; 101 RegMap[Reg] = StackTop++; 102 } 103 104 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; } 105 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) { 106 if (!isAtTop(RegNo)) { 107 unsigned Slot = getSlot(RegNo); 108 unsigned STReg = getSTReg(RegNo); 109 unsigned RegOnTop = getStackEntry(0); 110 111 // Swap the slots the regs are in 112 std::swap(RegMap[RegNo], RegMap[RegOnTop]); 113 114 // Swap stack slot contents 115 assert(RegMap[RegOnTop] < StackTop); 116 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]); 117 118 // Emit an fxch to update the runtime processors version of the state 119 BuildMI(*MBB, I, X86::FXCH, 1).addReg(STReg); 120 NumFXCH++; 121 } 122 } 123 124 void duplicateToTop(unsigned RegNo, unsigned AsReg, MachineInstr *I) { 125 unsigned STReg = getSTReg(RegNo); 126 pushReg(AsReg); // New register on top of stack 127 128 BuildMI(*MBB, I, X86::FLDrr, 1).addReg(STReg); 129 } 130 131 // popStackAfter - Pop the current value off of the top of the FP stack 132 // after the specified instruction. 133 void popStackAfter(MachineBasicBlock::iterator &I); 134 135 // freeStackSlotAfter - Free the specified register from the register stack, 136 // so that it is no longer in a register. If the register is currently at 137 // the top of the stack, we just pop the current instruction, otherwise we 138 // store the current top-of-stack into the specified slot, then pop the top 139 // of stack. 140 void freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned Reg); 141 142 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); 143 144 void handleZeroArgFP(MachineBasicBlock::iterator &I); 145 void handleOneArgFP(MachineBasicBlock::iterator &I); 146 void handleOneArgFPRW(MachineBasicBlock::iterator &I); 147 void handleTwoArgFP(MachineBasicBlock::iterator &I); 148 void handleCompareFP(MachineBasicBlock::iterator &I); 149 void handleCondMovFP(MachineBasicBlock::iterator &I); 150 void handleSpecialFP(MachineBasicBlock::iterator &I); 151 }; 152} 153 154FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } 155 156/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP 157/// register references into FP stack references. 158/// 159bool FPS::runOnMachineFunction(MachineFunction &MF) { 160 // We only need to run this pass if there are any FP registers used in this 161 // function. If it is all integer, there is nothing for us to do! 162 const bool *PhysRegsUsed = MF.getUsedPhysregs(); 163 bool FPIsUsed = false; 164 165 assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!"); 166 for (unsigned i = 0; i <= 6; ++i) 167 if (PhysRegsUsed[X86::FP0+i]) { 168 FPIsUsed = true; 169 break; 170 } 171 172 // Early exit. 173 if (!FPIsUsed) return false; 174 175 LV = &getAnalysis<LiveVariables>(); 176 StackTop = 0; 177 178 // Process the function in depth first order so that we process at least one 179 // of the predecessors for every reachable block in the function. 180 std::set<MachineBasicBlock*> Processed; 181 MachineBasicBlock *Entry = MF.begin(); 182 183 bool Changed = false; 184 for (df_ext_iterator<MachineBasicBlock*, std::set<MachineBasicBlock*> > 185 I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed); 186 I != E; ++I) 187 Changed |= processBasicBlock(MF, **I); 188 189 return Changed; 190} 191 192/// processBasicBlock - Loop over all of the instructions in the basic block, 193/// transforming FP instructions into their stack form. 194/// 195bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { 196 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 197 bool Changed = false; 198 MBB = &BB; 199 200 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) { 201 MachineInstr *MI = I; 202 unsigned Flags = TII.get(MI->getOpcode()).TSFlags; 203 if ((Flags & X86II::FPTypeMask) == X86II::NotFP) 204 continue; // Efficiently ignore non-fp insts! 205 206 MachineInstr *PrevMI = 0; 207 if (I != BB.begin()) 208 PrevMI = prior(I); 209 210 ++NumFP; // Keep track of # of pseudo instrs 211 DEBUG(std::cerr << "\nFPInst:\t"; MI->print(std::cerr, &(MF.getTarget()))); 212 213 // Get dead variables list now because the MI pointer may be deleted as part 214 // of processing! 215 LiveVariables::killed_iterator IB, IE; 216 tie(IB, IE) = LV->dead_range(MI); 217 218 DEBUG( 219 const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo(); 220 LiveVariables::killed_iterator I = LV->killed_begin(MI); 221 LiveVariables::killed_iterator E = LV->killed_end(MI); 222 if (I != E) { 223 std::cerr << "Killed Operands:"; 224 for (; I != E; ++I) 225 std::cerr << " %" << MRI->getName(*I); 226 std::cerr << "\n"; 227 } 228 ); 229 230 switch (Flags & X86II::FPTypeMask) { 231 case X86II::ZeroArgFP: handleZeroArgFP(I); break; 232 case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0) 233 case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0)) 234 case X86II::TwoArgFP: handleTwoArgFP(I); break; 235 case X86II::CompareFP: handleCompareFP(I); break; 236 case X86II::CondMovFP: handleCondMovFP(I); break; 237 case X86II::SpecialFP: handleSpecialFP(I); break; 238 default: assert(0 && "Unknown FP Type!"); 239 } 240 241 // Check to see if any of the values defined by this instruction are dead 242 // after definition. If so, pop them. 243 for (; IB != IE; ++IB) { 244 unsigned Reg = *IB; 245 if (Reg >= X86::FP0 && Reg <= X86::FP6) { 246 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n"); 247 freeStackSlotAfter(I, Reg-X86::FP0); 248 } 249 } 250 251 // Print out all of the instructions expanded to if -debug 252 DEBUG( 253 MachineBasicBlock::iterator PrevI(PrevMI); 254 if (I == PrevI) { 255 std::cerr << "Just deleted pseudo instruction\n"; 256 } else { 257 MachineBasicBlock::iterator Start = I; 258 // Rewind to first instruction newly inserted. 259 while (Start != BB.begin() && prior(Start) != PrevI) --Start; 260 std::cerr << "Inserted instructions:\n\t"; 261 Start->print(std::cerr, &MF.getTarget()); 262 while (++Start != next(I)); 263 } 264 dumpStack(); 265 ); 266 267 Changed = true; 268 } 269 270 assert(StackTop == 0 && "Stack not empty at end of basic block?"); 271 return Changed; 272} 273 274//===----------------------------------------------------------------------===// 275// Efficient Lookup Table Support 276//===----------------------------------------------------------------------===// 277 278namespace { 279 struct TableEntry { 280 unsigned from; 281 unsigned to; 282 bool operator<(const TableEntry &TE) const { return from < TE.from; } 283 bool operator<(unsigned V) const { return from < V; } 284 }; 285} 286 287static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { 288 for (unsigned i = 0; i != NumEntries-1; ++i) 289 if (!(Table[i] < Table[i+1])) return false; 290 return true; 291} 292 293static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) { 294 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode); 295 if (I != Table+N && I->from == Opcode) 296 return I->to; 297 return -1; 298} 299 300#define ARRAY_SIZE(TABLE) \ 301 (sizeof(TABLE)/sizeof(TABLE[0])) 302 303#ifdef NDEBUG 304#define ASSERT_SORTED(TABLE) 305#else 306#define ASSERT_SORTED(TABLE) \ 307 { static bool TABLE##Checked = false; \ 308 if (!TABLE##Checked) \ 309 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \ 310 "All lookup tables must be sorted for efficient access!"); \ 311 } 312#endif 313 314 315//===----------------------------------------------------------------------===// 316// Helper Methods 317//===----------------------------------------------------------------------===// 318 319// PopTable - Sorted map of instructions to their popping version. The first 320// element is an instruction, the second is the version which pops. 321// 322static const TableEntry PopTable[] = { 323 { X86::FADDrST0 , X86::FADDPrST0 }, 324 325 { X86::FDIVRrST0, X86::FDIVRPrST0 }, 326 { X86::FDIVrST0 , X86::FDIVPrST0 }, 327 328 { X86::FIST16m , X86::FISTP16m }, 329 { X86::FIST32m , X86::FISTP32m }, 330 331 { X86::FMULrST0 , X86::FMULPrST0 }, 332 333 { X86::FST32m , X86::FSTP32m }, 334 { X86::FST64m , X86::FSTP64m }, 335 { X86::FSTrr , X86::FSTPrr }, 336 337 { X86::FSUBRrST0, X86::FSUBRPrST0 }, 338 { X86::FSUBrST0 , X86::FSUBPrST0 }, 339 340 { X86::FUCOMIr , X86::FUCOMIPr }, 341 342 { X86::FUCOMPr , X86::FUCOMPPr }, 343 { X86::FUCOMr , X86::FUCOMPr }, 344}; 345 346/// popStackAfter - Pop the current value off of the top of the FP stack after 347/// the specified instruction. This attempts to be sneaky and combine the pop 348/// into the instruction itself if possible. The iterator is left pointing to 349/// the last instruction, be it a new pop instruction inserted, or the old 350/// instruction if it was modified in place. 351/// 352void FPS::popStackAfter(MachineBasicBlock::iterator &I) { 353 ASSERT_SORTED(PopTable); 354 assert(StackTop > 0 && "Cannot pop empty stack!"); 355 RegMap[Stack[--StackTop]] = ~0; // Update state 356 357 // Check to see if there is a popping version of this instruction... 358 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode()); 359 if (Opcode != -1) { 360 I->setOpcode(Opcode); 361 if (Opcode == X86::FUCOMPPr) 362 I->RemoveOperand(0); 363 364 } else { // Insert an explicit pop 365 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(X86::ST0); 366 } 367} 368 369/// freeStackSlotAfter - Free the specified register from the register stack, so 370/// that it is no longer in a register. If the register is currently at the top 371/// of the stack, we just pop the current instruction, otherwise we store the 372/// current top-of-stack into the specified slot, then pop the top of stack. 373void FPS::freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned FPRegNo) { 374 if (getStackEntry(0) == FPRegNo) { // already at the top of stack? easy. 375 popStackAfter(I); 376 return; 377 } 378 379 // Otherwise, store the top of stack into the dead slot, killing the operand 380 // without having to add in an explicit xchg then pop. 381 // 382 unsigned STReg = getSTReg(FPRegNo); 383 unsigned OldSlot = getSlot(FPRegNo); 384 unsigned TopReg = Stack[StackTop-1]; 385 Stack[OldSlot] = TopReg; 386 RegMap[TopReg] = OldSlot; 387 RegMap[FPRegNo] = ~0; 388 Stack[--StackTop] = ~0; 389 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(STReg); 390} 391 392 393static unsigned getFPReg(const MachineOperand &MO) { 394 assert(MO.isRegister() && "Expected an FP register!"); 395 unsigned Reg = MO.getReg(); 396 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); 397 return Reg - X86::FP0; 398} 399 400 401//===----------------------------------------------------------------------===// 402// Instruction transformation implementation 403//===----------------------------------------------------------------------===// 404 405/// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem> 406/// 407void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) { 408 MachineInstr *MI = I; 409 unsigned DestReg = getFPReg(MI->getOperand(0)); 410 MI->RemoveOperand(0); // Remove the explicit ST(0) operand 411 412 // Result gets pushed on the stack... 413 pushReg(DestReg); 414} 415 416/// handleOneArgFP - fst <mem>, ST(0) 417/// 418void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) { 419 MachineInstr *MI = I; 420 assert((MI->getNumOperands() == 5 || MI->getNumOperands() == 1) && 421 "Can only handle fst* & ftst instructions!"); 422 423 // Is this the last use of the source register? 424 unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1)); 425 bool KillsSrc = LV->KillsRegister(MI, X86::FP0+Reg); 426 427 // FSTP80r and FISTP64r are strange because there are no non-popping versions. 428 // If we have one _and_ we don't want to pop the operand, duplicate the value 429 // on the stack instead of moving it. This ensure that popping the value is 430 // always ok. 431 // 432 if ((MI->getOpcode() == X86::FSTP80m || 433 MI->getOpcode() == X86::FISTP64m) && !KillsSrc) { 434 duplicateToTop(Reg, 7 /*temp register*/, I); 435 } else { 436 moveToTop(Reg, I); // Move to the top of the stack... 437 } 438 MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand 439 440 if (MI->getOpcode() == X86::FSTP80m || MI->getOpcode() == X86::FISTP64m) { 441 assert(StackTop > 0 && "Stack empty??"); 442 --StackTop; 443 } else if (KillsSrc) { // Last use of operand? 444 popStackAfter(I); 445 } 446} 447 448 449/// handleOneArgFPRW: Handle instructions that read from the top of stack and 450/// replace the value with a newly computed value. These instructions may have 451/// non-fp operands after their FP operands. 452/// 453/// Examples: 454/// R1 = fchs R2 455/// R1 = fadd R2, [mem] 456/// 457void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) { 458 MachineInstr *MI = I; 459 assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!"); 460 461 // Is this the last use of the source register? 462 unsigned Reg = getFPReg(MI->getOperand(1)); 463 bool KillsSrc = LV->KillsRegister(MI, X86::FP0+Reg); 464 465 if (KillsSrc) { 466 // If this is the last use of the source register, just make sure it's on 467 // the top of the stack. 468 moveToTop(Reg, I); 469 assert(StackTop > 0 && "Stack cannot be empty!"); 470 --StackTop; 471 pushReg(getFPReg(MI->getOperand(0))); 472 } else { 473 // If this is not the last use of the source register, _copy_ it to the top 474 // of the stack. 475 duplicateToTop(Reg, getFPReg(MI->getOperand(0)), I); 476 } 477 478 MI->RemoveOperand(1); // Drop the source operand. 479 MI->RemoveOperand(0); // Drop the destination operand. 480} 481 482 483//===----------------------------------------------------------------------===// 484// Define tables of various ways to map pseudo instructions 485// 486 487// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i) 488static const TableEntry ForwardST0Table[] = { 489 { X86::FpADD , X86::FADDST0r }, 490 { X86::FpDIV , X86::FDIVST0r }, 491 { X86::FpMUL , X86::FMULST0r }, 492 { X86::FpSUB , X86::FSUBST0r }, 493}; 494 495// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0) 496static const TableEntry ReverseST0Table[] = { 497 { X86::FpADD , X86::FADDST0r }, // commutative 498 { X86::FpDIV , X86::FDIVRST0r }, 499 { X86::FpMUL , X86::FMULST0r }, // commutative 500 { X86::FpSUB , X86::FSUBRST0r }, 501}; 502 503// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i) 504static const TableEntry ForwardSTiTable[] = { 505 { X86::FpADD , X86::FADDrST0 }, // commutative 506 { X86::FpDIV , X86::FDIVRrST0 }, 507 { X86::FpMUL , X86::FMULrST0 }, // commutative 508 { X86::FpSUB , X86::FSUBRrST0 }, 509}; 510 511// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0) 512static const TableEntry ReverseSTiTable[] = { 513 { X86::FpADD , X86::FADDrST0 }, 514 { X86::FpDIV , X86::FDIVrST0 }, 515 { X86::FpMUL , X86::FMULrST0 }, 516 { X86::FpSUB , X86::FSUBrST0 }, 517}; 518 519 520/// handleTwoArgFP - Handle instructions like FADD and friends which are virtual 521/// instructions which need to be simplified and possibly transformed. 522/// 523/// Result: ST(0) = fsub ST(0), ST(i) 524/// ST(i) = fsub ST(0), ST(i) 525/// ST(0) = fsubr ST(0), ST(i) 526/// ST(i) = fsubr ST(0), ST(i) 527/// 528void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) { 529 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 530 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 531 MachineInstr *MI = I; 532 533 unsigned NumOperands = MI->getNumOperands(); 534 assert(NumOperands == 3 && "Illegal TwoArgFP instruction!"); 535 unsigned Dest = getFPReg(MI->getOperand(0)); 536 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 537 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 538 bool KillsOp0 = LV->KillsRegister(MI, X86::FP0+Op0); 539 bool KillsOp1 = LV->KillsRegister(MI, X86::FP0+Op1); 540 541 unsigned TOS = getStackEntry(0); 542 543 // One of our operands must be on the top of the stack. If neither is yet, we 544 // need to move one. 545 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? 546 // We can choose to move either operand to the top of the stack. If one of 547 // the operands is killed by this instruction, we want that one so that we 548 // can update right on top of the old version. 549 if (KillsOp0) { 550 moveToTop(Op0, I); // Move dead operand to TOS. 551 TOS = Op0; 552 } else if (KillsOp1) { 553 moveToTop(Op1, I); 554 TOS = Op1; 555 } else { 556 // All of the operands are live after this instruction executes, so we 557 // cannot update on top of any operand. Because of this, we must 558 // duplicate one of the stack elements to the top. It doesn't matter 559 // which one we pick. 560 // 561 duplicateToTop(Op0, Dest, I); 562 Op0 = TOS = Dest; 563 KillsOp0 = true; 564 } 565 } else if (!KillsOp0 && !KillsOp1) { 566 // If we DO have one of our operands at the top of the stack, but we don't 567 // have a dead operand, we must duplicate one of the operands to a new slot 568 // on the stack. 569 duplicateToTop(Op0, Dest, I); 570 Op0 = TOS = Dest; 571 KillsOp0 = true; 572 } 573 574 // Now we know that one of our operands is on the top of the stack, and at 575 // least one of our operands is killed by this instruction. 576 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) && 577 "Stack conditions not set up right!"); 578 579 // We decide which form to use based on what is on the top of the stack, and 580 // which operand is killed by this instruction. 581 const TableEntry *InstTable; 582 bool isForward = TOS == Op0; 583 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0); 584 if (updateST0) { 585 if (isForward) 586 InstTable = ForwardST0Table; 587 else 588 InstTable = ReverseST0Table; 589 } else { 590 if (isForward) 591 InstTable = ForwardSTiTable; 592 else 593 InstTable = ReverseSTiTable; 594 } 595 596 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode()); 597 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!"); 598 599 // NotTOS - The register which is not on the top of stack... 600 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; 601 602 // Replace the old instruction with a new instruction 603 MBB->remove(I++); 604 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(NotTOS)); 605 606 // If both operands are killed, pop one off of the stack in addition to 607 // overwriting the other one. 608 if (KillsOp0 && KillsOp1 && Op0 != Op1) { 609 assert(!updateST0 && "Should have updated other operand!"); 610 popStackAfter(I); // Pop the top of stack 611 } 612 613 // Update stack information so that we know the destination register is now on 614 // the stack. 615 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS); 616 assert(UpdatedSlot < StackTop && Dest < 7); 617 Stack[UpdatedSlot] = Dest; 618 RegMap[Dest] = UpdatedSlot; 619 delete MI; // Remove the old instruction 620} 621 622/// handleCompareFP - Handle FUCOM and FUCOMI instructions, which have two FP 623/// register arguments and no explicit destinations. 624/// 625void FPS::handleCompareFP(MachineBasicBlock::iterator &I) { 626 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 627 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 628 MachineInstr *MI = I; 629 630 unsigned NumOperands = MI->getNumOperands(); 631 assert(NumOperands == 2 && "Illegal FUCOM* instruction!"); 632 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 633 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 634 bool KillsOp0 = LV->KillsRegister(MI, X86::FP0+Op0); 635 bool KillsOp1 = LV->KillsRegister(MI, X86::FP0+Op1); 636 637 // Make sure the first operand is on the top of stack, the other one can be 638 // anywhere. 639 moveToTop(Op0, I); 640 641 MI->getOperand(0).setReg(getSTReg(Op1)); 642 MI->RemoveOperand(1); 643 644 // If any of the operands are killed by this instruction, free them. 645 if (KillsOp0) freeStackSlotAfter(I, Op0); 646 if (KillsOp1 && Op0 != Op1) freeStackSlotAfter(I, Op1); 647} 648 649/// handleCondMovFP - Handle two address conditional move instructions. These 650/// instructions move a st(i) register to st(0) iff a condition is true. These 651/// instructions require that the first operand is at the top of the stack, but 652/// otherwise don't modify the stack at all. 653void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) { 654 MachineInstr *MI = I; 655 656 unsigned Op0 = getFPReg(MI->getOperand(0)); 657 unsigned Op1 = getFPReg(MI->getOperand(1)); 658 659 // The first operand *must* be on the top of the stack. 660 moveToTop(Op0, I); 661 662 // Change the second operand to the stack register that the operand is in. 663 MI->RemoveOperand(0); 664 MI->getOperand(0).setReg(getSTReg(Op1)); 665 666 // If we kill the second operand, make sure to pop it from the stack. 667 if (Op0 != Op1 && LV->KillsRegister(MI, X86::FP0+Op1)) { 668 // Get this value off of the register stack. 669 freeStackSlotAfter(I, Op1); 670 } 671} 672 673 674/// handleSpecialFP - Handle special instructions which behave unlike other 675/// floating point instructions. This is primarily intended for use by pseudo 676/// instructions. 677/// 678void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { 679 MachineInstr *MI = I; 680 switch (MI->getOpcode()) { 681 default: assert(0 && "Unknown SpecialFP instruction!"); 682 case X86::FpGETRESULT: // Appears immediately after a call returning FP type! 683 assert(StackTop == 0 && "Stack should be empty after a call!"); 684 pushReg(getFPReg(MI->getOperand(0))); 685 break; 686 case X86::FpSETRESULT: 687 assert(StackTop == 1 && "Stack should have one element on it to return!"); 688 --StackTop; // "Forget" we have something on the top of stack! 689 break; 690 case X86::FpMOV: { 691 unsigned SrcReg = getFPReg(MI->getOperand(1)); 692 unsigned DestReg = getFPReg(MI->getOperand(0)); 693 694 if (LV->KillsRegister(MI, X86::FP0+SrcReg)) { 695 // If the input operand is killed, we can just change the owner of the 696 // incoming stack slot into the result. 697 unsigned Slot = getSlot(SrcReg); 698 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!"); 699 Stack[Slot] = DestReg; 700 RegMap[DestReg] = Slot; 701 702 } else { 703 // For FMOV we just duplicate the specified value to a new stack slot. 704 // This could be made better, but would require substantial changes. 705 duplicateToTop(SrcReg, DestReg, I); 706 } 707 break; 708 } 709 } 710 711 I = MBB->erase(I); // Remove the pseudo instruction 712 --I; 713} 714