X86FloatingPoint.cpp revision d62d5d7e5bb353785784fc40c088836c4cf160b4
1//===-- FloatingPoint.cpp - Floating point Reg -> Stack converter ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the pass which converts floating point instructions from 11// virtual registers into register stack instructions. This pass uses live 12// variable information to indicate where the FPn registers are used and their 13// lifetimes. 14// 15// This pass is hampered by the lack of decent CFG manipulation routines for 16// machine code. In particular, this wants to be able to split critical edges 17// as necessary, traverse the machine basic block CFG in depth-first order, and 18// allow there to be multiple machine basic blocks for each LLVM basicblock 19// (needed for critical edge splitting). 20// 21// In particular, this pass currently barfs on critical edges. Because of this, 22// it requires the instruction selector to insert FP_REG_KILL instructions on 23// the exits of any basic block that has critical edges going from it, or which 24// branch to a critical basic block. 25// 26// FIXME: this is not implemented yet. The stackifier pass only works on local 27// basic blocks. 28// 29//===----------------------------------------------------------------------===// 30 31#define DEBUG_TYPE "fp" 32#include "X86.h" 33#include "X86InstrInfo.h" 34#include "llvm/CodeGen/MachineFunctionPass.h" 35#include "llvm/CodeGen/MachineInstrBuilder.h" 36#include "llvm/CodeGen/LiveVariables.h" 37#include "llvm/CodeGen/Passes.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "Support/Debug.h" 41#include "Support/DepthFirstIterator.h" 42#include "Support/Statistic.h" 43#include "Support/STLExtras.h" 44#include <algorithm> 45#include <set> 46using namespace llvm; 47 48namespace { 49 Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted"); 50 Statistic<> NumFP ("x86-codegen", "Number of floating point instructions"); 51 52 struct FPS : public MachineFunctionPass { 53 virtual bool runOnMachineFunction(MachineFunction &MF); 54 55 virtual const char *getPassName() const { return "X86 FP Stackifier"; } 56 57 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 58 AU.addRequired<LiveVariables>(); 59 MachineFunctionPass::getAnalysisUsage(AU); 60 } 61 private: 62 LiveVariables *LV; // Live variable info for current function... 63 MachineBasicBlock *MBB; // Current basic block 64 unsigned Stack[8]; // FP<n> Registers in each stack slot... 65 unsigned RegMap[8]; // Track which stack slot contains each register 66 unsigned StackTop; // The current top of the FP stack. 67 68 void dumpStack() const { 69 std::cerr << "Stack contents:"; 70 for (unsigned i = 0; i != StackTop; ++i) { 71 std::cerr << " FP" << Stack[i]; 72 assert(RegMap[Stack[i]] == i && "Stack[] doesn't match RegMap[]!"); 73 } 74 std::cerr << "\n"; 75 } 76 private: 77 // getSlot - Return the stack slot number a particular register number is 78 // in... 79 unsigned getSlot(unsigned RegNo) const { 80 assert(RegNo < 8 && "Regno out of range!"); 81 return RegMap[RegNo]; 82 } 83 84 // getStackEntry - Return the X86::FP<n> register in register ST(i) 85 unsigned getStackEntry(unsigned STi) const { 86 assert(STi < StackTop && "Access past stack top!"); 87 return Stack[StackTop-1-STi]; 88 } 89 90 // getSTReg - Return the X86::ST(i) register which contains the specified 91 // FP<RegNo> register 92 unsigned getSTReg(unsigned RegNo) const { 93 return StackTop - 1 - getSlot(RegNo) + llvm::X86::ST0; 94 } 95 96 // pushReg - Push the specified FP<n> register onto the stack 97 void pushReg(unsigned Reg) { 98 assert(Reg < 8 && "Register number out of range!"); 99 assert(StackTop < 8 && "Stack overflow!"); 100 Stack[StackTop] = Reg; 101 RegMap[Reg] = StackTop++; 102 } 103 104 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; } 105 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator &I) { 106 if (!isAtTop(RegNo)) { 107 unsigned Slot = getSlot(RegNo); 108 unsigned STReg = getSTReg(RegNo); 109 unsigned RegOnTop = getStackEntry(0); 110 111 // Swap the slots the regs are in 112 std::swap(RegMap[RegNo], RegMap[RegOnTop]); 113 114 // Swap stack slot contents 115 assert(RegMap[RegOnTop] < StackTop); 116 std::swap(Stack[RegMap[RegOnTop]], Stack[StackTop-1]); 117 118 // Emit an fxch to update the runtime processors version of the state 119 BuildMI(*MBB, I, X86::FXCH, 1).addReg(STReg); 120 NumFXCH++; 121 } 122 } 123 124 void duplicateToTop(unsigned RegNo, unsigned AsReg, MachineInstr *I) { 125 unsigned STReg = getSTReg(RegNo); 126 pushReg(AsReg); // New register on top of stack 127 128 BuildMI(*MBB, I, X86::FLDrr, 1).addReg(STReg); 129 } 130 131 // popStackAfter - Pop the current value off of the top of the FP stack 132 // after the specified instruction. 133 void popStackAfter(MachineBasicBlock::iterator &I); 134 135 // freeStackSlotAfter - Free the specified register from the register stack, 136 // so that it is no longer in a register. If the register is currently at 137 // the top of the stack, we just pop the current instruction, otherwise we 138 // store the current top-of-stack into the specified slot, then pop the top 139 // of stack. 140 void freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned Reg); 141 142 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); 143 144 void handleZeroArgFP(MachineBasicBlock::iterator &I); 145 void handleOneArgFP(MachineBasicBlock::iterator &I); 146 void handleOneArgFPRW(MachineBasicBlock::iterator &I); 147 void handleTwoArgFP(MachineBasicBlock::iterator &I); 148 void handleCompareFP(MachineBasicBlock::iterator &I); 149 void handleCondMovFP(MachineBasicBlock::iterator &I); 150 void handleSpecialFP(MachineBasicBlock::iterator &I); 151 }; 152} 153 154FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } 155 156/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP 157/// register references into FP stack references. 158/// 159bool FPS::runOnMachineFunction(MachineFunction &MF) { 160 LV = &getAnalysis<LiveVariables>(); 161 StackTop = 0; 162 163 // Process the function in depth first order so that we process at least one 164 // of the predecessors for every reachable block in the function. 165 std::set<MachineBasicBlock*> Processed; 166 MachineBasicBlock *Entry = MF.begin(); 167 168 bool Changed = false; 169 for (df_ext_iterator<MachineBasicBlock*, std::set<MachineBasicBlock*> > 170 I = df_ext_begin(Entry, Processed), E = df_ext_end(Entry, Processed); 171 I != E; ++I) 172 Changed |= processBasicBlock(MF, **I); 173 174 return Changed; 175} 176 177/// processBasicBlock - Loop over all of the instructions in the basic block, 178/// transforming FP instructions into their stack form. 179/// 180bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) { 181 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 182 bool Changed = false; 183 MBB = &BB; 184 185 for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) { 186 MachineInstr *MI = I; 187 unsigned Flags = TII.get(MI->getOpcode()).TSFlags; 188 if ((Flags & X86II::FPTypeMask) == X86II::NotFP) 189 continue; // Efficiently ignore non-fp insts! 190 191 MachineInstr *PrevMI = 0; 192 if (I != BB.begin()) 193 PrevMI = prior(I); 194 195 ++NumFP; // Keep track of # of pseudo instrs 196 DEBUG(std::cerr << "\nFPInst:\t"; 197 MI->print(std::cerr, MF.getTarget())); 198 199 // Get dead variables list now because the MI pointer may be deleted as part 200 // of processing! 201 LiveVariables::killed_iterator IB = LV->dead_begin(MI); 202 LiveVariables::killed_iterator IE = LV->dead_end(MI); 203 204 DEBUG(const MRegisterInfo *MRI = MF.getTarget().getRegisterInfo(); 205 LiveVariables::killed_iterator I = LV->killed_begin(MI); 206 LiveVariables::killed_iterator E = LV->killed_end(MI); 207 if (I != E) { 208 std::cerr << "Killed Operands:"; 209 for (; I != E; ++I) 210 std::cerr << " %" << MRI->getName(I->second); 211 std::cerr << "\n"; 212 }); 213 214 switch (Flags & X86II::FPTypeMask) { 215 case X86II::ZeroArgFP: handleZeroArgFP(I); break; 216 case X86II::OneArgFP: handleOneArgFP(I); break; // fstp ST(0) 217 case X86II::OneArgFPRW: handleOneArgFPRW(I); break; // ST(0) = fsqrt(ST(0)) 218 case X86II::TwoArgFP: 219 if (I->getOpcode() != X86::FpUCOM && I->getOpcode() != X86::FpUCOMI) 220 handleTwoArgFP(I); 221 else 222 handleCompareFP(I); 223 break; 224 case X86II::CondMovFP: handleCondMovFP(I); break; 225 case X86II::SpecialFP: handleSpecialFP(I); break; 226 default: assert(0 && "Unknown FP Type!"); 227 } 228 229 // Check to see if any of the values defined by this instruction are dead 230 // after definition. If so, pop them. 231 for (; IB != IE; ++IB) { 232 unsigned Reg = IB->second; 233 if (Reg >= X86::FP0 && Reg <= X86::FP6) { 234 DEBUG(std::cerr << "Register FP#" << Reg-X86::FP0 << " is dead!\n"); 235 freeStackSlotAfter(I, Reg-X86::FP0); 236 } 237 } 238 239 // Print out all of the instructions expanded to if -debug 240 DEBUG( 241 MachineBasicBlock::iterator PrevI(PrevMI); 242 if (I == PrevI) { 243 std::cerr << "Just deleted pseudo instruction\n"; 244 } else { 245 MachineBasicBlock::iterator Start = I; 246 // Rewind to first instruction newly inserted. 247 while (Start != BB.begin() && prior(Start) != PrevI) --Start; 248 std::cerr << "Inserted instructions:\n\t"; 249 Start->print(std::cerr, MF.getTarget()); 250 while (++Start != next(I)); 251 } 252 dumpStack(); 253 ); 254 255 Changed = true; 256 } 257 258 assert(StackTop == 0 && "Stack not empty at end of basic block?"); 259 return Changed; 260} 261 262//===----------------------------------------------------------------------===// 263// Efficient Lookup Table Support 264//===----------------------------------------------------------------------===// 265 266namespace { 267 struct TableEntry { 268 unsigned from; 269 unsigned to; 270 bool operator<(const TableEntry &TE) const { return from < TE.from; } 271 bool operator<(unsigned V) const { return from < V; } 272 }; 273} 274 275static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) { 276 for (unsigned i = 0; i != NumEntries-1; ++i) 277 if (!(Table[i] < Table[i+1])) return false; 278 return true; 279} 280 281static int Lookup(const TableEntry *Table, unsigned N, unsigned Opcode) { 282 const TableEntry *I = std::lower_bound(Table, Table+N, Opcode); 283 if (I != Table+N && I->from == Opcode) 284 return I->to; 285 return -1; 286} 287 288#define ARRAY_SIZE(TABLE) \ 289 (sizeof(TABLE)/sizeof(TABLE[0])) 290 291#ifdef NDEBUG 292#define ASSERT_SORTED(TABLE) 293#else 294#define ASSERT_SORTED(TABLE) \ 295 { static bool TABLE##Checked = false; \ 296 if (!TABLE##Checked) \ 297 assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) && \ 298 "All lookup tables must be sorted for efficient access!"); \ 299 } 300#endif 301 302 303//===----------------------------------------------------------------------===// 304// Helper Methods 305//===----------------------------------------------------------------------===// 306 307// PopTable - Sorted map of instructions to their popping version. The first 308// element is an instruction, the second is the version which pops. 309// 310static const TableEntry PopTable[] = { 311 { X86::FADDrST0 , X86::FADDPrST0 }, 312 313 { X86::FDIVRrST0, X86::FDIVRPrST0 }, 314 { X86::FDIVrST0 , X86::FDIVPrST0 }, 315 316 { X86::FIST16m , X86::FISTP16m }, 317 { X86::FIST32m , X86::FISTP32m }, 318 319 { X86::FMULrST0 , X86::FMULPrST0 }, 320 321 { X86::FST32m , X86::FSTP32m }, 322 { X86::FST64m , X86::FSTP64m }, 323 { X86::FSTrr , X86::FSTPrr }, 324 325 { X86::FSUBRrST0, X86::FSUBRPrST0 }, 326 { X86::FSUBrST0 , X86::FSUBPrST0 }, 327 328 { X86::FUCOMIr , X86::FUCOMIPr }, 329 330 { X86::FUCOMPr , X86::FUCOMPPr }, 331 { X86::FUCOMr , X86::FUCOMPr }, 332}; 333 334/// popStackAfter - Pop the current value off of the top of the FP stack after 335/// the specified instruction. This attempts to be sneaky and combine the pop 336/// into the instruction itself if possible. The iterator is left pointing to 337/// the last instruction, be it a new pop instruction inserted, or the old 338/// instruction if it was modified in place. 339/// 340void FPS::popStackAfter(MachineBasicBlock::iterator &I) { 341 ASSERT_SORTED(PopTable); 342 assert(StackTop > 0 && "Cannot pop empty stack!"); 343 RegMap[Stack[--StackTop]] = ~0; // Update state 344 345 // Check to see if there is a popping version of this instruction... 346 int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode()); 347 if (Opcode != -1) { 348 I->setOpcode(Opcode); 349 if (Opcode == X86::FUCOMPPr) 350 I->RemoveOperand(0); 351 352 } else { // Insert an explicit pop 353 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(X86::ST0); 354 } 355} 356 357/// freeStackSlotAfter - Free the specified register from the register stack, so 358/// that it is no longer in a register. If the register is currently at the top 359/// of the stack, we just pop the current instruction, otherwise we store the 360/// current top-of-stack into the specified slot, then pop the top of stack. 361void FPS::freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned FPRegNo) { 362 if (getStackEntry(0) == FPRegNo) { // already at the top of stack? easy. 363 popStackAfter(I); 364 return; 365 } 366 367 // Otherwise, store the top of stack into the dead slot, killing the operand 368 // without having to add in an explicit xchg then pop. 369 // 370 unsigned STReg = getSTReg(FPRegNo); 371 unsigned OldSlot = getSlot(FPRegNo); 372 unsigned TopReg = Stack[StackTop-1]; 373 Stack[OldSlot] = TopReg; 374 RegMap[TopReg] = OldSlot; 375 RegMap[FPRegNo] = ~0; 376 Stack[--StackTop] = ~0; 377 I = BuildMI(*MBB, ++I, X86::FSTPrr, 1).addReg(STReg); 378} 379 380 381static unsigned getFPReg(const MachineOperand &MO) { 382 assert(MO.isRegister() && "Expected an FP register!"); 383 unsigned Reg = MO.getReg(); 384 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); 385 return Reg - X86::FP0; 386} 387 388 389//===----------------------------------------------------------------------===// 390// Instruction transformation implementation 391//===----------------------------------------------------------------------===// 392 393/// handleZeroArgFP - ST(0) = fld0 ST(0) = flds <mem> 394/// 395void FPS::handleZeroArgFP(MachineBasicBlock::iterator &I) { 396 MachineInstr *MI = I; 397 unsigned DestReg = getFPReg(MI->getOperand(0)); 398 MI->RemoveOperand(0); // Remove the explicit ST(0) operand 399 400 // Result gets pushed on the stack... 401 pushReg(DestReg); 402} 403 404/// handleOneArgFP - fst <mem>, ST(0) 405/// 406void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) { 407 MachineInstr *MI = I; 408 assert((MI->getNumOperands() == 5 || MI->getNumOperands() == 1) && 409 "Can only handle fst* & ftst instructions!"); 410 411 // Is this the last use of the source register? 412 unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1)); 413 bool KillsSrc = false; 414 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 415 E = LV->killed_end(MI); KI != E; ++KI) 416 KillsSrc |= KI->second == X86::FP0+Reg; 417 418 // FSTP80r and FISTP64r are strange because there are no non-popping versions. 419 // If we have one _and_ we don't want to pop the operand, duplicate the value 420 // on the stack instead of moving it. This ensure that popping the value is 421 // always ok. 422 // 423 if ((MI->getOpcode() == X86::FSTP80m || 424 MI->getOpcode() == X86::FISTP64m) && !KillsSrc) { 425 duplicateToTop(Reg, 7 /*temp register*/, I); 426 } else { 427 moveToTop(Reg, I); // Move to the top of the stack... 428 } 429 MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand 430 431 if (MI->getOpcode() == X86::FSTP80m || MI->getOpcode() == X86::FISTP64m) { 432 assert(StackTop > 0 && "Stack empty??"); 433 --StackTop; 434 } else if (KillsSrc) { // Last use of operand? 435 popStackAfter(I); 436 } 437} 438 439 440/// handleOneArgFPRW: Handle instructions that read from the top of stack and 441/// replace the value with a newly computed value. These instructions may have 442/// non-fp operands after their FP operands. 443/// 444/// Examples: 445/// R1 = fchs R2 446/// R1 = fadd R2, [mem] 447/// 448void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) { 449 MachineInstr *MI = I; 450 assert(MI->getNumOperands() >= 2 && "FPRW instructions must have 2 ops!!"); 451 452 // Is this the last use of the source register? 453 unsigned Reg = getFPReg(MI->getOperand(1)); 454 bool KillsSrc = false; 455 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 456 E = LV->killed_end(MI); KI != E; ++KI) 457 KillsSrc |= KI->second == X86::FP0+Reg; 458 459 if (KillsSrc) { 460 // If this is the last use of the source register, just make sure it's on 461 // the top of the stack. 462 moveToTop(Reg, I); 463 assert(StackTop > 0 && "Stack cannot be empty!"); 464 --StackTop; 465 pushReg(getFPReg(MI->getOperand(0))); 466 } else { 467 // If this is not the last use of the source register, _copy_ it to the top 468 // of the stack. 469 duplicateToTop(Reg, getFPReg(MI->getOperand(0)), I); 470 } 471 472 MI->RemoveOperand(1); // Drop the source operand. 473 MI->RemoveOperand(0); // Drop the destination operand. 474} 475 476 477//===----------------------------------------------------------------------===// 478// Define tables of various ways to map pseudo instructions 479// 480 481// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i) 482static const TableEntry ForwardST0Table[] = { 483 { X86::FpADD , X86::FADDST0r }, 484 { X86::FpDIV , X86::FDIVST0r }, 485 { X86::FpMUL , X86::FMULST0r }, 486 { X86::FpSUB , X86::FSUBST0r }, 487}; 488 489// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0) 490static const TableEntry ReverseST0Table[] = { 491 { X86::FpADD , X86::FADDST0r }, // commutative 492 { X86::FpDIV , X86::FDIVRST0r }, 493 { X86::FpMUL , X86::FMULST0r }, // commutative 494 { X86::FpSUB , X86::FSUBRST0r }, 495}; 496 497// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i) 498static const TableEntry ForwardSTiTable[] = { 499 { X86::FpADD , X86::FADDrST0 }, // commutative 500 { X86::FpDIV , X86::FDIVRrST0 }, 501 { X86::FpMUL , X86::FMULrST0 }, // commutative 502 { X86::FpSUB , X86::FSUBRrST0 }, 503}; 504 505// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0) 506static const TableEntry ReverseSTiTable[] = { 507 { X86::FpADD , X86::FADDrST0 }, 508 { X86::FpDIV , X86::FDIVrST0 }, 509 { X86::FpMUL , X86::FMULrST0 }, 510 { X86::FpSUB , X86::FSUBrST0 }, 511}; 512 513 514/// handleTwoArgFP - Handle instructions like FADD and friends which are virtual 515/// instructions which need to be simplified and possibly transformed. 516/// 517/// Result: ST(0) = fsub ST(0), ST(i) 518/// ST(i) = fsub ST(0), ST(i) 519/// ST(0) = fsubr ST(0), ST(i) 520/// ST(i) = fsubr ST(0), ST(i) 521/// 522void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) { 523 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 524 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 525 MachineInstr *MI = I; 526 527 unsigned NumOperands = MI->getNumOperands(); 528 assert(NumOperands == 3 && "Illegal TwoArgFP instruction!"); 529 unsigned Dest = getFPReg(MI->getOperand(0)); 530 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 531 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 532 bool KillsOp0 = false, KillsOp1 = false; 533 534 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 535 E = LV->killed_end(MI); KI != E; ++KI) { 536 KillsOp0 |= (KI->second == X86::FP0+Op0); 537 KillsOp1 |= (KI->second == X86::FP0+Op1); 538 } 539 540 unsigned TOS = getStackEntry(0); 541 542 // One of our operands must be on the top of the stack. If neither is yet, we 543 // need to move one. 544 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? 545 // We can choose to move either operand to the top of the stack. If one of 546 // the operands is killed by this instruction, we want that one so that we 547 // can update right on top of the old version. 548 if (KillsOp0) { 549 moveToTop(Op0, I); // Move dead operand to TOS. 550 TOS = Op0; 551 } else if (KillsOp1) { 552 moveToTop(Op1, I); 553 TOS = Op1; 554 } else { 555 // All of the operands are live after this instruction executes, so we 556 // cannot update on top of any operand. Because of this, we must 557 // duplicate one of the stack elements to the top. It doesn't matter 558 // which one we pick. 559 // 560 duplicateToTop(Op0, Dest, I); 561 Op0 = TOS = Dest; 562 KillsOp0 = true; 563 } 564 } else if (!KillsOp0 && !KillsOp1) { 565 // If we DO have one of our operands at the top of the stack, but we don't 566 // have a dead operand, we must duplicate one of the operands to a new slot 567 // on the stack. 568 duplicateToTop(Op0, Dest, I); 569 Op0 = TOS = Dest; 570 KillsOp0 = true; 571 } 572 573 // Now we know that one of our operands is on the top of the stack, and at 574 // least one of our operands is killed by this instruction. 575 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) && 576 "Stack conditions not set up right!"); 577 578 // We decide which form to use based on what is on the top of the stack, and 579 // which operand is killed by this instruction. 580 const TableEntry *InstTable; 581 bool isForward = TOS == Op0; 582 bool updateST0 = (TOS == Op0 && !KillsOp1) || (TOS == Op1 && !KillsOp0); 583 if (updateST0) { 584 if (isForward) 585 InstTable = ForwardST0Table; 586 else 587 InstTable = ReverseST0Table; 588 } else { 589 if (isForward) 590 InstTable = ForwardSTiTable; 591 else 592 InstTable = ReverseSTiTable; 593 } 594 595 int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode()); 596 assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!"); 597 598 // NotTOS - The register which is not on the top of stack... 599 unsigned NotTOS = (TOS == Op0) ? Op1 : Op0; 600 601 // Replace the old instruction with a new instruction 602 MBB->remove(I++); 603 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(NotTOS)); 604 605 // If both operands are killed, pop one off of the stack in addition to 606 // overwriting the other one. 607 if (KillsOp0 && KillsOp1 && Op0 != Op1) { 608 assert(!updateST0 && "Should have updated other operand!"); 609 popStackAfter(I); // Pop the top of stack 610 } 611 612 // Update stack information so that we know the destination register is now on 613 // the stack. 614 unsigned UpdatedSlot = getSlot(updateST0 ? TOS : NotTOS); 615 assert(UpdatedSlot < StackTop && Dest < 7); 616 Stack[UpdatedSlot] = Dest; 617 RegMap[Dest] = UpdatedSlot; 618 delete MI; // Remove the old instruction 619} 620 621/// handleCompareFP - Handle FpUCOM and FpUCOMI instructions, which have two FP 622/// register arguments and no explicit destinations. 623/// 624void FPS::handleCompareFP(MachineBasicBlock::iterator &I) { 625 ASSERT_SORTED(ForwardST0Table); ASSERT_SORTED(ReverseST0Table); 626 ASSERT_SORTED(ForwardSTiTable); ASSERT_SORTED(ReverseSTiTable); 627 MachineInstr *MI = I; 628 629 unsigned NumOperands = MI->getNumOperands(); 630 assert(NumOperands == 2 && "Illegal FpUCOM* instruction!"); 631 unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2)); 632 unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1)); 633 bool KillsOp0 = false, KillsOp1 = false; 634 635 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 636 E = LV->killed_end(MI); KI != E; ++KI) { 637 KillsOp0 |= (KI->second == X86::FP0+Op0); 638 KillsOp1 |= (KI->second == X86::FP0+Op1); 639 } 640 641 // Make sure the first operand is on the top of stack, the other one can be 642 // anywhere. 643 moveToTop(Op0, I); 644 645 // Replace the old instruction with a new instruction 646 MBB->remove(I++); 647 unsigned Opcode = MI->getOpcode() == X86::FpUCOM ? X86::FUCOMr : X86::FUCOMIr; 648 I = BuildMI(*MBB, I, Opcode, 1).addReg(getSTReg(Op1)); 649 650 // If any of the operands are killed by this instruction, free them. 651 if (KillsOp0) freeStackSlotAfter(I, Op0); 652 if (KillsOp1 && Op0 != Op1) freeStackSlotAfter(I, Op1); 653 delete MI; // Remove the old instruction 654} 655 656/// handleCondMovFP - Handle two address conditional move instructions. These 657/// instructions move a st(i) register to st(0) iff a condition is true. These 658/// instructions require that the first operand is at the top of the stack, but 659/// otherwise don't modify the stack at all. 660void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) { 661 MachineInstr *MI = I; 662 663 unsigned Op0 = getFPReg(MI->getOperand(0)); 664 unsigned Op1 = getFPReg(MI->getOperand(1)); 665 666 // The first operand *must* be on the top of the stack. 667 moveToTop(Op0, I); 668 669 // Change the second operand to the stack register that the operand is in. 670 MI->RemoveOperand(0); 671 MI->getOperand(0).setReg(getSTReg(Op1)); 672 673 // If we kill the second operand, make sure to pop it from the stack. 674 if (Op0 != Op1) 675 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 676 E = LV->killed_end(MI); KI != E; ++KI) 677 if (KI->second == X86::FP0+Op1) { 678 // Get this value off of the register stack. 679 freeStackSlotAfter(I, Op1); 680 break; 681 } 682} 683 684 685/// handleSpecialFP - Handle special instructions which behave unlike other 686/// floating point instructions. This is primarily intended for use by pseudo 687/// instructions. 688/// 689void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) { 690 MachineInstr *MI = I; 691 switch (MI->getOpcode()) { 692 default: assert(0 && "Unknown SpecialFP instruction!"); 693 case X86::FpGETRESULT: // Appears immediately after a call returning FP type! 694 assert(StackTop == 0 && "Stack should be empty after a call!"); 695 pushReg(getFPReg(MI->getOperand(0))); 696 break; 697 case X86::FpSETRESULT: 698 assert(StackTop == 1 && "Stack should have one element on it to return!"); 699 --StackTop; // "Forget" we have something on the top of stack! 700 break; 701 case X86::FpMOV: { 702 unsigned SrcReg = getFPReg(MI->getOperand(1)); 703 unsigned DestReg = getFPReg(MI->getOperand(0)); 704 bool KillsSrc = false; 705 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), 706 E = LV->killed_end(MI); KI != E; ++KI) 707 KillsSrc |= KI->second == X86::FP0+SrcReg; 708 709 if (KillsSrc) { 710 // If the input operand is killed, we can just change the owner of the 711 // incoming stack slot into the result. 712 unsigned Slot = getSlot(SrcReg); 713 assert(Slot < 7 && DestReg < 7 && "FpMOV operands invalid!"); 714 Stack[Slot] = DestReg; 715 RegMap[DestReg] = Slot; 716 717 } else { 718 // For FMOV we just duplicate the specified value to a new stack slot. 719 // This could be made better, but would require substantial changes. 720 duplicateToTop(SrcReg, DestReg, I); 721 } 722 break; 723 } 724 } 725 726 I = MBB->erase(I); // Remove the pseudo instruction 727 --I; 728} 729