X86InstrInfo.h revision 79aa3417eb6f58d668aadfedf075240a41d35a26
131d157ae1ac2cd9c787dc3c1d28e64c682803844Jia Liu//===-- X86InstrInfo.h - X86 Instruction Information ------------*- C++ -*-===// 20e0a7a45d3d0a8c865a078459d2e1c6d8967a100Misha Brukman// 3856ba76200ec2302f2fe500bc507f426c7d566c8John Criswell// The LLVM Compiler Infrastructure 4856ba76200ec2302f2fe500bc507f426c7d566c8John Criswell// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 70e0a7a45d3d0a8c865a078459d2e1c6d8967a100Misha Brukman// 8856ba76200ec2302f2fe500bc507f426c7d566c8John Criswell//===----------------------------------------------------------------------===// 9726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner// 103501feab811c86c9659248a4875fc31a3165f84dChris Lattner// This file contains the X86 implementation of the TargetInstrInfo class. 11726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner// 12726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner//===----------------------------------------------------------------------===// 13726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 14726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner#ifndef X86INSTRUCTIONINFO_H 15726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner#define X86INSTRUCTIONINFO_H 16726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 1752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray#include "X86.h" 18726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner#include "X86RegisterInfo.h" 19d68a07650cdb2e18f18f362ba533459aa10e01b6Dan Gohman#include "llvm/ADT/DenseMap.h" 2079aa3417eb6f58d668aadfedf075240a41d35a26Craig Topper#include "llvm/Target/TargetInstrInfo.h" 21726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 224db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#define GET_INSTRINFO_HEADER 234db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng#include "X86GenInstrInfo.inc" 244db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Cheng 25d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 2625ab690a43cbbb591b76d49e3595b019c32f4b3fEvan Cheng class X86RegisterInfo; 27aa3c1410b427909da350f2b5e8d4ec3db62a3618Evan Cheng class X86TargetMachine; 28d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 297fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattnernamespace X86 { 307fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner // X86 specific condition code. These correspond to X86_*_COND in 317fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner // X86InstrInfo.td. They must be kept in synch. 327fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner enum CondCode { 337fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_A = 0, 347fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_AE = 1, 357fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_B = 2, 367fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_BE = 3, 377fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_E = 4, 387fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_G = 5, 397fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_GE = 6, 407fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_L = 7, 417fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_LE = 8, 427fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_NE = 9, 437fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_NO = 10, 447fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_NP = 11, 457fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_NS = 12, 46653456c351d9bf908ebd982f6ae9df3449c5f34bDan Gohman COND_O = 13, 47653456c351d9bf908ebd982f6ae9df3449c5f34bDan Gohman COND_P = 14, 48653456c351d9bf908ebd982f6ae9df3449c5f34bDan Gohman COND_S = 15, 49279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman 50279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman // Artificial condition codes. These are used by AnalyzeBranch 51279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman // to indicate a block terminated with two conditional branches to 52279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman // the same location. This occurs in code using FCMP_OEQ or FCMP_UNE, 53279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman // which can't be represented on x86 with a single condition. These 54279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman // are never used in MachineInstrs. 55279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman COND_NE_OR_P, 56279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman COND_NP_OR_E, 57279c22e6da2612f024b70e5509ffb0cad32f38b2Dan Gohman 587fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner COND_INVALID 597fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner }; 608d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 617fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner // Turn condition code into conditional branch opcode. 627fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner unsigned GetCondBranchFromCond(CondCode CC); 638d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 649cd68759178f9fe25c72253d338e78e414f1d770Chris Lattner /// GetOppositeBranchCondition - Return the inverse of the specified cond, 659cd68759178f9fe25c72253d338e78e414f1d770Chris Lattner /// e.g. turning COND_E to COND_NE. 669cd68759178f9fe25c72253d338e78e414f1d770Chris Lattner CondCode GetOppositeBranchCondition(X86::CondCode CC); 678c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng} // end namespace X86; 689cd68759178f9fe25c72253d338e78e414f1d770Chris Lattner 69281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner 703b6b36d6f54e780a2947cb1b9efe4eed7c40dc11Chris Lattner/// isGlobalStubReference - Return true if the specified TargetFlag operand is 71281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner/// a reference to a stub for a global, not the global itself. 723b6b36d6f54e780a2947cb1b9efe4eed7c40dc11Chris Lattnerinline static bool isGlobalStubReference(unsigned char TargetFlag) { 733b6b36d6f54e780a2947cb1b9efe4eed7c40dc11Chris Lattner switch (TargetFlag) { 74281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner case X86II::MO_DLLIMPORT: // dllimport stub. 75281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner case X86II::MO_GOTPCREL: // rip-relative GOT reference. 76281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner case X86II::MO_GOT: // normal GOT reference. 77281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner case X86II::MO_DARWIN_NONLAZY_PIC_BASE: // Normal $non_lazy_ptr ref. 78281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner case X86II::MO_DARWIN_NONLAZY: // Normal $non_lazy_ptr ref. 79281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: // Hidden $non_lazy_ptr ref. 80281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner return true; 81281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner default: 82281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner return false; 83281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner } 84281bada3b03b97dad0ac9890706a057ab31a5dd3Chris Lattner} 857478ab8502a52815413d8b388898f719484ab1a9Chris Lattner 867478ab8502a52815413d8b388898f719484ab1a9Chris Lattner/// isGlobalRelativeToPICBase - Return true if the specified global value 877478ab8502a52815413d8b388898f719484ab1a9Chris Lattner/// reference is relative to a 32-bit PIC base (X86ISD::GlobalBaseReg). If this 887478ab8502a52815413d8b388898f719484ab1a9Chris Lattner/// is true, the addressing mode has the PIC base register added in (e.g. EBX). 897478ab8502a52815413d8b388898f719484ab1a9Chris Lattnerinline static bool isGlobalRelativeToPICBase(unsigned char TargetFlag) { 907478ab8502a52815413d8b388898f719484ab1a9Chris Lattner switch (TargetFlag) { 917478ab8502a52815413d8b388898f719484ab1a9Chris Lattner case X86II::MO_GOTOFF: // isPICStyleGOT: local global. 927478ab8502a52815413d8b388898f719484ab1a9Chris Lattner case X86II::MO_GOT: // isPICStyleGOT: other global. 937478ab8502a52815413d8b388898f719484ab1a9Chris Lattner case X86II::MO_PIC_BASE_OFFSET: // Darwin local global. 947478ab8502a52815413d8b388898f719484ab1a9Chris Lattner case X86II::MO_DARWIN_NONLAZY_PIC_BASE: // Darwin/32 external global. 957478ab8502a52815413d8b388898f719484ab1a9Chris Lattner case X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE: // Darwin/32 hidden global. 9630ef0e5658b0b8b04437f73f74162d5d72923f29Eric Christopher case X86II::MO_TLVP: // ??? Pretty sure.. 977478ab8502a52815413d8b388898f719484ab1a9Chris Lattner return true; 987478ab8502a52815413d8b388898f719484ab1a9Chris Lattner default: 997478ab8502a52815413d8b388898f719484ab1a9Chris Lattner return false; 1007478ab8502a52815413d8b388898f719484ab1a9Chris Lattner } 1017478ab8502a52815413d8b388898f719484ab1a9Chris Lattner} 1028d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 1031c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikovinline static bool isScale(const MachineOperand &MO) { 104d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman return MO.isImm() && 1051c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov (MO.getImm() == 1 || MO.getImm() == 2 || 1061c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov MO.getImm() == 4 || MO.getImm() == 8); 1071c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov} 1081c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov 109094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindolainline static bool isLeaMem(const MachineInstr *MI, unsigned Op) { 110d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (MI->getOperand(Op).isFI()) return true; 1111c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov return Op+4 <= MI->getNumOperands() && 112d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(Op ).isReg() && isScale(MI->getOperand(Op+1)) && 113d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(Op+2).isReg() && 114d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman (MI->getOperand(Op+3).isImm() || 115d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(Op+3).isGlobal() || 116d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(Op+3).isCPI() || 117d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman MI->getOperand(Op+3).isJTI()); 1181c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov} 1191c4b5eaa4628935c4db3e422aa10f2031e6d1679Anton Korobeynikov 120094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindolainline static bool isMem(const MachineInstr *MI, unsigned Op) { 121094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindola if (MI->getOperand(Op).isFI()) return true; 122094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindola return Op+5 <= MI->getNumOperands() && 123094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindola MI->getOperand(Op+4).isReg() && 124094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindola isLeaMem(MI, Op); 125094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindola} 126094fad37b90946c91a09eb9270a0dbe800f49d87Rafael Espindola 1274db3cffe94a5285239cc0056f939c6b74a5ca0b6Evan Chengclass X86InstrInfo : public X86GenInstrInfo { 128aa3c1410b427909da350f2b5e8d4ec3db62a3618Evan Cheng X86TargetMachine &TM; 129726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner const X86RegisterInfo RI; 1308d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 13143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// RegOp2MemOpTable2Addr, RegOp2MemOpTable0, RegOp2MemOpTable1, 13243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// RegOp2MemOpTable2 - Load / store folding opcode maps. 13343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// 134cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes typedef DenseMap<unsigned, 135cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes std::pair<unsigned, unsigned> > RegOp2MemOpTableType; 136cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes RegOp2MemOpTableType RegOp2MemOpTable2Addr; 137cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes RegOp2MemOpTableType RegOp2MemOpTable0; 138cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes RegOp2MemOpTableType RegOp2MemOpTable1; 139cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes RegOp2MemOpTableType RegOp2MemOpTable2; 1408d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 14143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// MemOp2RegOpTable - Load / store unfolding opcode map. 14243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// 143cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes typedef DenseMap<unsigned, 144cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes std::pair<unsigned, unsigned> > MemOp2RegOpTableType; 145cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes MemOp2RegOpTableType MemOp2RegOpTable; 146cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes 147cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes void AddTableEntry(RegOp2MemOpTableType &R2MTable, 148cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes MemOp2RegOpTableType &M2RTable, 149cbf479df8abe5e208f1438092a9632a145551cbcBruno Cardoso Lopes unsigned RegOp, unsigned MemOp, unsigned Flags); 150352aa503faee6c58e9cdb5054cc5ec1d90c696b4Jakob Stoklund Olesen 151726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattnerpublic: 152950a4c40b823cd4f09dc71be635229246dfd6cacDan Gohman explicit X86InstrInfo(X86TargetMachine &tm); 153726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 1543501feab811c86c9659248a4875fc31a3165f84dChris Lattner /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 155726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner /// such, whenever a client has an instance of instruction info, it should 156726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner /// always be able to get register info as well (through this method). 157726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner /// 158c9f5f3f64f896d0a8c8fa35a1dd98bc57b8960f6Dan Gohman virtual const X86RegisterInfo &getRegisterInfo() const { return RI; } 159726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 1607da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng /// isCoalescableExtInstr - Return true if the instruction is a "coalescable" 1617da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng /// extension instruction. That is, it's like a copy where it's legal for the 1627da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng /// source to overlap the destination. e.g. X86::MOVSX64rr32. If this returns 1637da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng /// true, then it's expected the pre-extension value is available as a subreg 1647da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng /// of the result register. This also returns the sub-register index in 1657da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng /// SubIdx. 1667da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng virtual bool isCoalescableExtInstr(const MachineInstr &MI, 1677da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng unsigned &SrcReg, unsigned &DstReg, 1687da9ecf9677b751d81515f95168ae3cb2df54160Evan Cheng unsigned &SubIdx) const; 169a5a81d70720a4ce6ac7538927c2a874b0dfa8bd2Evan Cheng 170cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; 171dda3978d7877d2d60390833c73ed24857295e89cDavid Greene /// isLoadFromStackSlotPostFE - Check for post-frame ptr elimination 172dda3978d7877d2d60390833c73ed24857295e89cDavid Greene /// stack locations as well. This uses a heuristic so it isn't 173dda3978d7877d2d60390833c73ed24857295e89cDavid Greene /// reliable for correctness. 174dda3978d7877d2d60390833c73ed24857295e89cDavid Greene unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI, 175dda3978d7877d2d60390833c73ed24857295e89cDavid Greene int &FrameIndex) const; 176b87bc95db075dae3033a3c541b55b4cb711c332cDavid Greene 177cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const; 178dda3978d7877d2d60390833c73ed24857295e89cDavid Greene /// isStoreToStackSlotPostFE - Check for post-frame ptr elimination 179dda3978d7877d2d60390833c73ed24857295e89cDavid Greene /// stack locations as well. This uses a heuristic so it isn't 180dda3978d7877d2d60390833c73ed24857295e89cDavid Greene /// reliable for correctness. 181dda3978d7877d2d60390833c73ed24857295e89cDavid Greene unsigned isStoreToStackSlotPostFE(const MachineInstr *MI, 182dda3978d7877d2d60390833c73ed24857295e89cDavid Greene int &FrameIndex) const; 183ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng 1843731bc026cc6c4fb7deb7ac67e2c3be0c22498beDan Gohman bool isReallyTriviallyReMaterializable(const MachineInstr *MI, 1853731bc026cc6c4fb7deb7ac67e2c3be0c22498beDan Gohman AliasAnalysis *AA) const; 186ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 187378445303b10b092a898a75131141a8259cff50bEvan Cheng unsigned DestReg, unsigned SubIdx, 188d57cdd5683ea926e489067364fb7ffe5fd5d35eeEvan Cheng const MachineInstr *Orig, 1899edf7deb37f0f97664f279040fa15d89f32e23d9Jakob Stoklund Olesen const TargetRegisterInfo &TRI) const; 190ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng 191bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// convertToThreeAddress - This method must be implemented by targets that 192bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target 193bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// may be able to convert a two-address instruction into a true 194bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// three-address instruction on demand. This allows the X86 target (for 195bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// example) to convert ADD and SHL instructions into LEA instructions if they 196bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// would require register copies due to two-addressness. 197bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// 198bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// This method returns a null pointer if the transformation cannot be 199bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// performed, otherwise it returns the new instruction. 200bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner /// 201ba59a1e453e110f7b84233f07613f9c5d9a39b87Evan Cheng virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI, 202ba59a1e453e110f7b84233f07613f9c5d9a39b87Evan Cheng MachineBasicBlock::iterator &MBBI, 203f660c171c838793b87b7e58e91609cecf256378dOwen Anderson LiveVariables *LV) const; 204bcea4d6f283a5ae6f93dc8e10898311fe53d23a3Chris Lattner 20541e431ba045eb317ebf0ec45b563a5d96c212f5cChris Lattner /// commuteInstruction - We have a few instructions that must be hacked on to 20641e431ba045eb317ebf0ec45b563a5d96c212f5cChris Lattner /// commute them. 20741e431ba045eb317ebf0ec45b563a5d96c212f5cChris Lattner /// 20858dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng virtual MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI) const; 20941e431ba045eb317ebf0ec45b563a5d96c212f5cChris Lattner 2107fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner // Branch analysis. 211318093b6f8d21ac8eab34573b0526984895fe941Dale Johannesen virtual bool isUnpredicatedTerminator(const MachineInstr* MI) const; 2127fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 2137fbe9723e32ff35c4ad765c88209ef9321475a1bChris Lattner MachineBasicBlock *&FBB, 214dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng SmallVectorImpl<MachineOperand> &Cond, 215dc54d317e7a381ef8e4aca80d54ad1466bb85ddaEvan Cheng bool AllowModify) const; 2166ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Cheng virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 2176ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Cheng virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 2186ae3626a4fda14e6250ac8d8ff487efb8952cdf7Evan Cheng MachineBasicBlock *FBB, 2193bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings const SmallVectorImpl<MachineOperand> &Cond, 2203bf912593301152b65accb9d9c37a95172f1df5aStuart Hastings DebugLoc DL) const; 221320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen virtual void copyPhysReg(MachineBasicBlock &MBB, 222320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen MachineBasicBlock::iterator MI, DebugLoc DL, 223320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen unsigned DestReg, unsigned SrcReg, 224320bdcbfe2691021702085f718db1617b1d4df49Jakob Stoklund Olesen bool KillSrc) const; 225f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 226f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineBasicBlock::iterator MI, 227f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned SrcReg, bool isKill, int FrameIndex, 228746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 229746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const; 230f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 231f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, 232f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineOperand> &Addr, 233f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson const TargetRegisterClass *RC, 23491e69c37153eb7d8cd149d9c2484c3115027b90fDan Gohman MachineInstr::mmo_iterator MMOBegin, 23591e69c37153eb7d8cd149d9c2484c3115027b90fDan Gohman MachineInstr::mmo_iterator MMOEnd, 236f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineInstr*> &NewMIs) const; 237f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 238f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 239f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineBasicBlock::iterator MI, 240f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned DestReg, int FrameIndex, 241746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterClass *RC, 242746ad69e088176819981b4b2c5ac8dcd49f5e60eEvan Cheng const TargetRegisterInfo *TRI) const; 243f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 244f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, 245f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineOperand> &Addr, 246f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson const TargetRegisterClass *RC, 24791e69c37153eb7d8cd149d9c2484c3115027b90fDan Gohman MachineInstr::mmo_iterator MMOBegin, 24891e69c37153eb7d8cd149d9c2484c3115027b90fDan Gohman MachineInstr::mmo_iterator MMOEnd, 249f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineInstr*> &NewMIs) const; 25092fb79b7a611ab4c1043f04e8acd08f963d073adJakob Stoklund Olesen 25192fb79b7a611ab4c1043f04e8acd08f963d073adJakob Stoklund Olesen virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const; 25292fb79b7a611ab4c1043f04e8acd08f963d073adJakob Stoklund Olesen 253962021bc7f6721c20c7dfe8ca809e2d98b1c554aEvan Cheng virtual 254962021bc7f6721c20c7dfe8ca809e2d98b1c554aEvan Cheng MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF, 2558601a3d4decff0a380e059b037dabf71075497d3Evan Cheng int FrameIx, uint64_t Offset, 256962021bc7f6721c20c7dfe8ca809e2d98b1c554aEvan Cheng const MDNode *MDPtr, 257962021bc7f6721c20c7dfe8ca809e2d98b1c554aEvan Cheng DebugLoc DL) const; 258962021bc7f6721c20c7dfe8ca809e2d98b1c554aEvan Cheng 25943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// foldMemoryOperand - If this target supports it, fold a load or store of 26043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// the specified stack slot into the specified machine instruction for the 26143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// specified operand(s). If this is possible, the target should perform the 26243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// folding and return true, otherwise it should return false. If it folds 26343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// the instruction, it is likely that the MachineInstruction the iterator 26443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// references has been changed. 265c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 266c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr* MI, 267c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman const SmallVectorImpl<unsigned> &Ops, 268c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman int FrameIndex) const; 26943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 27043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// foldMemoryOperand - Same as the previous version except it allows folding 27143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// of any load and store from / to any address, not just from a specific 27243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// stack slot. 273c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 274c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr* MI, 275c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman const SmallVectorImpl<unsigned> &Ops, 276c54baa2d43730f1804acfb4f4e738fba72f966bdDan Gohman MachineInstr* LoadMI) const; 27743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 27843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// canFoldMemoryOperand - Returns true if the specified load / store is 27943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// folding is possible. 2808e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohman virtual bool canFoldMemoryOperand(const MachineInstr*, 2818e8b8a223c2b0e69f44c0639f846260c8011668fDan Gohman const SmallVectorImpl<unsigned> &) const; 28243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 28343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// unfoldMemoryOperand - Separate a single instruction which folded a load or 28443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// a store or a load and a store into two or more instruction. If this is 28543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// possible, returns true as well as the new instructions by reference. 28643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, 28743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Reg, bool UnfoldLoad, bool UnfoldStore, 28843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<MachineInstr*> &NewMIs) const; 28943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 29043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, 29143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<SDNode*> &NewNodes) const; 29243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 29343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// getOpcodeAfterMemoryUnfold - Returns the opcode of the would be new 29443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// instruction after load / store are unfolded from an instruction of the 29543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// specified opcode. It returns zero if the specified unfolding is not 2960115e164bad632572e2cfbaf72f0f0882d5319deDan Gohman /// possible. If LoadRegIndex is non-null, it is filled in with the operand 2970115e164bad632572e2cfbaf72f0f0882d5319deDan Gohman /// index of the operand which will hold the register holding the loaded 2980115e164bad632572e2cfbaf72f0f0882d5319deDan Gohman /// value. 29943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual unsigned getOpcodeAfterMemoryUnfold(unsigned Opc, 3000115e164bad632572e2cfbaf72f0f0882d5319deDan Gohman bool UnfoldLoad, bool UnfoldStore, 3010115e164bad632572e2cfbaf72f0f0882d5319deDan Gohman unsigned *LoadRegIndex = 0) const; 3028d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 30396dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// areLoadsFromSameBasePtr - This is used by the pre-regalloc scheduler 30496dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// to determine if two loads are loading from the same base address. It 30596dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// should only return true if the base pointers are the same and the 30696dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// only differences between the two addresses are the offset. It also returns 30796dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// the offsets by reference. 30896dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, 30996dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng int64_t &Offset1, int64_t &Offset2) const; 31096dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng 31196dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to 3127a2bdde0a0eebcd2125055e0eacaca040f0b766cChris Lattner /// determine (in conjunction with areLoadsFromSameBasePtr) if two loads should 31396dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// be scheduled togther. On some targets if two loads are loading from 31496dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// addresses in the same cache line, it's better if they are scheduled 31596dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// together. This function takes two integers that represent the load offsets 31696dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// from the common base address. It returns true if it decides it's desirable 31796dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// to schedule the two loads together. "NumLoads" is the number of loads that 31896dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng /// have already been scheduled after Load1. 31996dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, 32096dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng int64_t Offset1, int64_t Offset2, 32196dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng unsigned NumLoads) const; 32296dc115ef3ee019cb91d7c112358a77536c38a53Evan Cheng 323ee9eb411fffddbb8fe70418c05946a131889b487Chris Lattner virtual void getNoopForMachoTarget(MCInst &NopInst) const; 324ee9eb411fffddbb8fe70418c05946a131889b487Chris Lattner 32544eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson virtual 32644eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 32741e431ba045eb317ebf0ec45b563a5d96c212f5cChris Lattner 3284350eb86a7cdc83fa6a5f4819a7f0534ace5cd58Evan Cheng /// isSafeToMoveRegClassDefs - Return true if it's safe to move a machine 3294350eb86a7cdc83fa6a5f4819a7f0534ace5cd58Evan Cheng /// instruction that defines the specified register class. 3304350eb86a7cdc83fa6a5f4819a7f0534ace5cd58Evan Cheng bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const; 33123066288fdf4867f53f208f9aaf2952b1c049394Evan Cheng 33239a612e6f9e63806af410a0ab0d81895391e4c79Chris Lattner static bool isX86_64ExtendedReg(const MachineOperand &MO) { 33339a612e6f9e63806af410a0ab0d81895391e4c79Chris Lattner if (!MO.isReg()) return false; 3348c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return X86II::isX86_64ExtendedReg(MO.getReg()); 33539a612e6f9e63806af410a0ab0d81895391e4c79Chris Lattner } 33652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 33757c3dac0df7ac1b53ae7c0e5d2adc459fc7bd37cDan Gohman /// getGlobalBaseReg - Return a virtual register initialized with the 33857c3dac0df7ac1b53ae7c0e5d2adc459fc7bd37cDan Gohman /// the global base register value. Output instructions required to 33957c3dac0df7ac1b53ae7c0e5d2adc459fc7bd37cDan Gohman /// initialize the register in the function entry block, if necessary. 3408b746969baee26237e4c52de9862d06795eabcdaDan Gohman /// 34157c3dac0df7ac1b53ae7c0e5d2adc459fc7bd37cDan Gohman unsigned getGlobalBaseReg(MachineFunction *MF) const; 3428b746969baee26237e4c52de9862d06795eabcdaDan Gohman 34398e933f9ad3cc2ede3a0a337144a504265d614cdJakob Stoklund Olesen std::pair<uint16_t, uint16_t> 34498e933f9ad3cc2ede3a0a337144a504265d614cdJakob Stoklund Olesen getExecutionDomain(const MachineInstr *MI) const; 345e4b94b4efb9a4670f25a5a80dd3b97f9583de202Jakob Stoklund Olesen 34698e933f9ad3cc2ede3a0a337144a504265d614cdJakob Stoklund Olesen void setExecutionDomain(MachineInstr *MI, unsigned Domain) const; 347352aa503faee6c58e9cdb5054cc5ec1d90c696b4Jakob Stoklund Olesen 348c2ecf3efbf375fc82bb1cea6afd7448498f9ae75Jakob Stoklund Olesen unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, 349c2ecf3efbf375fc82bb1cea6afd7448498f9ae75Jakob Stoklund Olesen const TargetRegisterInfo *TRI) const; 350c2ecf3efbf375fc82bb1cea6afd7448498f9ae75Jakob Stoklund Olesen void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, 351c2ecf3efbf375fc82bb1cea6afd7448498f9ae75Jakob Stoklund Olesen const TargetRegisterInfo *TRI) const; 352c2ecf3efbf375fc82bb1cea6afd7448498f9ae75Jakob Stoklund Olesen 353beac75da3784929aee9f0357fc5cd76d49d6c3d7Chris Lattner MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, 354beac75da3784929aee9f0357fc5cd76d49d6c3d7Chris Lattner MachineInstr* MI, 355beac75da3784929aee9f0357fc5cd76d49d6c3d7Chris Lattner unsigned OpNum, 356beac75da3784929aee9f0357fc5cd76d49d6c3d7Chris Lattner const SmallVectorImpl<MachineOperand> &MOs, 357beac75da3784929aee9f0357fc5cd76d49d6c3d7Chris Lattner unsigned Size, unsigned Alignment) const; 3582312842de0c641107dd04d7e056d02491cc781caEvan Cheng 359e0ef509aeb47b396cf1bdc170ca4f468f799719fAndrew Trick bool isHighLatencyDef(int opc) const; 360e0ef509aeb47b396cf1bdc170ca4f468f799719fAndrew Trick 3612312842de0c641107dd04d7e056d02491cc781caEvan Cheng bool hasHighOperandLatency(const InstrItineraryData *ItinData, 3622312842de0c641107dd04d7e056d02491cc781caEvan Cheng const MachineRegisterInfo *MRI, 3632312842de0c641107dd04d7e056d02491cc781caEvan Cheng const MachineInstr *DefMI, unsigned DefIdx, 3642312842de0c641107dd04d7e056d02491cc781caEvan Cheng const MachineInstr *UseMI, unsigned UseIdx) const; 3658d4a4225135f1f4647e675902359b64cc21af7efAndrew Trick 36643dbe05279b753aabda571d9c83eaeb36987001aOwen Andersonprivate: 367656e51454ac70f5d500565fd33c883f6dea549f2Evan Cheng MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc, 368656e51454ac70f5d500565fd33c883f6dea549f2Evan Cheng MachineFunction::iterator &MFI, 369656e51454ac70f5d500565fd33c883f6dea549f2Evan Cheng MachineBasicBlock::iterator &MBBI, 370656e51454ac70f5d500565fd33c883f6dea549f2Evan Cheng LiveVariables *LV) const; 371656e51454ac70f5d500565fd33c883f6dea549f2Evan Cheng 372b87bc95db075dae3033a3c541b55b4cb711c332cDavid Greene /// isFrameOperand - Return true and the FrameIndex if the specified 373b87bc95db075dae3033a3c541b55b4cb711c332cDavid Greene /// operand and follow operands form a reference to the stack frame. 374b87bc95db075dae3033a3c541b55b4cb711c332cDavid Greene bool isFrameOperand(const MachineInstr *MI, unsigned int Op, 375b87bc95db075dae3033a3c541b55b4cb711c332cDavid Greene int &FrameIndex) const; 376726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner}; 377726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner 378d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 379d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 380726140821f96e3472a8eccef0c67c0b5ad65a1d9Chris Lattner#endif 381