X86InstrInfo.h revision 15207f45db9d95105ea4b17e2fb7d0c516a21ac6 
1//===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===//
2//
3// This file contains the X86 implementation of the MachineInstrInfo class.
4//
5//===----------------------------------------------------------------------===//
6
7#ifndef X86INSTRUCTIONINFO_H
8#define X86INSTRUCTIONINFO_H
9
10#include "llvm/Target/MachineInstrInfo.h"
11#include "X86RegisterInfo.h"
12
13/// X86II - This namespace holds all of the target specific flags that
14/// instruction info tracks.
15///
16namespace X86II {
17  enum {
18    //===------------------------------------------------------------------===//
19    // Instruction types.  These are the standard/most common forms for X86
20    // instructions.
21    //
22
23    /// Other - An instruction gets this form if it doesn't fit any of the
24    /// catagories below.
25    OtherFrm       = 0,
26
27    /// Raw - This form is for instructions that don't have any operands, so
28    /// they are just a fixed opcode value, like 'leave'.
29    RawFrm         = 1,
30
31    /// AddRegFrm - This form is used for instructions like 'push r32' that have
32    /// their one register operand added to their opcode.
33    AddRegFrm      = 2,
34
35    /// MRMDestReg - This form is used for instructions that use the Mod/RM byte
36    /// to specify a destination, which in this case is a register.
37    ///
38    MRMDestReg     = 3,
39
40    /// MRMDestMem - This form is used for instructions that use the Mod/RM byte
41    /// to specify a destination, which in this case is memory.
42    ///
43    MRMDestMem     = 4,
44
45    /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte
46    /// to specify a source, which in this case is a register.
47    ///
48    MRMSrcReg      = 5,
49
50    /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte
51    /// to specify a source, which in this case is memory.
52    ///
53    MRMSrcMem      = 6,
54
55    /// MRMS[0-7][rm] - These forms are used to represent instructions that use
56    /// a Mod/RM byte, and use the middle field to hold extended opcode
57    /// information.  In the intel manual these are represented as /0, /1, ...
58    ///
59
60    // First, instructions that operate on a register r/m operand...
61    MRMS0r = 16,  MRMS1r = 17,  MRMS2r = 18,  MRMS3r = 19, // Format /0 /1 /2 /3
62    MRMS4r = 20,  MRMS5r = 21,  MRMS6r = 22,  MRMS7r = 23, // Format /4 /5 /6 /7
63
64    // Next, instructions that operate on a memory r/m operand...
65    MRMS0m = 24,  MRMS1m = 25,  MRMS2m = 26,  MRMS3m = 27, // Format /0 /1 /2 /3
66    MRMS4m = 28,  MRMS5m = 29,  MRMS6m = 30,  MRMS7m = 31, // Format /4 /5 /6 /7
67
68    FormMask       = 31,
69
70    //===------------------------------------------------------------------===//
71    // Actual flags...
72
73    /// Void - Set if this instruction produces no value
74    Void        = 1 << 5,
75
76    // TB - TwoByte - Set if this instruction has a two byte opcode, which
77    // starts with a 0x0F byte before the real opcode.
78    TB          = 1 << 6,
79
80    // FIXME: There are several more two byte opcode escapes: D8-DF
81    // Handle this.
82
83    // OpSize - Set if this instruction requires an operand size prefix (0x66),
84    // which most often indicates that the instruction operates on 16 bit data
85    // instead of 32 bit data.
86    OpSize      = 1 << 7,
87  };
88}
89
90class X86InstrInfo : public MachineInstrInfo {
91  const X86RegisterInfo RI;
92public:
93  X86InstrInfo();
94
95  /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info.  As
96  /// such, whenever a client has an instance of instruction info, it should
97  /// always be able to get register info as well (through this method).
98  ///
99  virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
100
101  /// print - Print out an x86 instruction in intel syntax
102  ///
103  virtual void print(const MachineInstr *MI, std::ostream &O,
104                     const TargetMachine &TM) const;
105
106  // getBaseOpcodeFor - This function returns the "base" X86 opcode for the
107  // specified opcode number.
108  //
109  unsigned char getBaseOpcodeFor(unsigned Opcode) const;
110
111
112
113  //===--------------------------------------------------------------------===//
114  //
115  // These are stubs for pure virtual methods that should be factored out of
116  // MachineInstrInfo.  We never call them, we don't want them, but we need
117  // stubs so that we can instatiate our class.
118  //
119  MachineOpCode getNOPOpCode() const { abort(); }
120  void CreateCodeToLoadConst(const TargetMachine& target, Function* F,
121                             Value *V, Instruction *I,
122                             std::vector<MachineInstr*>& mvec,
123                             MachineCodeForInstruction& mcfi) const { abort(); }
124  void CreateCodeToCopyIntToFloat(const TargetMachine& target,
125                                  Function* F, Value* val, Instruction* dest,
126                                  std::vector<MachineInstr*>& mvec,
127                                  MachineCodeForInstruction& mcfi) const {
128    abort();
129  }
130  void CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F,
131                                  Value* val, Instruction* dest,
132                                  std::vector<MachineInstr*>& mvec,
133                                  MachineCodeForInstruction& mcfi)const {
134    abort();
135  }
136  void CreateCopyInstructionsByType(const TargetMachine& target,
137                                    Function* F, Value* src,
138                                    Instruction* dest,
139                                    std::vector<MachineInstr*>& mvec,
140                                    MachineCodeForInstruction& mcfi)const {
141    abort();
142  }
143
144  void CreateSignExtensionInstructions(const TargetMachine& target,
145                                       Function* F, Value* srcVal,
146                                       Value* destVal, unsigned numLowBits,
147                                       std::vector<MachineInstr*>& mvec,
148                                       MachineCodeForInstruction& mcfi) const {
149    abort();
150  }
151
152  void CreateZeroExtensionInstructions(const TargetMachine& target,
153                                       Function* F, Value* srcVal,
154                                       Value* destVal, unsigned srcSizeInBits,
155                                       std::vector<MachineInstr*>& mvec,
156                                       MachineCodeForInstruction& mcfi) const {
157    abort();
158  }
159};
160
161
162#endif
163