X86InstrInfo.h revision 4aff92860d495907dbb04d1e8c088ed92eb4101d
1//===- X86InstructionInfo.h - X86 Instruction Information ---------*-C++-*-===// 2// 3// This file contains the X86 implementation of the MachineInstrInfo class. 4// 5//===----------------------------------------------------------------------===// 6 7#ifndef X86INSTRUCTIONINFO_H 8#define X86INSTRUCTIONINFO_H 9 10#include "llvm/Target/MachineInstrInfo.h" 11#include "X86RegisterInfo.h" 12 13/// X86II - This namespace holds all of the target specific flags that 14/// instruction info tracks. 15/// 16namespace X86II { 17 enum { 18 //===------------------------------------------------------------------===// 19 // Instruction types. These are the standard/most common forms for X86 20 // instructions. 21 // 22 23 /// Raw - This form is for instructions that don't have any operands, so 24 /// they are just a fixed opcode value, like 'leave'. 25 RawFrm = 0, 26 27 /// AddRegFrm - This form is used for instructions like 'push r32' that have 28 /// their one register operand added to their opcode. 29 AddRegFrm = 1, 30 31 /// MRMDestReg - This form is used for instructions that use the Mod/RM byte 32 /// to specify a destination, which in this case is a register. 33 /// 34 MRMDestReg = 2, 35 36 /// MRMDestMem - This form is used for instructions that use the Mod/RM byte 37 /// to specify a destination, which in this case is memory. 38 /// 39 MRMDestMem = 3, 40 41 /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte 42 /// to specify a source, which in this case is a register. 43 /// 44 MRMSrcReg = 4, 45 46 /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte 47 /// to specify a source, which in this case is memory. 48 /// 49 MRMSrcMem = 5, 50 51 /// MRMS[0-7][rm] - These forms are used to represent instructions that use 52 /// a Mod/RM byte, and use the middle field to hold extended opcode 53 /// information. In the intel manual these are represented as /0, /1, ... 54 /// 55 56 // First, instructions that operate on a register r/m operand... 57 MRMS0r = 16, MRMS1r = 17, MRMS2r = 18, MRMS3r = 19, // Format /0 /1 /2 /3 58 MRMS4r = 20, MRMS5r = 21, MRMS6r = 22, MRMS7r = 23, // Format /4 /5 /6 /7 59 60 // Next, instructions that operate on a memory r/m operand... 61 MRMS0m = 24, MRMS1m = 25, MRMS2m = 26, MRMS3m = 27, // Format /0 /1 /2 /3 62 MRMS4m = 28, MRMS5m = 29, MRMS6m = 30, MRMS7m = 31, // Format /4 /5 /6 /7 63 64 FormMask = 31, 65 66 //===------------------------------------------------------------------===// 67 // Actual flags... 68 69 /// Void - Set if this instruction produces no value 70 Void = 1 << 5, 71 72 // TB - TwoByte - Set if this instruction has a two byte opcode, which 73 // starts with a 0x0F byte before the real opcode. 74 TB = 1 << 6, 75 76 // FIXME: There are several more two byte opcode escapes: D8-DF 77 // Handle this. 78 79 // OpSize - Set if this instruction requires an operand size prefix (0x66), 80 // which most often indicates that the instruction operates on 16 bit data 81 // instead of 32 bit data. 82 OpSize = 1 << 7, 83 }; 84} 85 86class X86InstrInfo : public MachineInstrInfo { 87 const X86RegisterInfo RI; 88public: 89 X86InstrInfo(); 90 91 /// getRegisterInfo - MachineInstrInfo is a superset of MRegister info. As 92 /// such, whenever a client has an instance of instruction info, it should 93 /// always be able to get register info as well (through this method). 94 /// 95 virtual const MRegisterInfo &getRegisterInfo() const { return RI; } 96 97 /// print - Print out an x86 instruction in intel syntax 98 /// 99 virtual void print(const MachineInstr *MI, std::ostream &O, 100 const TargetMachine &TM) const; 101 102 // getBaseOpcodeFor - This function returns the "base" X86 opcode for the 103 // specified opcode number. 104 // 105 unsigned char getBaseOpcodeFor(unsigned Opcode) const; 106 107 108 109 //===--------------------------------------------------------------------===// 110 // 111 // These are stubs for pure virtual methods that should be factored out of 112 // MachineInstrInfo. We never call them, we don't want them, but we need 113 // stubs so that we can instatiate our class. 114 // 115 MachineOpCode getNOPOpCode() const { abort(); } 116 void CreateCodeToLoadConst(const TargetMachine& target, Function* F, 117 Value *V, Instruction *I, 118 std::vector<MachineInstr*>& mvec, 119 MachineCodeForInstruction& mcfi) const { abort(); } 120 void CreateCodeToCopyIntToFloat(const TargetMachine& target, 121 Function* F, Value* val, Instruction* dest, 122 std::vector<MachineInstr*>& mvec, 123 MachineCodeForInstruction& mcfi) const { 124 abort(); 125 } 126 void CreateCodeToCopyFloatToInt(const TargetMachine& target, Function* F, 127 Value* val, Instruction* dest, 128 std::vector<MachineInstr*>& mvec, 129 MachineCodeForInstruction& mcfi)const { 130 abort(); 131 } 132 void CreateCopyInstructionsByType(const TargetMachine& target, 133 Function* F, Value* src, 134 Instruction* dest, 135 std::vector<MachineInstr*>& mvec, 136 MachineCodeForInstruction& mcfi)const { 137 abort(); 138 } 139 140 void CreateSignExtensionInstructions(const TargetMachine& target, 141 Function* F, Value* srcVal, 142 Value* destVal, unsigned numLowBits, 143 std::vector<MachineInstr*>& mvec, 144 MachineCodeForInstruction& mcfi) const { 145 abort(); 146 } 147 148 void CreateZeroExtensionInstructions(const TargetMachine& target, 149 Function* F, Value* srcVal, 150 Value* destVal, unsigned srcSizeInBits, 151 std::vector<MachineInstr*>& mvec, 152 MachineCodeForInstruction& mcfi) const { 153 abort(); 154 } 155}; 156 157 158#endif 159