X86RegisterInfo.h revision 5e6df4647e15c50daea9a8a4e7f4f417a266335c 
1//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the X86 implementation of the MRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef X86REGISTERINFO_H
15#define X86REGISTERINFO_H
16
17#include "llvm/Target/MRegisterInfo.h"
18#include "X86GenRegisterInfo.h.inc"
19
20namespace llvm {
21  class Type;
22  class TargetInstrInfo;
23  class X86TargetMachine;
24
25class X86RegisterInfo : public X86GenRegisterInfo {
26public:
27  X86TargetMachine &TM;
28  const TargetInstrInfo &TII;
29
30private:
31  /// Is64Bit - Is the target 64-bits.
32  bool Is64Bit;
33
34  /// SlotSize - Stack slot size in bytes.
35  unsigned SlotSize;
36
37  /// StackPtr - X86 physical register used as stack ptr.
38  unsigned StackPtr;
39
40  /// FramePtr - X86 physical register used as frame ptr.
41  unsigned FramePtr;
42
43public:
44  X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
45
46  /// Code Generation virtual methods...
47  void storeRegToStackSlot(MachineBasicBlock &MBB,
48                           MachineBasicBlock::iterator MI,
49                           unsigned SrcReg, int FrameIndex,
50                           const TargetRegisterClass *RC) const;
51
52  void loadRegFromStackSlot(MachineBasicBlock &MBB,
53                            MachineBasicBlock::iterator MI,
54                            unsigned DestReg, int FrameIndex,
55                            const TargetRegisterClass *RC) const;
56
57  void copyRegToReg(MachineBasicBlock &MBB,
58                    MachineBasicBlock::iterator MI,
59                    unsigned DestReg, unsigned SrcReg,
60                    const TargetRegisterClass *RC) const;
61
62  /// foldMemoryOperand - If this target supports it, fold a load or store of
63  /// the specified stack slot into the specified machine instruction for the
64  /// specified operand.  If this is possible, the target should perform the
65  /// folding and return true, otherwise it should return false.  If it folds
66  /// the instruction, it is likely that the MachineInstruction the iterator
67  /// references has been changed.
68  MachineInstr* foldMemoryOperand(MachineInstr* MI,
69                                  unsigned OpNum,
70                                  int FrameIndex) const;
71
72  /// getCalleeSavedRegs - Return a null-terminated list of all of the
73  /// callee-save registers on this target.
74  const unsigned *getCalleeSavedRegs() const;
75
76  /// getCalleeSavedRegClasses - Return a null-terminated list of the preferred
77  /// register classes to spill each callee-saved register with.  The order and
78  /// length of this list match the getCalleeSavedRegs() list.
79  const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
80
81  /// getReservedRegs - Returns a bitset indexed by physical register number
82  /// indicating if a register is a special register that has particular uses and
83  /// should be considered unavailable at all times, e.g. SP, RA. This is used by
84  /// register scavenger to determine what registers are free.
85  BitVector getReservedRegs(const MachineFunction &MF) const;
86
87  bool hasFP(const MachineFunction &MF) const;
88
89  void eliminateCallFramePseudoInstr(MachineFunction &MF,
90                                     MachineBasicBlock &MBB,
91                                     MachineBasicBlock::iterator MI) const;
92
93  void eliminateFrameIndex(MachineBasicBlock::iterator MI,
94                           RegScavenger *RS = NULL) const;
95
96  void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
97
98  void emitPrologue(MachineFunction &MF) const;
99  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
100
101  // Debug information queries.
102  unsigned getRARegister() const;
103  unsigned getFrameRegister(MachineFunction &MF) const;
104  void getInitialFrameState(std::vector<MachineMove> &Moves) const;
105
106  // Exception handling queries.
107  unsigned getEHExceptionRegister() const;
108  unsigned getEHHandlerRegister() const;
109};
110
111// getX86SubSuperRegister - X86 utility function. It returns the sub or super
112// register of a specific X86 register.
113// e.g. getX86SubSuperRegister(X86::EAX, MVT::i16) return X86:AX
114unsigned getX86SubSuperRegister(unsigned, MVT::ValueType, bool High=false);
115
116} // End llvm namespace
117
118#endif
119