1# Test 32-bit COMPARE AND BRANCH in cases where the sheer number of
2# instructions causes some branches to be out of range.
3# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
4
5# Construct:
6#
7# before0:
8#   conditional branch to after0
9#   ...
10# beforeN:
11#   conditional branch to after0
12# main:
13#   0xffcc bytes, from MVIY instructions
14#   conditional branch to main
15# after0:
16#   ...
17#   conditional branch to main
18# afterN:
19#
20# Each conditional branch sequence occupies 12 bytes if it uses a short
21# branch and 14 if it uses a long one.  The ones before "main:" have to
22# take the branch length into account, which is 6 for short branches,
23# so the final (0x34 - 6) / 12 == 3 blocks can use short branches.
24# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks
25# can use short branches.
26#
27# CHECK: lb [[REG:%r[0-5]]], 0(%r3)
28# CHECK: cr %r4, [[REG]]
29# CHECK: jge [[LABEL:\.L[^ ]*]]
30# CHECK: lb [[REG:%r[0-5]]], 1(%r3)
31# CHECK: cr %r4, [[REG]]
32# CHECK: jge [[LABEL]]
33# CHECK: lb [[REG:%r[0-5]]], 2(%r3)
34# CHECK: cr %r4, [[REG]]
35# CHECK: jge [[LABEL]]
36# CHECK: lb [[REG:%r[0-5]]], 3(%r3)
37# CHECK: cr %r4, [[REG]]
38# CHECK: jge [[LABEL]]
39# CHECK: lb [[REG:%r[0-5]]], 4(%r3)
40# CHECK: cr %r4, [[REG]]
41# CHECK: jge [[LABEL]]
42# CHECK: lb [[REG:%r[0-5]]], 5(%r3)
43# CHECK: crje %r4, [[REG]], [[LABEL]]
44# CHECK: lb [[REG:%r[0-5]]], 6(%r3)
45# CHECK: crje %r4, [[REG]], [[LABEL]]
46# CHECK: lb [[REG:%r[0-5]]], 7(%r3)
47# CHECK: crje %r4, [[REG]], [[LABEL]]
48# ...main goes here...
49# CHECK: lb [[REG:%r[0-5]]], 25(%r3)
50# CHECK: crje %r4, [[REG]], [[LABEL:\.L[^ ]*]]
51# CHECK: lb [[REG:%r[0-5]]], 26(%r3)
52# CHECK: crje %r4, [[REG]], [[LABEL]]
53# CHECK: lb [[REG:%r[0-5]]], 27(%r3)
54# CHECK: crje %r4, [[REG]], [[LABEL]]
55# CHECK: lb [[REG:%r[0-5]]], 28(%r3)
56# CHECK: crje %r4, [[REG]], [[LABEL]]
57# CHECK: lb [[REG:%r[0-5]]], 29(%r3)
58# CHECK: cr %r4, [[REG]]
59# CHECK: jge [[LABEL]]
60# CHECK: lb [[REG:%r[0-5]]], 30(%r3)
61# CHECK: cr %r4, [[REG]]
62# CHECK: jge [[LABEL]]
63# CHECK: lb [[REG:%r[0-5]]], 31(%r3)
64# CHECK: cr %r4, [[REG]]
65# CHECK: jge [[LABEL]]
66# CHECK: lb [[REG:%r[0-5]]], 32(%r3)
67# CHECK: cr %r4, [[REG]]
68# CHECK: jge [[LABEL]]
69
70branch_blocks = 8
71main_size = 0xffcc
72
73print 'define void @f1(i8 *%base, i8 *%stop, i32 %limit) {'
74print 'entry:'
75print '  br label %before0'
76print ''
77
78for i in xrange(branch_blocks):
79    next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
80    print 'before%d:' % i
81    print '  %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i)
82    print '  %%bcur%d = load i8 *%%bstop%d' % (i, i)
83    print '  %%bext%d = sext i8 %%bcur%d to i32' % (i, i)
84    print '  %%btest%d = icmp eq i32 %%limit, %%bext%d' % (i, i)
85    print '  br i1 %%btest%d, label %%after0, label %%%s' % (i, next)
86    print ''
87
88print '%s:' % next
89a, b = 1, 1
90for i in xrange(0, main_size, 6):
91    a, b = b, a + b
92    offset = 4096 + b % 500000
93    value = a % 256
94    print '  %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset)
95    print '  store volatile i8 %d, i8 *%%ptr%d' % (value, i)
96
97for i in xrange(branch_blocks):
98    print '  %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25)
99    print '  %%acur%d = load i8 *%%astop%d' % (i, i)
100    print '  %%aext%d = sext i8 %%acur%d to i32' % (i, i)
101    print '  %%atest%d = icmp eq i32 %%limit, %%aext%d' % (i, i)
102    print '  br i1 %%atest%d, label %%main, label %%after%d' % (i, i)
103    print ''
104    print 'after%d:' % i
105
106print '  ret void'
107print '}'
108