args-01.ll revision b503b49b5105b6aad7d2a015468b84b0f64dfe8e 
1; Test the handling of GPR, FPR and stack arguments when no extension
2; type is given.  This type of argument is used for passing structures, etc.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-INT
5; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FLOAT
6; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-DOUBLE
7; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-1
8; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP128-2
9; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-STACK
10
11declare void @bar(i8, i16, i32, i64, float, double, fp128, i64,
12                  float, double, i8, i16, i32, i64, float, double, fp128)
13
14; There are two indirect fp128 slots, one at offset 224 (the first available
15; byte after the outgoing arguments) and one immediately after it at 240.
16; These slots should be set up outside the glued call sequence, so would
17; normally use %f0/%f2 as the first available 128-bit pair.  This choice
18; is hard-coded in the FP128 tests.
19;
20; The order of the CHECK-INT loads doesn't matter.  The same goes for the
21; CHECK_FP128-* stores and the CHECK-STACK stores.  It would be OK to reorder
22; them in response to future code changes.
23define void @foo() {
24; CHECK-INT: foo:
25; CHECK-INT: lhi %r2, 1
26; CHECK-INT: lhi %r3, 2
27; CHECK-INT: lhi %r4, 3
28; CHECK-INT: lghi %r5, 4
29; CHECK-INT: la %r6, {{224|240}}(%r15)
30; CHECK-INT: brasl %r14, bar@PLT
31;
32; CHECK-FLOAT: foo:
33; CHECK-FLOAT: lzer %f0
34; CHECK-FLOAT: lcebr %f4, %f0
35; CHECK-FLOAT: brasl %r14, bar@PLT
36;
37; CHECK-DOUBLE: foo:
38; CHECK-DOUBLE: lzdr %f2
39; CHECK-DOUBLE: lcdbr %f6, %f2
40; CHECK-DOUBLE: brasl %r14, bar@PLT
41;
42; CHECK-FP128-1: foo:
43; CHECK-FP128-1: aghi %r15, -256
44; CHECK-FP128-1: lzxr %f0
45; CHECK-FP128-1: std %f0, 224(%r15)
46; CHECK-FP128-1: std %f2, 232(%r15)
47; CHECK-FP128-1: brasl %r14, bar@PLT
48;
49; CHECK-FP128-2: foo:
50; CHECK-FP128-2: aghi %r15, -256
51; CHECK-FP128-2: lzxr %f0
52; CHECK-FP128-2: std %f0, 240(%r15)
53; CHECK-FP128-2: std %f2, 248(%r15)
54; CHECK-FP128-2: brasl %r14, bar@PLT
55;
56; CHECK-STACK: foo:
57; CHECK-STACK: aghi %r15, -256
58; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
59; CHECK-STACK: stg [[REGISTER]], 216(%r15)
60; CHECK-STACK: mvghi 208(%r15), 0
61; CHECK-STACK: mvhi 204(%r15), 0
62; CHECK-STACK: mvghi 192(%r15), 9
63; CHECK-STACK: mvhi 188(%r15), 8
64; CHECK-STACK: mvhi 180(%r15), 7
65; CHECK-STACK: mvhi 172(%r15), 6
66; CHECK-STACK: mvghi 160(%r15), 5
67; CHECK-STACK: brasl %r14, bar@PLT
68
69  call void @bar (i8 1, i16 2, i32 3, i64 4, float 0.0, double 0.0,
70                  fp128 0xL00000000000000000000000000000000, i64 5,
71                  float -0.0, double -0.0, i8 6, i16 7, i32 8, i64 9, float 0.0,
72                  double 0.0, fp128 0xL00000000000000000000000000000000)
73  ret void
74}
75