1; Test 16-bit signed ordered comparisons between memory and a constant.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check comparisons with 0.
6define double @f1(double %a, double %b, i16 *%ptr) {
7; CHECK-LABEL: f1:
8; CHECK: chhsi 0(%r2), 0
9; CHECK-NEXT: jl
10; CHECK: ldr %f0, %f2
11; CHECK: br %r14
12  %val = load i16 *%ptr
13  %cond = icmp slt i16 %val, 0
14  %res = select i1 %cond, double %a, double %b
15  ret double %res
16}
17
18; Check comparisons with 1.
19define double @f2(double %a, double %b, i16 *%ptr) {
20; CHECK-LABEL: f2:
21; CHECK: chhsi 0(%r2), 0
22; CHECK-NEXT: jle
23; CHECK: ldr %f0, %f2
24; CHECK: br %r14
25  %val = load i16 *%ptr
26  %cond = icmp slt i16 %val, 1
27  %res = select i1 %cond, double %a, double %b
28  ret double %res
29}
30
31; Check a value near the high end of the signed 16-bit range.
32define double @f3(double %a, double %b, i16 *%ptr) {
33; CHECK-LABEL: f3:
34; CHECK: chhsi 0(%r2), 32766
35; CHECK-NEXT: jl
36; CHECK: ldr %f0, %f2
37; CHECK: br %r14
38  %val = load i16 *%ptr
39  %cond = icmp slt i16 %val, 32766
40  %res = select i1 %cond, double %a, double %b
41  ret double %res
42}
43
44; Check comparisons with -1.
45define double @f4(double %a, double %b, i16 *%ptr) {
46; CHECK-LABEL: f4:
47; CHECK: chhsi 0(%r2), -1
48; CHECK-NEXT: jl
49; CHECK: ldr %f0, %f2
50; CHECK: br %r14
51  %val = load i16 *%ptr
52  %cond = icmp slt i16 %val, -1
53  %res = select i1 %cond, double %a, double %b
54  ret double %res
55}
56
57; Check a value near the low end of the 16-bit signed range.
58define double @f5(double %a, double %b, i16 *%ptr) {
59; CHECK-LABEL: f5:
60; CHECK: chhsi 0(%r2), -32766
61; CHECK-NEXT: jl
62; CHECK: ldr %f0, %f2
63; CHECK: br %r14
64  %val = load i16 *%ptr
65  %cond = icmp slt i16 %val, -32766
66  %res = select i1 %cond, double %a, double %b
67  ret double %res
68}
69
70; Check the high end of the CHHSI range.
71define double @f6(double %a, double %b, i16 %i1, i16 *%base) {
72; CHECK-LABEL: f6:
73; CHECK: chhsi 4094(%r3), 0
74; CHECK-NEXT: jl
75; CHECK: ldr %f0, %f2
76; CHECK: br %r14
77  %ptr = getelementptr i16 *%base, i64 2047
78  %val = load i16 *%ptr
79  %cond = icmp slt i16 %val, 0
80  %res = select i1 %cond, double %a, double %b
81  ret double %res
82}
83
84; Check the next halfword up, which needs separate address logic,
85define double @f7(double %a, double %b, i16 *%base) {
86; CHECK-LABEL: f7:
87; CHECK: aghi %r2, 4096
88; CHECK: chhsi 0(%r2), 0
89; CHECK-NEXT: jl
90; CHECK: ldr %f0, %f2
91; CHECK: br %r14
92  %ptr = getelementptr i16 *%base, i64 2048
93  %val = load i16 *%ptr
94  %cond = icmp slt i16 %val, 0
95  %res = select i1 %cond, double %a, double %b
96  ret double %res
97}
98
99; Check negative offsets, which also need separate address logic.
100define double @f8(double %a, double %b, i16 *%base) {
101; CHECK-LABEL: f8:
102; CHECK: aghi %r2, -2
103; CHECK: chhsi 0(%r2), 0
104; CHECK-NEXT: jl
105; CHECK: ldr %f0, %f2
106; CHECK: br %r14
107  %ptr = getelementptr i16 *%base, i64 -1
108  %val = load i16 *%ptr
109  %cond = icmp slt i16 %val, 0
110  %res = select i1 %cond, double %a, double %b
111  ret double %res
112}
113
114; Check that CHHSI does not allow indices.
115define double @f9(double %a, double %b, i64 %base, i64 %index) {
116; CHECK-LABEL: f9:
117; CHECK: agr {{%r2, %r3|%r3, %r2}}
118; CHECK: chhsi 0({{%r[23]}}), 0
119; CHECK-NEXT: jl
120; CHECK: ldr %f0, %f2
121; CHECK: br %r14
122  %add = add i64 %base, %index
123  %ptr = inttoptr i64 %add to i16 *
124  %val = load i16 *%ptr
125  %cond = icmp slt i16 %val, 0
126  %res = select i1 %cond, double %a, double %b
127  ret double %res
128}
129