1; Test 64-bit GPR loads.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check LG with no displacement.
6define i64 @f1(i64 *%src) {
7; CHECK-LABEL: f1:
8; CHECK: lg %r2, 0(%r2)
9; CHECK: br %r14
10  %val = load i64 *%src
11  ret i64 %val
12}
13
14; Check the high end of the aligned LG range.
15define i64 @f2(i64 *%src) {
16; CHECK-LABEL: f2:
17; CHECK: lg %r2, 524280(%r2)
18; CHECK: br %r14
19  %ptr = getelementptr i64 *%src, i64 65535
20  %val = load i64 *%ptr
21  ret i64 %val
22}
23
24; Check the next doubleword up, which needs separate address logic.
25; Other sequences besides this one would be OK.
26define i64 @f3(i64 *%src) {
27; CHECK-LABEL: f3:
28; CHECK: agfi %r2, 524288
29; CHECK: lg %r2, 0(%r2)
30; CHECK: br %r14
31  %ptr = getelementptr i64 *%src, i64 65536
32  %val = load i64 *%ptr
33  ret i64 %val
34}
35
36; Check the high end of the negative aligned LG range.
37define i64 @f4(i64 *%src) {
38; CHECK-LABEL: f4:
39; CHECK: lg %r2, -8(%r2)
40; CHECK: br %r14
41  %ptr = getelementptr i64 *%src, i64 -1
42  %val = load i64 *%ptr
43  ret i64 %val
44}
45
46; Check the low end of the LG range.
47define i64 @f5(i64 *%src) {
48; CHECK-LABEL: f5:
49; CHECK: lg %r2, -524288(%r2)
50; CHECK: br %r14
51  %ptr = getelementptr i64 *%src, i64 -65536
52  %val = load i64 *%ptr
53  ret i64 %val
54}
55
56; Check the next doubleword down, which needs separate address logic.
57; Other sequences besides this one would be OK.
58define i64 @f6(i64 *%src) {
59; CHECK-LABEL: f6:
60; CHECK: agfi %r2, -524296
61; CHECK: lg %r2, 0(%r2)
62; CHECK: br %r14
63  %ptr = getelementptr i64 *%src, i64 -65537
64  %val = load i64 *%ptr
65  ret i64 %val
66}
67
68; Check that LG allows an index.
69define i64 @f7(i64 %src, i64 %index) {
70; CHECK-LABEL: f7:
71; CHECK: lg %r2, 524287({{%r3,%r2|%r2,%r3}})
72; CHECK: br %r14
73  %add1 = add i64 %src, %index
74  %add2 = add i64 %add1, 524287
75  %ptr = inttoptr i64 %add2 to i64 *
76  %val = load i64 *%ptr
77  ret i64 %val
78}
79