1; Test 16-bit GPR stores.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Test an i16 store, which should get converted into an i32 truncation.
6define void @f1(i16 *%dst, i16 %val) {
7; CHECK-LABEL: f1:
8; CHECK: sth %r3, 0(%r2)
9; CHECK: br %r14
10  store i16 %val, i16 *%dst
11  ret void
12}
13
14; Test an i32 truncating store.
15define void @f2(i16 *%dst, i32 %val) {
16; CHECK-LABEL: f2:
17; CHECK: sth %r3, 0(%r2)
18; CHECK: br %r14
19  %trunc = trunc i32 %val to i16
20  store i16 %trunc, i16 *%dst
21  ret void
22}
23
24; Test an i64 truncating store.
25define void @f3(i16 *%dst, i64 %val) {
26; CHECK-LABEL: f3:
27; CHECK: sth %r3, 0(%r2)
28; CHECK: br %r14
29  %trunc = trunc i64 %val to i16
30  store i16 %trunc, i16 *%dst
31  ret void
32}
33
34; Check the high end of the STH range.
35define void @f4(i16 *%dst, i16 %val) {
36; CHECK-LABEL: f4:
37; CHECK: sth %r3, 4094(%r2)
38; CHECK: br %r14
39  %ptr = getelementptr i16 *%dst, i64 2047
40  store i16 %val, i16 *%ptr
41  ret void
42}
43
44; Check the next halfword up, which should use STHY instead of STH.
45define void @f5(i16 *%dst, i16 %val) {
46; CHECK-LABEL: f5:
47; CHECK: sthy %r3, 4096(%r2)
48; CHECK: br %r14
49  %ptr = getelementptr i16 *%dst, i64 2048
50  store i16 %val, i16 *%ptr
51  ret void
52}
53
54; Check the high end of the aligned STHY range.
55define void @f6(i16 *%dst, i16 %val) {
56; CHECK-LABEL: f6:
57; CHECK: sthy %r3, 524286(%r2)
58; CHECK: br %r14
59  %ptr = getelementptr i16 *%dst, i64 262143
60  store i16 %val, i16 *%ptr
61  ret void
62}
63
64; Check the next halfword up, which needs separate address logic.
65; Other sequences besides this one would be OK.
66define void @f7(i16 *%dst, i16 %val) {
67; CHECK-LABEL: f7:
68; CHECK: agfi %r2, 524288
69; CHECK: sth %r3, 0(%r2)
70; CHECK: br %r14
71  %ptr = getelementptr i16 *%dst, i64 262144
72  store i16 %val, i16 *%ptr
73  ret void
74}
75
76; Check the high end of the negative aligned STHY range.
77define void @f8(i16 *%dst, i16 %val) {
78; CHECK-LABEL: f8:
79; CHECK: sthy %r3, -2(%r2)
80; CHECK: br %r14
81  %ptr = getelementptr i16 *%dst, i64 -1
82  store i16 %val, i16 *%ptr
83  ret void
84}
85
86; Check the low end of the STHY range.
87define void @f9(i16 *%dst, i16 %val) {
88; CHECK-LABEL: f9:
89; CHECK: sthy %r3, -524288(%r2)
90; CHECK: br %r14
91  %ptr = getelementptr i16 *%dst, i64 -262144
92  store i16 %val, i16 *%ptr
93  ret void
94}
95
96; Check the next halfword down, which needs separate address logic.
97; Other sequences besides this one would be OK.
98define void @f10(i16 *%dst, i16 %val) {
99; CHECK-LABEL: f10:
100; CHECK: agfi %r2, -524290
101; CHECK: sth %r3, 0(%r2)
102; CHECK: br %r14
103  %ptr = getelementptr i16 *%dst, i64 -262145
104  store i16 %val, i16 *%ptr
105  ret void
106}
107
108; Check that STH allows an index.
109define void @f11(i64 %dst, i64 %index, i16 %val) {
110; CHECK-LABEL: f11:
111; CHECK: sth %r4, 4094({{%r3,%r2|%r2,%r3}})
112; CHECK: br %r14
113  %add1 = add i64 %dst, %index
114  %add2 = add i64 %add1, 4094
115  %ptr = inttoptr i64 %add2 to i16 *
116  store i16 %val, i16 *%ptr
117  ret void
118}
119
120; Check that STHY allows an index.
121define void @f12(i64 %dst, i64 %index, i16 %val) {
122; CHECK-LABEL: f12:
123; CHECK: sthy %r4, 4096({{%r3,%r2|%r2,%r3}})
124; CHECK: br %r14
125  %add1 = add i64 %dst, %index
126  %add2 = add i64 %add1, 4096
127  %ptr = inttoptr i64 %add2 to i16 *
128  store i16 %val, i16 *%ptr
129  ret void
130}
131