AsmMatcherEmitter.cpp revision 0aed1e770149301af473ce05a83f73be01c06fe0
1//===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This tablegen backend emits a target specifier matcher for converting parsed 11// assembly operands in the MCInst structures. 12// 13// The input to the target specific matcher is a list of literal tokens and 14// operands. The target specific parser should generally eliminate any syntax 15// which is not relevant for matching; for example, comma tokens should have 16// already been consumed and eliminated by the parser. Most instructions will 17// end up with a single literal token (the instruction name) and some number of 18// operands. 19// 20// Some example inputs, for X86: 21// 'addl' (immediate ...) (register ...) 22// 'add' (immediate ...) (memory ...) 23// 'call' '*' %epc 24// 25// The assembly matcher is responsible for converting this input into a precise 26// machine instruction (i.e., an instruction with a well defined encoding). This 27// mapping has several properties which complicate matching: 28// 29// - It may be ambiguous; many architectures can legally encode particular 30// variants of an instruction in different ways (for example, using a smaller 31// encoding for small immediates). Such ambiguities should never be 32// arbitrarily resolved by the assembler, the assembler is always responsible 33// for choosing the "best" available instruction. 34// 35// - It may depend on the subtarget or the assembler context. Instructions 36// which are invalid for the current mode, but otherwise unambiguous (e.g., 37// an SSE instruction in a file being assembled for i486) should be accepted 38// and rejected by the assembler front end. However, if the proper encoding 39// for an instruction is dependent on the assembler context then the matcher 40// is responsible for selecting the correct machine instruction for the 41// current mode. 42// 43// The core matching algorithm attempts to exploit the regularity in most 44// instruction sets to quickly determine the set of possibly matching 45// instructions, and the simplify the generated code. Additionally, this helps 46// to ensure that the ambiguities are intentionally resolved by the user. 47// 48// The matching is divided into two distinct phases: 49// 50// 1. Classification: Each operand is mapped to the unique set which (a) 51// contains it, and (b) is the largest such subset for which a single 52// instruction could match all members. 53// 54// For register classes, we can generate these subgroups automatically. For 55// arbitrary operands, we expect the user to define the classes and their 56// relations to one another (for example, 8-bit signed immediates as a 57// subset of 32-bit immediates). 58// 59// By partitioning the operands in this way, we guarantee that for any 60// tuple of classes, any single instruction must match either all or none 61// of the sets of operands which could classify to that tuple. 62// 63// In addition, the subset relation amongst classes induces a partial order 64// on such tuples, which we use to resolve ambiguities. 65// 66// FIXME: What do we do if a crazy case shows up where this is the wrong 67// resolution? 68// 69// 2. The input can now be treated as a tuple of classes (static tokens are 70// simple singleton sets). Each such tuple should generally map to a single 71// instruction (we currently ignore cases where this isn't true, whee!!!), 72// which we can emit a simple matcher for. 73// 74//===----------------------------------------------------------------------===// 75 76#include "AsmMatcherEmitter.h" 77#include "CodeGenTarget.h" 78#include "Record.h" 79#include "StringMatcher.h" 80#include "llvm/ADT/OwningPtr.h" 81#include "llvm/ADT/SmallVector.h" 82#include "llvm/ADT/STLExtras.h" 83#include "llvm/ADT/StringExtras.h" 84#include "llvm/Support/CommandLine.h" 85#include "llvm/Support/Debug.h" 86#include <list> 87#include <map> 88#include <set> 89using namespace llvm; 90 91static cl::opt<std::string> 92MatchPrefix("match-prefix", cl::init(""), 93 cl::desc("Only match instructions with the given prefix")); 94 95/// FlattenVariants - Flatten an .td file assembly string by selecting the 96/// variant at index \arg N. 97static std::string FlattenVariants(const std::string &AsmString, 98 unsigned N) { 99 StringRef Cur = AsmString; 100 std::string Res = ""; 101 102 for (;;) { 103 // Find the start of the next variant string. 104 size_t VariantsStart = 0; 105 for (size_t e = Cur.size(); VariantsStart != e; ++VariantsStart) 106 if (Cur[VariantsStart] == '{' && 107 (VariantsStart == 0 || (Cur[VariantsStart-1] != '$' && 108 Cur[VariantsStart-1] != '\\'))) 109 break; 110 111 // Add the prefix to the result. 112 Res += Cur.slice(0, VariantsStart); 113 if (VariantsStart == Cur.size()) 114 break; 115 116 ++VariantsStart; // Skip the '{'. 117 118 // Scan to the end of the variants string. 119 size_t VariantsEnd = VariantsStart; 120 unsigned NestedBraces = 1; 121 for (size_t e = Cur.size(); VariantsEnd != e; ++VariantsEnd) { 122 if (Cur[VariantsEnd] == '}' && Cur[VariantsEnd-1] != '\\') { 123 if (--NestedBraces == 0) 124 break; 125 } else if (Cur[VariantsEnd] == '{') 126 ++NestedBraces; 127 } 128 129 // Select the Nth variant (or empty). 130 StringRef Selection = Cur.slice(VariantsStart, VariantsEnd); 131 for (unsigned i = 0; i != N; ++i) 132 Selection = Selection.split('|').second; 133 Res += Selection.split('|').first; 134 135 assert(VariantsEnd != Cur.size() && 136 "Unterminated variants in assembly string!"); 137 Cur = Cur.substr(VariantsEnd + 1); 138 } 139 140 return Res; 141} 142 143/// TokenizeAsmString - Tokenize a simplified assembly string. 144static void TokenizeAsmString(StringRef AsmString, 145 SmallVectorImpl<StringRef> &Tokens) { 146 unsigned Prev = 0; 147 bool InTok = true; 148 for (unsigned i = 0, e = AsmString.size(); i != e; ++i) { 149 switch (AsmString[i]) { 150 case '[': 151 case ']': 152 case '*': 153 case '!': 154 case ' ': 155 case '\t': 156 case ',': 157 if (InTok) { 158 Tokens.push_back(AsmString.slice(Prev, i)); 159 InTok = false; 160 } 161 if (!isspace(AsmString[i]) && AsmString[i] != ',') 162 Tokens.push_back(AsmString.substr(i, 1)); 163 Prev = i + 1; 164 break; 165 166 case '\\': 167 if (InTok) { 168 Tokens.push_back(AsmString.slice(Prev, i)); 169 InTok = false; 170 } 171 ++i; 172 assert(i != AsmString.size() && "Invalid quoted character"); 173 Tokens.push_back(AsmString.substr(i, 1)); 174 Prev = i + 1; 175 break; 176 177 case '$': { 178 // If this isn't "${", treat like a normal token. 179 if (i + 1 == AsmString.size() || AsmString[i + 1] != '{') { 180 if (InTok) { 181 Tokens.push_back(AsmString.slice(Prev, i)); 182 InTok = false; 183 } 184 Prev = i; 185 break; 186 } 187 188 if (InTok) { 189 Tokens.push_back(AsmString.slice(Prev, i)); 190 InTok = false; 191 } 192 193 StringRef::iterator End = 194 std::find(AsmString.begin() + i, AsmString.end(), '}'); 195 assert(End != AsmString.end() && "Missing brace in operand reference!"); 196 size_t EndPos = End - AsmString.begin(); 197 Tokens.push_back(AsmString.slice(i, EndPos+1)); 198 Prev = EndPos + 1; 199 i = EndPos; 200 break; 201 } 202 203 case '.': 204 if (InTok) { 205 Tokens.push_back(AsmString.slice(Prev, i)); 206 } 207 Prev = i; 208 InTok = true; 209 break; 210 211 default: 212 InTok = true; 213 } 214 } 215 if (InTok && Prev != AsmString.size()) 216 Tokens.push_back(AsmString.substr(Prev)); 217} 218 219static bool IsAssemblerInstruction(StringRef Name, 220 const CodeGenInstruction &CGI, 221 const SmallVectorImpl<StringRef> &Tokens) { 222 // Ignore "codegen only" instructions. 223 if (CGI.TheDef->getValueAsBit("isCodeGenOnly")) 224 return false; 225 226 // Ignore pseudo ops. 227 // 228 // FIXME: This is a hack; can we convert these instructions to set the 229 // "codegen only" bit instead? 230 if (const RecordVal *Form = CGI.TheDef->getValue("Form")) 231 if (Form->getValue()->getAsString() == "Pseudo") 232 return false; 233 234 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases. 235 // 236 // FIXME: This is a total hack. 237 if (StringRef(Name).startswith("Int_") || StringRef(Name).endswith("_Int")) 238 return false; 239 240 // Ignore instructions with no .s string. 241 // 242 // FIXME: What are these? 243 if (CGI.AsmString.empty()) 244 return false; 245 246 // FIXME: Hack; ignore any instructions with a newline in them. 247 if (std::find(CGI.AsmString.begin(), 248 CGI.AsmString.end(), '\n') != CGI.AsmString.end()) 249 return false; 250 251 // Ignore instructions with attributes, these are always fake instructions for 252 // simplifying codegen. 253 // 254 // FIXME: Is this true? 255 // 256 // Also, check for instructions which reference the operand multiple times; 257 // this implies a constraint we would not honor. 258 std::set<std::string> OperandNames; 259 for (unsigned i = 1, e = Tokens.size(); i < e; ++i) { 260 if (Tokens[i][0] == '$' && 261 std::find(Tokens[i].begin(), 262 Tokens[i].end(), ':') != Tokens[i].end()) { 263 DEBUG({ 264 errs() << "warning: '" << Name << "': " 265 << "ignoring instruction; operand with attribute '" 266 << Tokens[i] << "'\n"; 267 }); 268 return false; 269 } 270 271 if (Tokens[i][0] == '$' && !OperandNames.insert(Tokens[i]).second) { 272 DEBUG({ 273 errs() << "warning: '" << Name << "': " 274 << "ignoring instruction with tied operand '" 275 << Tokens[i].str() << "'\n"; 276 }); 277 return false; 278 } 279 } 280 281 return true; 282} 283 284namespace { 285 286struct SubtargetFeatureInfo; 287 288/// ClassInfo - Helper class for storing the information about a particular 289/// class of operands which can be matched. 290struct ClassInfo { 291 enum ClassInfoKind { 292 /// Invalid kind, for use as a sentinel value. 293 Invalid = 0, 294 295 /// The class for a particular token. 296 Token, 297 298 /// The (first) register class, subsequent register classes are 299 /// RegisterClass0+1, and so on. 300 RegisterClass0, 301 302 /// The (first) user defined class, subsequent user defined classes are 303 /// UserClass0+1, and so on. 304 UserClass0 = 1<<16 305 }; 306 307 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 + 308 /// N) for the Nth user defined class. 309 unsigned Kind; 310 311 /// SuperClasses - The super classes of this class. Note that for simplicities 312 /// sake user operands only record their immediate super class, while register 313 /// operands include all superclasses. 314 std::vector<ClassInfo*> SuperClasses; 315 316 /// Name - The full class name, suitable for use in an enum. 317 std::string Name; 318 319 /// ClassName - The unadorned generic name for this class (e.g., Token). 320 std::string ClassName; 321 322 /// ValueName - The name of the value this class represents; for a token this 323 /// is the literal token string, for an operand it is the TableGen class (or 324 /// empty if this is a derived class). 325 std::string ValueName; 326 327 /// PredicateMethod - The name of the operand method to test whether the 328 /// operand matches this class; this is not valid for Token or register kinds. 329 std::string PredicateMethod; 330 331 /// RenderMethod - The name of the operand method to add this operand to an 332 /// MCInst; this is not valid for Token or register kinds. 333 std::string RenderMethod; 334 335 /// For register classes, the records for all the registers in this class. 336 std::set<Record*> Registers; 337 338public: 339 /// isRegisterClass() - Check if this is a register class. 340 bool isRegisterClass() const { 341 return Kind >= RegisterClass0 && Kind < UserClass0; 342 } 343 344 /// isUserClass() - Check if this is a user defined class. 345 bool isUserClass() const { 346 return Kind >= UserClass0; 347 } 348 349 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes 350 /// are related if they are in the same class hierarchy. 351 bool isRelatedTo(const ClassInfo &RHS) const { 352 // Tokens are only related to tokens. 353 if (Kind == Token || RHS.Kind == Token) 354 return Kind == Token && RHS.Kind == Token; 355 356 // Registers classes are only related to registers classes, and only if 357 // their intersection is non-empty. 358 if (isRegisterClass() || RHS.isRegisterClass()) { 359 if (!isRegisterClass() || !RHS.isRegisterClass()) 360 return false; 361 362 std::set<Record*> Tmp; 363 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin()); 364 std::set_intersection(Registers.begin(), Registers.end(), 365 RHS.Registers.begin(), RHS.Registers.end(), 366 II); 367 368 return !Tmp.empty(); 369 } 370 371 // Otherwise we have two users operands; they are related if they are in the 372 // same class hierarchy. 373 // 374 // FIXME: This is an oversimplification, they should only be related if they 375 // intersect, however we don't have that information. 376 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!"); 377 const ClassInfo *Root = this; 378 while (!Root->SuperClasses.empty()) 379 Root = Root->SuperClasses.front(); 380 381 const ClassInfo *RHSRoot = &RHS; 382 while (!RHSRoot->SuperClasses.empty()) 383 RHSRoot = RHSRoot->SuperClasses.front(); 384 385 return Root == RHSRoot; 386 } 387 388 /// isSubsetOf - Test whether this class is a subset of \arg RHS; 389 bool isSubsetOf(const ClassInfo &RHS) const { 390 // This is a subset of RHS if it is the same class... 391 if (this == &RHS) 392 return true; 393 394 // ... or if any of its super classes are a subset of RHS. 395 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(), 396 ie = SuperClasses.end(); it != ie; ++it) 397 if ((*it)->isSubsetOf(RHS)) 398 return true; 399 400 return false; 401 } 402 403 /// operator< - Compare two classes. 404 bool operator<(const ClassInfo &RHS) const { 405 if (this == &RHS) 406 return false; 407 408 // Unrelated classes can be ordered by kind. 409 if (!isRelatedTo(RHS)) 410 return Kind < RHS.Kind; 411 412 switch (Kind) { 413 case Invalid: 414 assert(0 && "Invalid kind!"); 415 case Token: 416 // Tokens are comparable by value. 417 // 418 // FIXME: Compare by enum value. 419 return ValueName < RHS.ValueName; 420 421 default: 422 // This class preceeds the RHS if it is a proper subset of the RHS. 423 if (isSubsetOf(RHS)) 424 return true; 425 if (RHS.isSubsetOf(*this)) 426 return false; 427 428 // Otherwise, order by name to ensure we have a total ordering. 429 return ValueName < RHS.ValueName; 430 } 431 } 432}; 433 434/// InstructionInfo - Helper class for storing the necessary information for an 435/// instruction which is capable of being matched. 436struct InstructionInfo { 437 struct Operand { 438 /// The unique class instance this operand should match. 439 ClassInfo *Class; 440 441 /// The original operand this corresponds to, if any. 442 const CodeGenInstruction::OperandInfo *OperandInfo; 443 }; 444 445 /// InstrName - The target name for this instruction. 446 std::string InstrName; 447 448 /// Instr - The instruction this matches. 449 const CodeGenInstruction *Instr; 450 451 /// AsmString - The assembly string for this instruction (with variants 452 /// removed). 453 std::string AsmString; 454 455 /// Tokens - The tokenized assembly pattern that this instruction matches. 456 SmallVector<StringRef, 4> Tokens; 457 458 /// Operands - The operands that this instruction matches. 459 SmallVector<Operand, 4> Operands; 460 461 /// Predicates - The required subtarget features to match this instruction. 462 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures; 463 464 /// ConversionFnKind - The enum value which is passed to the generated 465 /// ConvertToMCInst to convert parsed operands into an MCInst for this 466 /// function. 467 std::string ConversionFnKind; 468 469 /// operator< - Compare two instructions. 470 bool operator<(const InstructionInfo &RHS) const { 471 // The primary comparator is the instruction mnemonic. 472 if (Tokens[0] != RHS.Tokens[0]) 473 return Tokens[0] < RHS.Tokens[0]; 474 475 if (Operands.size() != RHS.Operands.size()) 476 return Operands.size() < RHS.Operands.size(); 477 478 // Compare lexicographically by operand. The matcher validates that other 479 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith(). 480 for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 481 if (*Operands[i].Class < *RHS.Operands[i].Class) 482 return true; 483 if (*RHS.Operands[i].Class < *Operands[i].Class) 484 return false; 485 } 486 487 return false; 488 } 489 490 /// CouldMatchAmiguouslyWith - Check whether this instruction could 491 /// ambiguously match the same set of operands as \arg RHS (without being a 492 /// strictly superior match). 493 bool CouldMatchAmiguouslyWith(const InstructionInfo &RHS) { 494 // The number of operands is unambiguous. 495 if (Operands.size() != RHS.Operands.size()) 496 return false; 497 498 // Otherwise, make sure the ordering of the two instructions is unambiguous 499 // by checking that either (a) a token or operand kind discriminates them, 500 // or (b) the ordering among equivalent kinds is consistent. 501 502 // Tokens and operand kinds are unambiguous (assuming a correct target 503 // specific parser). 504 for (unsigned i = 0, e = Operands.size(); i != e; ++i) 505 if (Operands[i].Class->Kind != RHS.Operands[i].Class->Kind || 506 Operands[i].Class->Kind == ClassInfo::Token) 507 if (*Operands[i].Class < *RHS.Operands[i].Class || 508 *RHS.Operands[i].Class < *Operands[i].Class) 509 return false; 510 511 // Otherwise, this operand could commute if all operands are equivalent, or 512 // there is a pair of operands that compare less than and a pair that 513 // compare greater than. 514 bool HasLT = false, HasGT = false; 515 for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 516 if (*Operands[i].Class < *RHS.Operands[i].Class) 517 HasLT = true; 518 if (*RHS.Operands[i].Class < *Operands[i].Class) 519 HasGT = true; 520 } 521 522 return !(HasLT ^ HasGT); 523 } 524 525public: 526 void dump(); 527}; 528 529/// SubtargetFeatureInfo - Helper class for storing information on a subtarget 530/// feature which participates in instruction matching. 531struct SubtargetFeatureInfo { 532 /// \brief The predicate record for this feature. 533 Record *TheDef; 534 535 /// \brief An unique index assigned to represent this feature. 536 unsigned Index; 537 538 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {} 539 540 /// \brief The name of the enumerated constant identifying this feature. 541 std::string getEnumName() const { 542 return "Feature_" + TheDef->getName(); 543 } 544}; 545 546class AsmMatcherInfo { 547public: 548 /// The tablegen AsmParser record. 549 Record *AsmParser; 550 551 /// The AsmParser "CommentDelimiter" value. 552 std::string CommentDelimiter; 553 554 /// The AsmParser "RegisterPrefix" value. 555 std::string RegisterPrefix; 556 557 /// The classes which are needed for matching. 558 std::vector<ClassInfo*> Classes; 559 560 /// The information on the instruction to match. 561 std::vector<InstructionInfo*> Instructions; 562 563 /// Map of Register records to their class information. 564 std::map<Record*, ClassInfo*> RegisterClasses; 565 566 /// Map of Predicate records to their subtarget information. 567 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures; 568 569private: 570 /// Map of token to class information which has already been constructed. 571 std::map<std::string, ClassInfo*> TokenClasses; 572 573 /// Map of RegisterClass records to their class information. 574 std::map<Record*, ClassInfo*> RegisterClassClasses; 575 576 /// Map of AsmOperandClass records to their class information. 577 std::map<Record*, ClassInfo*> AsmOperandClasses; 578 579private: 580 /// getTokenClass - Lookup or create the class for the given token. 581 ClassInfo *getTokenClass(StringRef Token); 582 583 /// getOperandClass - Lookup or create the class for the given operand. 584 ClassInfo *getOperandClass(StringRef Token, 585 const CodeGenInstruction::OperandInfo &OI); 586 587 /// getSubtargetFeature - Lookup or create the subtarget feature info for the 588 /// given operand. 589 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) { 590 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!"); 591 return SubtargetFeatures[Def]; 592 } 593 594 /// BuildRegisterClasses - Build the ClassInfo* instances for register 595 /// classes. 596 void BuildRegisterClasses(CodeGenTarget &Target, 597 std::set<std::string> &SingletonRegisterNames); 598 599 /// BuildOperandClasses - Build the ClassInfo* instances for user defined 600 /// operand classes. 601 void BuildOperandClasses(CodeGenTarget &Target); 602 603public: 604 AsmMatcherInfo(Record *_AsmParser); 605 606 /// BuildInfo - Construct the various tables used during matching. 607 void BuildInfo(CodeGenTarget &Target); 608}; 609 610} 611 612void InstructionInfo::dump() { 613 errs() << InstrName << " -- " << "flattened:\"" << AsmString << '\"' 614 << ", tokens:["; 615 for (unsigned i = 0, e = Tokens.size(); i != e; ++i) { 616 errs() << Tokens[i]; 617 if (i + 1 != e) 618 errs() << ", "; 619 } 620 errs() << "]\n"; 621 622 for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 623 Operand &Op = Operands[i]; 624 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - "; 625 if (Op.Class->Kind == ClassInfo::Token) { 626 errs() << '\"' << Tokens[i] << "\"\n"; 627 continue; 628 } 629 630 if (!Op.OperandInfo) { 631 errs() << "(singleton register)\n"; 632 continue; 633 } 634 635 const CodeGenInstruction::OperandInfo &OI = *Op.OperandInfo; 636 errs() << OI.Name << " " << OI.Rec->getName() 637 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n"; 638 } 639} 640 641static std::string getEnumNameForToken(StringRef Str) { 642 std::string Res; 643 644 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) { 645 switch (*it) { 646 case '*': Res += "_STAR_"; break; 647 case '%': Res += "_PCT_"; break; 648 case ':': Res += "_COLON_"; break; 649 650 default: 651 if (isalnum(*it)) { 652 Res += *it; 653 } else { 654 Res += "_" + utostr((unsigned) *it) + "_"; 655 } 656 } 657 } 658 659 return Res; 660} 661 662/// getRegisterRecord - Get the register record for \arg name, or 0. 663static Record *getRegisterRecord(CodeGenTarget &Target, StringRef Name) { 664 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) { 665 const CodeGenRegister &Reg = Target.getRegisters()[i]; 666 if (Name == Reg.TheDef->getValueAsString("AsmName")) 667 return Reg.TheDef; 668 } 669 670 return 0; 671} 672 673ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) { 674 ClassInfo *&Entry = TokenClasses[Token]; 675 676 if (!Entry) { 677 Entry = new ClassInfo(); 678 Entry->Kind = ClassInfo::Token; 679 Entry->ClassName = "Token"; 680 Entry->Name = "MCK_" + getEnumNameForToken(Token); 681 Entry->ValueName = Token; 682 Entry->PredicateMethod = "<invalid>"; 683 Entry->RenderMethod = "<invalid>"; 684 Classes.push_back(Entry); 685 } 686 687 return Entry; 688} 689 690ClassInfo * 691AsmMatcherInfo::getOperandClass(StringRef Token, 692 const CodeGenInstruction::OperandInfo &OI) { 693 if (OI.Rec->isSubClassOf("RegisterClass")) { 694 ClassInfo *CI = RegisterClassClasses[OI.Rec]; 695 696 if (!CI) { 697 PrintError(OI.Rec->getLoc(), "register class has no class info!"); 698 throw std::string("ERROR: Missing register class!"); 699 } 700 701 return CI; 702 } 703 704 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!"); 705 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass"); 706 ClassInfo *CI = AsmOperandClasses[MatchClass]; 707 708 if (!CI) { 709 PrintError(OI.Rec->getLoc(), "operand has no match class!"); 710 throw std::string("ERROR: Missing match class!"); 711 } 712 713 return CI; 714} 715 716void AsmMatcherInfo::BuildRegisterClasses(CodeGenTarget &Target, 717 std::set<std::string> 718 &SingletonRegisterNames) { 719 std::vector<CodeGenRegisterClass> RegisterClasses; 720 std::vector<CodeGenRegister> Registers; 721 722 RegisterClasses = Target.getRegisterClasses(); 723 Registers = Target.getRegisters(); 724 725 // The register sets used for matching. 726 std::set< std::set<Record*> > RegisterSets; 727 728 // Gather the defined sets. 729 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(), 730 ie = RegisterClasses.end(); it != ie; ++it) 731 RegisterSets.insert(std::set<Record*>(it->Elements.begin(), 732 it->Elements.end())); 733 734 // Add any required singleton sets. 735 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(), 736 ie = SingletonRegisterNames.end(); it != ie; ++it) 737 if (Record *Rec = getRegisterRecord(Target, *it)) 738 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1)); 739 740 // Introduce derived sets where necessary (when a register does not determine 741 // a unique register set class), and build the mapping of registers to the set 742 // they should classify to. 743 std::map<Record*, std::set<Record*> > RegisterMap; 744 for (std::vector<CodeGenRegister>::iterator it = Registers.begin(), 745 ie = Registers.end(); it != ie; ++it) { 746 CodeGenRegister &CGR = *it; 747 // Compute the intersection of all sets containing this register. 748 std::set<Record*> ContainingSet; 749 750 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(), 751 ie = RegisterSets.end(); it != ie; ++it) { 752 if (!it->count(CGR.TheDef)) 753 continue; 754 755 if (ContainingSet.empty()) { 756 ContainingSet = *it; 757 } else { 758 std::set<Record*> Tmp; 759 std::swap(Tmp, ContainingSet); 760 std::insert_iterator< std::set<Record*> > II(ContainingSet, 761 ContainingSet.begin()); 762 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), 763 II); 764 } 765 } 766 767 if (!ContainingSet.empty()) { 768 RegisterSets.insert(ContainingSet); 769 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet)); 770 } 771 } 772 773 // Construct the register classes. 774 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses; 775 unsigned Index = 0; 776 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(), 777 ie = RegisterSets.end(); it != ie; ++it, ++Index) { 778 ClassInfo *CI = new ClassInfo(); 779 CI->Kind = ClassInfo::RegisterClass0 + Index; 780 CI->ClassName = "Reg" + utostr(Index); 781 CI->Name = "MCK_Reg" + utostr(Index); 782 CI->ValueName = ""; 783 CI->PredicateMethod = ""; // unused 784 CI->RenderMethod = "addRegOperands"; 785 CI->Registers = *it; 786 Classes.push_back(CI); 787 RegisterSetClasses.insert(std::make_pair(*it, CI)); 788 } 789 790 // Find the superclasses; we could compute only the subgroup lattice edges, 791 // but there isn't really a point. 792 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(), 793 ie = RegisterSets.end(); it != ie; ++it) { 794 ClassInfo *CI = RegisterSetClasses[*it]; 795 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(), 796 ie2 = RegisterSets.end(); it2 != ie2; ++it2) 797 if (*it != *it2 && 798 std::includes(it2->begin(), it2->end(), it->begin(), it->end())) 799 CI->SuperClasses.push_back(RegisterSetClasses[*it2]); 800 } 801 802 // Name the register classes which correspond to a user defined RegisterClass. 803 for (std::vector<CodeGenRegisterClass>::iterator it = RegisterClasses.begin(), 804 ie = RegisterClasses.end(); it != ie; ++it) { 805 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(), 806 it->Elements.end())]; 807 if (CI->ValueName.empty()) { 808 CI->ClassName = it->getName(); 809 CI->Name = "MCK_" + it->getName(); 810 CI->ValueName = it->getName(); 811 } else 812 CI->ValueName = CI->ValueName + "," + it->getName(); 813 814 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI)); 815 } 816 817 // Populate the map for individual registers. 818 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(), 819 ie = RegisterMap.end(); it != ie; ++it) 820 this->RegisterClasses[it->first] = RegisterSetClasses[it->second]; 821 822 // Name the register classes which correspond to singleton registers. 823 for (std::set<std::string>::iterator it = SingletonRegisterNames.begin(), 824 ie = SingletonRegisterNames.end(); it != ie; ++it) { 825 if (Record *Rec = getRegisterRecord(Target, *it)) { 826 ClassInfo *CI = this->RegisterClasses[Rec]; 827 assert(CI && "Missing singleton register class info!"); 828 829 if (CI->ValueName.empty()) { 830 CI->ClassName = Rec->getName(); 831 CI->Name = "MCK_" + Rec->getName(); 832 CI->ValueName = Rec->getName(); 833 } else 834 CI->ValueName = CI->ValueName + "," + Rec->getName(); 835 } 836 } 837} 838 839void AsmMatcherInfo::BuildOperandClasses(CodeGenTarget &Target) { 840 std::vector<Record*> AsmOperands; 841 AsmOperands = Records.getAllDerivedDefinitions("AsmOperandClass"); 842 843 // Pre-populate AsmOperandClasses map. 844 for (std::vector<Record*>::iterator it = AsmOperands.begin(), 845 ie = AsmOperands.end(); it != ie; ++it) 846 AsmOperandClasses[*it] = new ClassInfo(); 847 848 unsigned Index = 0; 849 for (std::vector<Record*>::iterator it = AsmOperands.begin(), 850 ie = AsmOperands.end(); it != ie; ++it, ++Index) { 851 ClassInfo *CI = AsmOperandClasses[*it]; 852 CI->Kind = ClassInfo::UserClass0 + Index; 853 854 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses"); 855 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) { 856 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i)); 857 if (!DI) { 858 PrintError((*it)->getLoc(), "Invalid super class reference!"); 859 continue; 860 } 861 862 ClassInfo *SC = AsmOperandClasses[DI->getDef()]; 863 if (!SC) 864 PrintError((*it)->getLoc(), "Invalid super class reference!"); 865 else 866 CI->SuperClasses.push_back(SC); 867 } 868 CI->ClassName = (*it)->getValueAsString("Name"); 869 CI->Name = "MCK_" + CI->ClassName; 870 CI->ValueName = (*it)->getName(); 871 872 // Get or construct the predicate method name. 873 Init *PMName = (*it)->getValueInit("PredicateMethod"); 874 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) { 875 CI->PredicateMethod = SI->getValue(); 876 } else { 877 assert(dynamic_cast<UnsetInit*>(PMName) && 878 "Unexpected PredicateMethod field!"); 879 CI->PredicateMethod = "is" + CI->ClassName; 880 } 881 882 // Get or construct the render method name. 883 Init *RMName = (*it)->getValueInit("RenderMethod"); 884 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) { 885 CI->RenderMethod = SI->getValue(); 886 } else { 887 assert(dynamic_cast<UnsetInit*>(RMName) && 888 "Unexpected RenderMethod field!"); 889 CI->RenderMethod = "add" + CI->ClassName + "Operands"; 890 } 891 892 AsmOperandClasses[*it] = CI; 893 Classes.push_back(CI); 894 } 895} 896 897AsmMatcherInfo::AsmMatcherInfo(Record *asmParser) 898 : AsmParser(asmParser), 899 CommentDelimiter(AsmParser->getValueAsString("CommentDelimiter")), 900 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) 901{ 902} 903 904void AsmMatcherInfo::BuildInfo(CodeGenTarget &Target) { 905 // Parse the instructions; we need to do this first so that we can gather the 906 // singleton register classes. 907 std::set<std::string> SingletonRegisterNames; 908 909 const std::vector<const CodeGenInstruction*> &InstrList = 910 Target.getInstructionsByEnumValue(); 911 912 913 // Build information about all of the AssemblerPredicates. 914 std::vector<Record*> AllPredicates = 915 Records.getAllDerivedDefinitions("Predicate"); 916 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) { 917 Record *Pred = AllPredicates[i]; 918 // Ignore predicates that are not intended for the assembler. 919 if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) 920 continue; 921 922 if (Pred->getName().empty()) { 923 PrintError(Pred->getLoc(), "Predicate has no name!"); 924 throw std::string("ERROR: Predicate defs must be named"); 925 } 926 927 unsigned FeatureNo = SubtargetFeatures.size(); 928 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo); 929 assert(FeatureNo < 32 && "Too many subtarget features!"); 930 } 931 932 for (unsigned i = 0, e = InstrList.size(); i != e; ++i) { 933 const CodeGenInstruction &CGI = *InstrList[i]; 934 935 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix)) 936 continue; 937 938 OwningPtr<InstructionInfo> II(new InstructionInfo()); 939 940 II->InstrName = CGI.TheDef->getName(); 941 II->Instr = &CGI; 942 II->AsmString = FlattenVariants(CGI.AsmString, 0); 943 944 // Remove comments from the asm string. 945 if (!CommentDelimiter.empty()) { 946 size_t Idx = StringRef(II->AsmString).find(CommentDelimiter); 947 if (Idx != StringRef::npos) 948 II->AsmString = II->AsmString.substr(0, Idx); 949 } 950 951 TokenizeAsmString(II->AsmString, II->Tokens); 952 953 // Ignore instructions which shouldn't be matched. 954 if (!IsAssemblerInstruction(CGI.TheDef->getName(), CGI, II->Tokens)) 955 continue; 956 957 // Collect singleton registers, if used. 958 for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) { 959 if (!II->Tokens[i].startswith(RegisterPrefix)) 960 continue; 961 962 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size()); 963 Record *Rec = getRegisterRecord(Target, RegName); 964 965 if (!Rec) { 966 // If there is no register prefix (i.e. "%" in "%eax"), then this may 967 // be some random non-register token, just ignore it. 968 if (RegisterPrefix.empty()) 969 continue; 970 971 std::string Err = "unable to find register for '" + RegName.str() + 972 "' (which matches register prefix)"; 973 throw TGError(CGI.TheDef->getLoc(), Err); 974 } 975 976 SingletonRegisterNames.insert(RegName); 977 } 978 979 // Compute the require features. 980 std::vector<Record*> Predicates = 981 CGI.TheDef->getValueAsListOfDefs("Predicates"); 982 for (unsigned i = 0, e = Predicates.size(); i != e; ++i) { 983 Record *Pred = Predicates[i]; 984 // Ignore predicates that are not intended for the assembler. 985 if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) 986 continue; 987 988 II->RequiredFeatures.push_back(getSubtargetFeature(Pred)); 989 } 990 991 Instructions.push_back(II.take()); 992 } 993 994 // Build info for the register classes. 995 BuildRegisterClasses(Target, SingletonRegisterNames); 996 997 // Build info for the user defined assembly operand classes. 998 BuildOperandClasses(Target); 999 1000 // Build the instruction information. 1001 for (std::vector<InstructionInfo*>::iterator it = Instructions.begin(), 1002 ie = Instructions.end(); it != ie; ++it) { 1003 InstructionInfo *II = *it; 1004 1005 // The first token of the instruction is the mnemonic, which must be a 1006 // simple string. 1007 assert(!II->Tokens.empty() && "Instruction has no tokens?"); 1008 StringRef Mnemonic = II->Tokens[0]; 1009 assert(Mnemonic[0] != '$' && 1010 (RegisterPrefix.empty() || !Mnemonic.startswith(RegisterPrefix))); 1011 1012 // Parse the tokens after the mnemonic. 1013 for (unsigned i = 1, e = II->Tokens.size(); i != e; ++i) { 1014 StringRef Token = II->Tokens[i]; 1015 1016 // Check for singleton registers. 1017 if (Token.startswith(RegisterPrefix)) { 1018 StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size()); 1019 if (Record *RegRecord = getRegisterRecord(Target, RegName)) { 1020 InstructionInfo::Operand Op; 1021 Op.Class = RegisterClasses[RegRecord]; 1022 Op.OperandInfo = 0; 1023 assert(Op.Class && Op.Class->Registers.size() == 1 && 1024 "Unexpected class for singleton register"); 1025 II->Operands.push_back(Op); 1026 continue; 1027 } 1028 1029 if (!RegisterPrefix.empty()) { 1030 std::string Err = "unable to find register for '" + RegName.str() + 1031 "' (which matches register prefix)"; 1032 throw TGError(II->Instr->TheDef->getLoc(), Err); 1033 } 1034 } 1035 1036 // Check for simple tokens. 1037 if (Token[0] != '$') { 1038 InstructionInfo::Operand Op; 1039 Op.Class = getTokenClass(Token); 1040 Op.OperandInfo = 0; 1041 II->Operands.push_back(Op); 1042 continue; 1043 } 1044 1045 // Otherwise this is an operand reference. 1046 StringRef OperandName; 1047 if (Token[1] == '{') 1048 OperandName = Token.substr(2, Token.size() - 3); 1049 else 1050 OperandName = Token.substr(1); 1051 1052 // Map this token to an operand. FIXME: Move elsewhere. 1053 unsigned Idx; 1054 try { 1055 Idx = II->Instr->getOperandNamed(OperandName); 1056 } catch(...) { 1057 throw std::string("error: unable to find operand: '" + 1058 OperandName.str() + "'"); 1059 } 1060 1061 // FIXME: This is annoying, the named operand may be tied (e.g., 1062 // XCHG8rm). What we want is the untied operand, which we now have to 1063 // grovel for. Only worry about this for single entry operands, we have to 1064 // clean this up anyway. 1065 const CodeGenInstruction::OperandInfo *OI = &II->Instr->OperandList[Idx]; 1066 if (OI->Constraints[0].isTied()) { 1067 unsigned TiedOp = OI->Constraints[0].getTiedOperand(); 1068 1069 // The tied operand index is an MIOperand index, find the operand that 1070 // contains it. 1071 for (unsigned i = 0, e = II->Instr->OperandList.size(); i != e; ++i) { 1072 if (II->Instr->OperandList[i].MIOperandNo == TiedOp) { 1073 OI = &II->Instr->OperandList[i]; 1074 break; 1075 } 1076 } 1077 1078 assert(OI && "Unable to find tied operand target!"); 1079 } 1080 1081 InstructionInfo::Operand Op; 1082 Op.Class = getOperandClass(Token, *OI); 1083 Op.OperandInfo = OI; 1084 II->Operands.push_back(Op); 1085 } 1086 } 1087 1088 // Reorder classes so that classes preceed super classes. 1089 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>()); 1090} 1091 1092static std::pair<unsigned, unsigned> * 1093GetTiedOperandAtIndex(SmallVectorImpl<std::pair<unsigned, unsigned> > &List, 1094 unsigned Index) { 1095 for (unsigned i = 0, e = List.size(); i != e; ++i) 1096 if (Index == List[i].first) 1097 return &List[i]; 1098 1099 return 0; 1100} 1101 1102static void EmitConvertToMCInst(CodeGenTarget &Target, 1103 std::vector<InstructionInfo*> &Infos, 1104 raw_ostream &OS) { 1105 // Write the convert function to a separate stream, so we can drop it after 1106 // the enum. 1107 std::string ConvertFnBody; 1108 raw_string_ostream CvtOS(ConvertFnBody); 1109 1110 // Function we have already generated. 1111 std::set<std::string> GeneratedFns; 1112 1113 // Start the unified conversion function. 1114 1115 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, " 1116 << "unsigned Opcode,\n" 1117 << " const SmallVectorImpl<MCParsedAsmOperand*" 1118 << "> &Operands) {\n"; 1119 CvtOS << " Inst.setOpcode(Opcode);\n"; 1120 CvtOS << " switch (Kind) {\n"; 1121 CvtOS << " default:\n"; 1122 1123 // Start the enum, which we will generate inline. 1124 1125 OS << "// Unified function for converting operants to MCInst instances.\n\n"; 1126 OS << "enum ConversionKind {\n"; 1127 1128 // TargetOperandClass - This is the target's operand class, like X86Operand. 1129 std::string TargetOperandClass = Target.getName() + "Operand"; 1130 1131 for (std::vector<InstructionInfo*>::const_iterator it = Infos.begin(), 1132 ie = Infos.end(); it != ie; ++it) { 1133 InstructionInfo &II = **it; 1134 1135 // Order the (class) operands by the order to convert them into an MCInst. 1136 SmallVector<std::pair<unsigned, unsigned>, 4> MIOperandList; 1137 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) { 1138 InstructionInfo::Operand &Op = II.Operands[i]; 1139 if (Op.OperandInfo) 1140 MIOperandList.push_back(std::make_pair(Op.OperandInfo->MIOperandNo, i)); 1141 } 1142 1143 // Find any tied operands. 1144 SmallVector<std::pair<unsigned, unsigned>, 4> TiedOperands; 1145 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) { 1146 const CodeGenInstruction::OperandInfo &OpInfo = II.Instr->OperandList[i]; 1147 for (unsigned j = 0, e = OpInfo.Constraints.size(); j != e; ++j) { 1148 const CodeGenInstruction::ConstraintInfo &CI = OpInfo.Constraints[j]; 1149 if (CI.isTied()) 1150 TiedOperands.push_back(std::make_pair(OpInfo.MIOperandNo + j, 1151 CI.getTiedOperand())); 1152 } 1153 } 1154 1155 std::sort(MIOperandList.begin(), MIOperandList.end()); 1156 1157 // Compute the total number of operands. 1158 unsigned NumMIOperands = 0; 1159 for (unsigned i = 0, e = II.Instr->OperandList.size(); i != e; ++i) { 1160 const CodeGenInstruction::OperandInfo &OI = II.Instr->OperandList[i]; 1161 NumMIOperands = std::max(NumMIOperands, 1162 OI.MIOperandNo + OI.MINumOperands); 1163 } 1164 1165 // Build the conversion function signature. 1166 std::string Signature = "Convert"; 1167 unsigned CurIndex = 0; 1168 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) { 1169 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second]; 1170 assert(CurIndex <= Op.OperandInfo->MIOperandNo && 1171 "Duplicate match for instruction operand!"); 1172 1173 // Skip operands which weren't matched by anything, this occurs when the 1174 // .td file encodes "implicit" operands as explicit ones. 1175 // 1176 // FIXME: This should be removed from the MCInst structure. 1177 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) { 1178 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands, 1179 CurIndex); 1180 if (!Tie) 1181 Signature += "__Imp"; 1182 else 1183 Signature += "__Tie" + utostr(Tie->second); 1184 } 1185 1186 Signature += "__"; 1187 1188 // Registers are always converted the same, don't duplicate the conversion 1189 // function based on them. 1190 // 1191 // FIXME: We could generalize this based on the render method, if it 1192 // mattered. 1193 if (Op.Class->isRegisterClass()) 1194 Signature += "Reg"; 1195 else 1196 Signature += Op.Class->ClassName; 1197 Signature += utostr(Op.OperandInfo->MINumOperands); 1198 Signature += "_" + utostr(MIOperandList[i].second); 1199 1200 CurIndex += Op.OperandInfo->MINumOperands; 1201 } 1202 1203 // Add any trailing implicit operands. 1204 for (; CurIndex != NumMIOperands; ++CurIndex) { 1205 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands, 1206 CurIndex); 1207 if (!Tie) 1208 Signature += "__Imp"; 1209 else 1210 Signature += "__Tie" + utostr(Tie->second); 1211 } 1212 1213 II.ConversionFnKind = Signature; 1214 1215 // Check if we have already generated this signature. 1216 if (!GeneratedFns.insert(Signature).second) 1217 continue; 1218 1219 // If not, emit it now. 1220 1221 // Add to the enum list. 1222 OS << " " << Signature << ",\n"; 1223 1224 // And to the convert function. 1225 CvtOS << " case " << Signature << ":\n"; 1226 CurIndex = 0; 1227 for (unsigned i = 0, e = MIOperandList.size(); i != e; ++i) { 1228 InstructionInfo::Operand &Op = II.Operands[MIOperandList[i].second]; 1229 1230 // Add the implicit operands. 1231 for (; CurIndex != Op.OperandInfo->MIOperandNo; ++CurIndex) { 1232 // See if this is a tied operand. 1233 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands, 1234 CurIndex); 1235 1236 if (!Tie) { 1237 // If not, this is some implicit operand. Just assume it is a register 1238 // for now. 1239 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n"; 1240 } else { 1241 // Copy the tied operand. 1242 assert(Tie->first>Tie->second && "Tied operand preceeds its target!"); 1243 CvtOS << " Inst.addOperand(Inst.getOperand(" 1244 << Tie->second << "));\n"; 1245 } 1246 } 1247 1248 CvtOS << " ((" << TargetOperandClass << "*)Operands[" 1249 << MIOperandList[i].second 1250 << "+1])->" << Op.Class->RenderMethod 1251 << "(Inst, " << Op.OperandInfo->MINumOperands << ");\n"; 1252 CurIndex += Op.OperandInfo->MINumOperands; 1253 } 1254 1255 // And add trailing implicit operands. 1256 for (; CurIndex != NumMIOperands; ++CurIndex) { 1257 std::pair<unsigned, unsigned> *Tie = GetTiedOperandAtIndex(TiedOperands, 1258 CurIndex); 1259 1260 if (!Tie) { 1261 // If not, this is some implicit operand. Just assume it is a register 1262 // for now. 1263 CvtOS << " Inst.addOperand(MCOperand::CreateReg(0));\n"; 1264 } else { 1265 // Copy the tied operand. 1266 assert(Tie->first>Tie->second && "Tied operand preceeds its target!"); 1267 CvtOS << " Inst.addOperand(Inst.getOperand(" 1268 << Tie->second << "));\n"; 1269 } 1270 } 1271 1272 CvtOS << " return;\n"; 1273 } 1274 1275 // Finish the convert function. 1276 1277 CvtOS << " }\n"; 1278 CvtOS << "}\n\n"; 1279 1280 // Finish the enum, and drop the convert function after it. 1281 1282 OS << " NumConversionVariants\n"; 1283 OS << "};\n\n"; 1284 1285 OS << CvtOS.str(); 1286} 1287 1288/// EmitMatchClassEnumeration - Emit the enumeration for match class kinds. 1289static void EmitMatchClassEnumeration(CodeGenTarget &Target, 1290 std::vector<ClassInfo*> &Infos, 1291 raw_ostream &OS) { 1292 OS << "namespace {\n\n"; 1293 1294 OS << "/// MatchClassKind - The kinds of classes which participate in\n" 1295 << "/// instruction matching.\n"; 1296 OS << "enum MatchClassKind {\n"; 1297 OS << " InvalidMatchClass = 0,\n"; 1298 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 1299 ie = Infos.end(); it != ie; ++it) { 1300 ClassInfo &CI = **it; 1301 OS << " " << CI.Name << ", // "; 1302 if (CI.Kind == ClassInfo::Token) { 1303 OS << "'" << CI.ValueName << "'\n"; 1304 } else if (CI.isRegisterClass()) { 1305 if (!CI.ValueName.empty()) 1306 OS << "register class '" << CI.ValueName << "'\n"; 1307 else 1308 OS << "derived register class\n"; 1309 } else { 1310 OS << "user defined class '" << CI.ValueName << "'\n"; 1311 } 1312 } 1313 OS << " NumMatchClassKinds\n"; 1314 OS << "};\n\n"; 1315 1316 OS << "}\n\n"; 1317} 1318 1319/// EmitClassifyOperand - Emit the function to classify an operand. 1320static void EmitClassifyOperand(CodeGenTarget &Target, 1321 AsmMatcherInfo &Info, 1322 raw_ostream &OS) { 1323 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n" 1324 << " " << Target.getName() << "Operand &Operand = *(" 1325 << Target.getName() << "Operand*)GOp;\n"; 1326 1327 // Classify tokens. 1328 OS << " if (Operand.isToken())\n"; 1329 OS << " return MatchTokenString(Operand.getToken());\n\n"; 1330 1331 // Classify registers. 1332 // 1333 // FIXME: Don't hardcode isReg, getReg. 1334 OS << " if (Operand.isReg()) {\n"; 1335 OS << " switch (Operand.getReg()) {\n"; 1336 OS << " default: return InvalidMatchClass;\n"; 1337 for (std::map<Record*, ClassInfo*>::iterator 1338 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end(); 1339 it != ie; ++it) 1340 OS << " case " << Target.getName() << "::" 1341 << it->first->getName() << ": return " << it->second->Name << ";\n"; 1342 OS << " }\n"; 1343 OS << " }\n\n"; 1344 1345 // Classify user defined operands. 1346 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(), 1347 ie = Info.Classes.end(); it != ie; ++it) { 1348 ClassInfo &CI = **it; 1349 1350 if (!CI.isUserClass()) 1351 continue; 1352 1353 OS << " // '" << CI.ClassName << "' class"; 1354 if (!CI.SuperClasses.empty()) { 1355 OS << ", subclass of "; 1356 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) { 1357 if (i) OS << ", "; 1358 OS << "'" << CI.SuperClasses[i]->ClassName << "'"; 1359 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!"); 1360 } 1361 } 1362 OS << "\n"; 1363 1364 OS << " if (Operand." << CI.PredicateMethod << "()) {\n"; 1365 1366 // Validate subclass relationships. 1367 if (!CI.SuperClasses.empty()) { 1368 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) 1369 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod 1370 << "() && \"Invalid class relationship!\");\n"; 1371 } 1372 1373 OS << " return " << CI.Name << ";\n"; 1374 OS << " }\n\n"; 1375 } 1376 OS << " return InvalidMatchClass;\n"; 1377 OS << "}\n\n"; 1378} 1379 1380/// EmitIsSubclass - Emit the subclass predicate function. 1381static void EmitIsSubclass(CodeGenTarget &Target, 1382 std::vector<ClassInfo*> &Infos, 1383 raw_ostream &OS) { 1384 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n"; 1385 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n"; 1386 OS << " if (A == B)\n"; 1387 OS << " return true;\n\n"; 1388 1389 OS << " switch (A) {\n"; 1390 OS << " default:\n"; 1391 OS << " return false;\n"; 1392 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 1393 ie = Infos.end(); it != ie; ++it) { 1394 ClassInfo &A = **it; 1395 1396 if (A.Kind != ClassInfo::Token) { 1397 std::vector<StringRef> SuperClasses; 1398 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 1399 ie = Infos.end(); it != ie; ++it) { 1400 ClassInfo &B = **it; 1401 1402 if (&A != &B && A.isSubsetOf(B)) 1403 SuperClasses.push_back(B.Name); 1404 } 1405 1406 if (SuperClasses.empty()) 1407 continue; 1408 1409 OS << "\n case " << A.Name << ":\n"; 1410 1411 if (SuperClasses.size() == 1) { 1412 OS << " return B == " << SuperClasses.back() << ";\n"; 1413 continue; 1414 } 1415 1416 OS << " switch (B) {\n"; 1417 OS << " default: return false;\n"; 1418 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i) 1419 OS << " case " << SuperClasses[i] << ": return true;\n"; 1420 OS << " }\n"; 1421 } 1422 } 1423 OS << " }\n"; 1424 OS << "}\n\n"; 1425} 1426 1427 1428 1429/// EmitMatchTokenString - Emit the function to match a token string to the 1430/// appropriate match class value. 1431static void EmitMatchTokenString(CodeGenTarget &Target, 1432 std::vector<ClassInfo*> &Infos, 1433 raw_ostream &OS) { 1434 // Construct the match list. 1435 std::vector<StringMatcher::StringPair> Matches; 1436 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 1437 ie = Infos.end(); it != ie; ++it) { 1438 ClassInfo &CI = **it; 1439 1440 if (CI.Kind == ClassInfo::Token) 1441 Matches.push_back(StringMatcher::StringPair(CI.ValueName, 1442 "return " + CI.Name + ";")); 1443 } 1444 1445 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n"; 1446 1447 StringMatcher("Name", Matches, OS).Emit(); 1448 1449 OS << " return InvalidMatchClass;\n"; 1450 OS << "}\n\n"; 1451} 1452 1453/// EmitMatchRegisterName - Emit the function to match a string to the target 1454/// specific register enum. 1455static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser, 1456 raw_ostream &OS) { 1457 // Construct the match list. 1458 std::vector<StringMatcher::StringPair> Matches; 1459 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) { 1460 const CodeGenRegister &Reg = Target.getRegisters()[i]; 1461 if (Reg.TheDef->getValueAsString("AsmName").empty()) 1462 continue; 1463 1464 Matches.push_back(StringMatcher::StringPair( 1465 Reg.TheDef->getValueAsString("AsmName"), 1466 "return " + utostr(i + 1) + ";")); 1467 } 1468 1469 OS << "static unsigned MatchRegisterName(StringRef Name) {\n"; 1470 1471 StringMatcher("Name", Matches, OS).Emit(); 1472 1473 OS << " return 0;\n"; 1474 OS << "}\n\n"; 1475} 1476 1477/// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag 1478/// definitions. 1479static void EmitSubtargetFeatureFlagEnumeration(CodeGenTarget &Target, 1480 AsmMatcherInfo &Info, 1481 raw_ostream &OS) { 1482 OS << "// Flags for subtarget features that participate in " 1483 << "instruction matching.\n"; 1484 OS << "enum SubtargetFeatureFlag {\n"; 1485 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator 1486 it = Info.SubtargetFeatures.begin(), 1487 ie = Info.SubtargetFeatures.end(); it != ie; ++it) { 1488 SubtargetFeatureInfo &SFI = *it->second; 1489 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n"; 1490 } 1491 OS << " Feature_None = 0\n"; 1492 OS << "};\n\n"; 1493} 1494 1495/// EmitComputeAvailableFeatures - Emit the function to compute the list of 1496/// available features given a subtarget. 1497static void EmitComputeAvailableFeatures(CodeGenTarget &Target, 1498 AsmMatcherInfo &Info, 1499 raw_ostream &OS) { 1500 std::string ClassName = 1501 Info.AsmParser->getValueAsString("AsmParserClassName"); 1502 1503 OS << "unsigned " << Target.getName() << ClassName << "::\n" 1504 << "ComputeAvailableFeatures(const " << Target.getName() 1505 << "Subtarget *Subtarget) const {\n"; 1506 OS << " unsigned Features = 0;\n"; 1507 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator 1508 it = Info.SubtargetFeatures.begin(), 1509 ie = Info.SubtargetFeatures.end(); it != ie; ++it) { 1510 SubtargetFeatureInfo &SFI = *it->second; 1511 OS << " if (" << SFI.TheDef->getValueAsString("CondString") 1512 << ")\n"; 1513 OS << " Features |= " << SFI.getEnumName() << ";\n"; 1514 } 1515 OS << " return Features;\n"; 1516 OS << "}\n\n"; 1517} 1518 1519static std::string GetAliasRequiredFeatures(Record *R) { 1520 // FIXME: This is a total hack. 1521 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates"); 1522 1523 std::string Result; 1524 unsigned NumFeatures = 0; 1525 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) { 1526 Record *Pred = ReqFeatures[i]; 1527 1528 // Ignore predicates that are not intended for the assembler. 1529 if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) 1530 continue; 1531 1532 if (NumFeatures) 1533 Result += '|'; 1534 1535 Result += "Feature_" + Pred->getName(); 1536 ++NumFeatures; 1537 } 1538 1539 if (NumFeatures > 1) 1540 Result = '(' + Result + ')'; 1541 return Result; 1542} 1543 1544/// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions, 1545/// emit a function for them and return true, otherwise return false. 1546static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) { 1547 std::vector<Record*> Aliases = 1548 Records.getAllDerivedDefinitions("MnemonicAlias"); 1549 if (Aliases.empty()) return false; 1550 1551 OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, " 1552 "unsigned Features) {\n"; 1553 1554 // Keep track of all the aliases from a mnemonic. Use an std::map so that the 1555 // iteration order of the map is stable. 1556 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic; 1557 1558 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { 1559 Record *R = Aliases[i]; 1560 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R); 1561 } 1562 1563 // Process each alias a "from" mnemonic at a time, building the code executed 1564 // by the string remapper. 1565 std::vector<StringMatcher::StringPair> Cases; 1566 for (std::map<std::string, std::vector<Record*> >::iterator 1567 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end(); 1568 I != E; ++I) { 1569 const std::vector<Record*> &ToVec = I->second; 1570 1571 // Loop through each alias and emit code that handles each case. If there 1572 // are two instructions without predicates, emit an error. If there is one, 1573 // emit it last. 1574 std::string MatchCode; 1575 int AliasWithNoPredicate = -1; 1576 1577 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) { 1578 Record *R = ToVec[i]; 1579 std::string FeatureMask = GetAliasRequiredFeatures(R); 1580 1581 // If this unconditionally matches, remember it for later and diagnose 1582 // duplicates. 1583 if (FeatureMask.empty()) { 1584 if (AliasWithNoPredicate != -1) { 1585 // We can't have two aliases from the same mnemonic with no predicate. 1586 PrintError(ToVec[AliasWithNoPredicate]->getLoc(), 1587 "two MnemonicAliases with the same 'from' mnemonic!"); 1588 PrintError(R->getLoc(), "this is the other MnemonicAlias."); 1589 throw std::string("ERROR: Invalid MnemonicAlias definitions!"); 1590 } 1591 1592 AliasWithNoPredicate = i; 1593 continue; 1594 } 1595 1596 if (!MatchCode.empty()) 1597 MatchCode += "else "; 1598 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n"; 1599 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n"; 1600 } 1601 1602 if (AliasWithNoPredicate != -1) { 1603 Record *R = ToVec[AliasWithNoPredicate]; 1604 if (!MatchCode.empty()) 1605 MatchCode += "else\n "; 1606 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n"; 1607 } 1608 1609 MatchCode += "return;"; 1610 1611 Cases.push_back(std::make_pair(I->first, MatchCode)); 1612 } 1613 1614 1615 StringMatcher("Mnemonic", Cases, OS).Emit(); 1616 OS << "}\n"; 1617 1618 return true; 1619} 1620 1621void AsmMatcherEmitter::run(raw_ostream &OS) { 1622 CodeGenTarget Target; 1623 Record *AsmParser = Target.getAsmParser(); 1624 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName"); 1625 1626 // Compute the information on the instructions to match. 1627 AsmMatcherInfo Info(AsmParser); 1628 Info.BuildInfo(Target); 1629 1630 // Sort the instruction table using the partial order on classes. We use 1631 // stable_sort to ensure that ambiguous instructions are still 1632 // deterministically ordered. 1633 std::stable_sort(Info.Instructions.begin(), Info.Instructions.end(), 1634 less_ptr<InstructionInfo>()); 1635 1636 DEBUG_WITH_TYPE("instruction_info", { 1637 for (std::vector<InstructionInfo*>::iterator 1638 it = Info.Instructions.begin(), ie = Info.Instructions.end(); 1639 it != ie; ++it) 1640 (*it)->dump(); 1641 }); 1642 1643 // Check for ambiguous instructions. 1644 DEBUG_WITH_TYPE("ambiguous_instrs", { 1645 unsigned NumAmbiguous = 0; 1646 for (unsigned i = 0, e = Info.Instructions.size(); i != e; ++i) { 1647 for (unsigned j = i + 1; j != e; ++j) { 1648 InstructionInfo &A = *Info.Instructions[i]; 1649 InstructionInfo &B = *Info.Instructions[j]; 1650 1651 if (A.CouldMatchAmiguouslyWith(B)) { 1652 errs() << "warning: ambiguous instruction match:\n"; 1653 A.dump(); 1654 errs() << "\nis incomparable with:\n"; 1655 B.dump(); 1656 errs() << "\n\n"; 1657 ++NumAmbiguous; 1658 } 1659 } 1660 } 1661 if (NumAmbiguous) 1662 errs() << "warning: " << NumAmbiguous 1663 << " ambiguous instructions!\n"; 1664 }); 1665 1666 // Write the output. 1667 1668 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS); 1669 1670 // Information for the class declaration. 1671 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n"; 1672 OS << "#undef GET_ASSEMBLER_HEADER\n"; 1673 OS << " // This should be included into the middle of the declaration of \n"; 1674 OS << " // your subclasses implementation of TargetAsmParser.\n"; 1675 OS << " unsigned ComputeAvailableFeatures(const " << 1676 Target.getName() << "Subtarget *Subtarget) const;\n"; 1677 OS << " enum MatchResultTy {\n"; 1678 OS << " Match_Success, Match_MnemonicFail, Match_InvalidOperand,\n"; 1679 OS << " Match_MissingFeature\n"; 1680 OS << " };\n"; 1681 OS << " MatchResultTy MatchInstructionImpl(const " 1682 << "SmallVectorImpl<MCParsedAsmOperand*>" 1683 << " &Operands, MCInst &Inst, unsigned &ErrorInfo);\n\n"; 1684 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n"; 1685 1686 1687 1688 1689 OS << "\n#ifdef GET_REGISTER_MATCHER\n"; 1690 OS << "#undef GET_REGISTER_MATCHER\n\n"; 1691 1692 // Emit the subtarget feature enumeration. 1693 EmitSubtargetFeatureFlagEnumeration(Target, Info, OS); 1694 1695 // Emit the function to match a register name to number. 1696 EmitMatchRegisterName(Target, AsmParser, OS); 1697 1698 OS << "#endif // GET_REGISTER_MATCHER\n\n"; 1699 1700 1701 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n"; 1702 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n"; 1703 1704 // Generate the function that remaps for mnemonic aliases. 1705 bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info); 1706 1707 // Generate the unified function to convert operands into an MCInst. 1708 EmitConvertToMCInst(Target, Info.Instructions, OS); 1709 1710 // Emit the enumeration for classes which participate in matching. 1711 EmitMatchClassEnumeration(Target, Info.Classes, OS); 1712 1713 // Emit the routine to match token strings to their match class. 1714 EmitMatchTokenString(Target, Info.Classes, OS); 1715 1716 // Emit the routine to classify an operand. 1717 EmitClassifyOperand(Target, Info, OS); 1718 1719 // Emit the subclass predicate routine. 1720 EmitIsSubclass(Target, Info.Classes, OS); 1721 1722 // Emit the available features compute function. 1723 EmitComputeAvailableFeatures(Target, Info, OS); 1724 1725 1726 size_t MaxNumOperands = 0; 1727 for (std::vector<InstructionInfo*>::const_iterator it = 1728 Info.Instructions.begin(), ie = Info.Instructions.end(); 1729 it != ie; ++it) 1730 MaxNumOperands = std::max(MaxNumOperands, (*it)->Operands.size()); 1731 1732 1733 // Emit the static match table; unused classes get initalized to 0 which is 1734 // guaranteed to be InvalidMatchClass. 1735 // 1736 // FIXME: We can reduce the size of this table very easily. First, we change 1737 // it so that store the kinds in separate bit-fields for each index, which 1738 // only needs to be the max width used for classes at that index (we also need 1739 // to reject based on this during classification). If we then make sure to 1740 // order the match kinds appropriately (putting mnemonics last), then we 1741 // should only end up using a few bits for each class, especially the ones 1742 // following the mnemonic. 1743 OS << "namespace {\n"; 1744 OS << " struct MatchEntry {\n"; 1745 OS << " unsigned Opcode;\n"; 1746 OS << " const char *Mnemonic;\n"; 1747 OS << " ConversionKind ConvertFn;\n"; 1748 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n"; 1749 OS << " unsigned RequiredFeatures;\n"; 1750 OS << " };\n\n"; 1751 1752 OS << "// Predicate for searching for an opcode.\n"; 1753 OS << " struct LessOpcode {\n"; 1754 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n"; 1755 OS << " return StringRef(LHS.Mnemonic) < RHS;\n"; 1756 OS << " }\n"; 1757 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n"; 1758 OS << " return LHS < StringRef(RHS.Mnemonic);\n"; 1759 OS << " }\n"; 1760 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n"; 1761 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n"; 1762 OS << " }\n"; 1763 OS << " };\n"; 1764 1765 OS << "} // end anonymous namespace.\n\n"; 1766 1767 OS << "static const MatchEntry MatchTable[" 1768 << Info.Instructions.size() << "] = {\n"; 1769 1770 for (std::vector<InstructionInfo*>::const_iterator it = 1771 Info.Instructions.begin(), ie = Info.Instructions.end(); 1772 it != ie; ++it) { 1773 InstructionInfo &II = **it; 1774 1775 OS << " { " << Target.getName() << "::" << II.InstrName 1776 << ", \"" << II.Tokens[0] << "\"" 1777 << ", " << II.ConversionFnKind << ", { "; 1778 for (unsigned i = 0, e = II.Operands.size(); i != e; ++i) { 1779 InstructionInfo::Operand &Op = II.Operands[i]; 1780 1781 if (i) OS << ", "; 1782 OS << Op.Class->Name; 1783 } 1784 OS << " }, "; 1785 1786 // Write the required features mask. 1787 if (!II.RequiredFeatures.empty()) { 1788 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) { 1789 if (i) OS << "|"; 1790 OS << II.RequiredFeatures[i]->getEnumName(); 1791 } 1792 } else 1793 OS << "0"; 1794 1795 OS << "},\n"; 1796 } 1797 1798 OS << "};\n\n"; 1799 1800 // Finally, build the match function. 1801 OS << Target.getName() << ClassName << "::MatchResultTy " 1802 << Target.getName() << ClassName << "::\n" 1803 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>" 1804 << " &Operands,\n"; 1805 OS << " MCInst &Inst, unsigned &ErrorInfo) {\n"; 1806 1807 // Emit code to get the available features. 1808 OS << " // Get the current feature set.\n"; 1809 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n"; 1810 1811 OS << " // Get the instruction mnemonic, which is the first token.\n"; 1812 OS << " StringRef Mnemonic = ((" << Target.getName() 1813 << "Operand*)Operands[0])->getToken();\n\n"; 1814 1815 if (HasMnemonicAliases) { 1816 OS << " // Process all MnemonicAliases to remap the mnemonic.\n"; 1817 OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n"; 1818 } 1819 1820 // Emit code to compute the class list for this operand vector. 1821 OS << " // Eliminate obvious mismatches.\n"; 1822 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n"; 1823 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n"; 1824 OS << " return Match_InvalidOperand;\n"; 1825 OS << " }\n\n"; 1826 1827 OS << " // Compute the class list for this operand vector.\n"; 1828 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n"; 1829 OS << " for (unsigned i = 1, e = Operands.size(); i != e; ++i) {\n"; 1830 OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n"; 1831 1832 OS << " // Check for invalid operands before matching.\n"; 1833 OS << " if (Classes[i-1] == InvalidMatchClass) {\n"; 1834 OS << " ErrorInfo = i;\n"; 1835 OS << " return Match_InvalidOperand;\n"; 1836 OS << " }\n"; 1837 OS << " }\n\n"; 1838 1839 OS << " // Mark unused classes.\n"; 1840 OS << " for (unsigned i = Operands.size()-1, e = " << MaxNumOperands << "; " 1841 << "i != e; ++i)\n"; 1842 OS << " Classes[i] = InvalidMatchClass;\n\n"; 1843 1844 OS << " // Some state to try to produce better error messages.\n"; 1845 OS << " bool HadMatchOtherThanFeatures = false;\n\n"; 1846 OS << " // Set ErrorInfo to the operand that mismatches if it is \n"; 1847 OS << " // wrong for all instances of the instruction.\n"; 1848 OS << " ErrorInfo = ~0U;\n"; 1849 1850 // Emit code to search the table. 1851 OS << " // Search the table.\n"; 1852 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n"; 1853 OS << " std::equal_range(MatchTable, MatchTable+" 1854 << Info.Instructions.size() << ", Mnemonic, LessOpcode());\n\n"; 1855 1856 OS << " // Return a more specific error code if no mnemonics match.\n"; 1857 OS << " if (MnemonicRange.first == MnemonicRange.second)\n"; 1858 OS << " return Match_MnemonicFail;\n\n"; 1859 1860 OS << " for (const MatchEntry *it = MnemonicRange.first, " 1861 << "*ie = MnemonicRange.second;\n"; 1862 OS << " it != ie; ++it) {\n"; 1863 1864 OS << " // equal_range guarantees that instruction mnemonic matches.\n"; 1865 OS << " assert(Mnemonic == it->Mnemonic);\n"; 1866 1867 // Emit check that the subclasses match. 1868 OS << " bool OperandsValid = true;\n"; 1869 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n"; 1870 OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n"; 1871 OS << " continue;\n"; 1872 OS << " // If this operand is broken for all of the instances of this\n"; 1873 OS << " // mnemonic, keep track of it so we can report loc info.\n"; 1874 OS << " if (it == MnemonicRange.first || ErrorInfo == i+1)\n"; 1875 OS << " ErrorInfo = i+1;\n"; 1876 OS << " else\n"; 1877 OS << " ErrorInfo = ~0U;"; 1878 OS << " // Otherwise, just reject this instance of the mnemonic.\n"; 1879 OS << " OperandsValid = false;\n"; 1880 OS << " break;\n"; 1881 OS << " }\n\n"; 1882 1883 OS << " if (!OperandsValid) continue;\n"; 1884 1885 // Emit check that the required features are available. 1886 OS << " if ((AvailableFeatures & it->RequiredFeatures) " 1887 << "!= it->RequiredFeatures) {\n"; 1888 OS << " HadMatchOtherThanFeatures = true;\n"; 1889 OS << " continue;\n"; 1890 OS << " }\n"; 1891 1892 OS << "\n"; 1893 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n"; 1894 1895 // Call the post-processing function, if used. 1896 std::string InsnCleanupFn = 1897 AsmParser->getValueAsString("AsmParserInstCleanup"); 1898 if (!InsnCleanupFn.empty()) 1899 OS << " " << InsnCleanupFn << "(Inst);\n"; 1900 1901 OS << " return Match_Success;\n"; 1902 OS << " }\n\n"; 1903 1904 OS << " // Okay, we had no match. Try to return a useful error code.\n"; 1905 OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n"; 1906 OS << " return Match_InvalidOperand;\n"; 1907 OS << "}\n\n"; 1908 1909 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n"; 1910} 1911