AsmMatcherEmitter.cpp revision 61131ab15fd593a2e295d79fe2714e7bc21f2ec8
1//===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This tablegen backend emits a target specifier matcher for converting parsed 11// assembly operands in the MCInst structures. It also emits a matcher for 12// custom operand parsing. 13// 14// Converting assembly operands into MCInst structures 15// --------------------------------------------------- 16// 17// The input to the target specific matcher is a list of literal tokens and 18// operands. The target specific parser should generally eliminate any syntax 19// which is not relevant for matching; for example, comma tokens should have 20// already been consumed and eliminated by the parser. Most instructions will 21// end up with a single literal token (the instruction name) and some number of 22// operands. 23// 24// Some example inputs, for X86: 25// 'addl' (immediate ...) (register ...) 26// 'add' (immediate ...) (memory ...) 27// 'call' '*' %epc 28// 29// The assembly matcher is responsible for converting this input into a precise 30// machine instruction (i.e., an instruction with a well defined encoding). This 31// mapping has several properties which complicate matching: 32// 33// - It may be ambiguous; many architectures can legally encode particular 34// variants of an instruction in different ways (for example, using a smaller 35// encoding for small immediates). Such ambiguities should never be 36// arbitrarily resolved by the assembler, the assembler is always responsible 37// for choosing the "best" available instruction. 38// 39// - It may depend on the subtarget or the assembler context. Instructions 40// which are invalid for the current mode, but otherwise unambiguous (e.g., 41// an SSE instruction in a file being assembled for i486) should be accepted 42// and rejected by the assembler front end. However, if the proper encoding 43// for an instruction is dependent on the assembler context then the matcher 44// is responsible for selecting the correct machine instruction for the 45// current mode. 46// 47// The core matching algorithm attempts to exploit the regularity in most 48// instruction sets to quickly determine the set of possibly matching 49// instructions, and the simplify the generated code. Additionally, this helps 50// to ensure that the ambiguities are intentionally resolved by the user. 51// 52// The matching is divided into two distinct phases: 53// 54// 1. Classification: Each operand is mapped to the unique set which (a) 55// contains it, and (b) is the largest such subset for which a single 56// instruction could match all members. 57// 58// For register classes, we can generate these subgroups automatically. For 59// arbitrary operands, we expect the user to define the classes and their 60// relations to one another (for example, 8-bit signed immediates as a 61// subset of 32-bit immediates). 62// 63// By partitioning the operands in this way, we guarantee that for any 64// tuple of classes, any single instruction must match either all or none 65// of the sets of operands which could classify to that tuple. 66// 67// In addition, the subset relation amongst classes induces a partial order 68// on such tuples, which we use to resolve ambiguities. 69// 70// 2. The input can now be treated as a tuple of classes (static tokens are 71// simple singleton sets). Each such tuple should generally map to a single 72// instruction (we currently ignore cases where this isn't true, whee!!!), 73// which we can emit a simple matcher for. 74// 75// Custom Operand Parsing 76// ---------------------- 77// 78// Some targets need a custom way to parse operands, some specific instructions 79// can contain arguments that can represent processor flags and other kinds of 80// identifiers that need to be mapped to specific values in the final encoded 81// instructions. The target specific custom operand parsing works in the 82// following way: 83// 84// 1. A operand match table is built, each entry contains a mnemonic, an 85// operand class, a mask for all operand positions for that same 86// class/mnemonic and target features to be checked while trying to match. 87// 88// 2. The operand matcher will try every possible entry with the same 89// mnemonic and will check if the target feature for this mnemonic also 90// matches. After that, if the operand to be matched has its index 91// present in the mask, a successful match occurs. Otherwise, fallback 92// to the regular operand parsing. 93// 94// 3. For a match success, each operand class that has a 'ParserMethod' 95// becomes part of a switch from where the custom method is called. 96// 97//===----------------------------------------------------------------------===// 98 99#include "CodeGenTarget.h" 100#include "StringToOffsetTable.h" 101#include "llvm/ADT/OwningPtr.h" 102#include "llvm/ADT/PointerUnion.h" 103#include "llvm/ADT/SmallPtrSet.h" 104#include "llvm/ADT/SmallVector.h" 105#include "llvm/ADT/STLExtras.h" 106#include "llvm/ADT/StringExtras.h" 107#include "llvm/Support/CommandLine.h" 108#include "llvm/Support/Debug.h" 109#include "llvm/Support/ErrorHandling.h" 110#include "llvm/TableGen/Error.h" 111#include "llvm/TableGen/Record.h" 112#include "llvm/TableGen/StringMatcher.h" 113#include "llvm/TableGen/TableGenBackend.h" 114#include <cassert> 115#include <map> 116#include <set> 117using namespace llvm; 118 119static cl::opt<std::string> 120MatchPrefix("match-prefix", cl::init(""), 121 cl::desc("Only match instructions with the given prefix")); 122 123namespace { 124class AsmMatcherInfo; 125struct SubtargetFeatureInfo; 126 127class AsmMatcherEmitter { 128 RecordKeeper &Records; 129public: 130 AsmMatcherEmitter(RecordKeeper &R) : Records(R) {} 131 132 void run(raw_ostream &o); 133}; 134 135/// ClassInfo - Helper class for storing the information about a particular 136/// class of operands which can be matched. 137struct ClassInfo { 138 enum ClassInfoKind { 139 /// Invalid kind, for use as a sentinel value. 140 Invalid = 0, 141 142 /// The class for a particular token. 143 Token, 144 145 /// The (first) register class, subsequent register classes are 146 /// RegisterClass0+1, and so on. 147 RegisterClass0, 148 149 /// The (first) user defined class, subsequent user defined classes are 150 /// UserClass0+1, and so on. 151 UserClass0 = 1<<16 152 }; 153 154 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 + 155 /// N) for the Nth user defined class. 156 unsigned Kind; 157 158 /// SuperClasses - The super classes of this class. Note that for simplicities 159 /// sake user operands only record their immediate super class, while register 160 /// operands include all superclasses. 161 std::vector<ClassInfo*> SuperClasses; 162 163 /// Name - The full class name, suitable for use in an enum. 164 std::string Name; 165 166 /// ClassName - The unadorned generic name for this class (e.g., Token). 167 std::string ClassName; 168 169 /// ValueName - The name of the value this class represents; for a token this 170 /// is the literal token string, for an operand it is the TableGen class (or 171 /// empty if this is a derived class). 172 std::string ValueName; 173 174 /// PredicateMethod - The name of the operand method to test whether the 175 /// operand matches this class; this is not valid for Token or register kinds. 176 std::string PredicateMethod; 177 178 /// RenderMethod - The name of the operand method to add this operand to an 179 /// MCInst; this is not valid for Token or register kinds. 180 std::string RenderMethod; 181 182 /// ParserMethod - The name of the operand method to do a target specific 183 /// parsing on the operand. 184 std::string ParserMethod; 185 186 /// For register classes, the records for all the registers in this class. 187 std::set<Record*> Registers; 188 189 /// For custom match classes, he diagnostic kind for when the predicate fails. 190 std::string DiagnosticType; 191public: 192 /// isRegisterClass() - Check if this is a register class. 193 bool isRegisterClass() const { 194 return Kind >= RegisterClass0 && Kind < UserClass0; 195 } 196 197 /// isUserClass() - Check if this is a user defined class. 198 bool isUserClass() const { 199 return Kind >= UserClass0; 200 } 201 202 /// isRelatedTo - Check whether this class is "related" to \p RHS. Classes 203 /// are related if they are in the same class hierarchy. 204 bool isRelatedTo(const ClassInfo &RHS) const { 205 // Tokens are only related to tokens. 206 if (Kind == Token || RHS.Kind == Token) 207 return Kind == Token && RHS.Kind == Token; 208 209 // Registers classes are only related to registers classes, and only if 210 // their intersection is non-empty. 211 if (isRegisterClass() || RHS.isRegisterClass()) { 212 if (!isRegisterClass() || !RHS.isRegisterClass()) 213 return false; 214 215 std::set<Record*> Tmp; 216 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin()); 217 std::set_intersection(Registers.begin(), Registers.end(), 218 RHS.Registers.begin(), RHS.Registers.end(), 219 II); 220 221 return !Tmp.empty(); 222 } 223 224 // Otherwise we have two users operands; they are related if they are in the 225 // same class hierarchy. 226 // 227 // FIXME: This is an oversimplification, they should only be related if they 228 // intersect, however we don't have that information. 229 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!"); 230 const ClassInfo *Root = this; 231 while (!Root->SuperClasses.empty()) 232 Root = Root->SuperClasses.front(); 233 234 const ClassInfo *RHSRoot = &RHS; 235 while (!RHSRoot->SuperClasses.empty()) 236 RHSRoot = RHSRoot->SuperClasses.front(); 237 238 return Root == RHSRoot; 239 } 240 241 /// isSubsetOf - Test whether this class is a subset of \p RHS. 242 bool isSubsetOf(const ClassInfo &RHS) const { 243 // This is a subset of RHS if it is the same class... 244 if (this == &RHS) 245 return true; 246 247 // ... or if any of its super classes are a subset of RHS. 248 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(), 249 ie = SuperClasses.end(); it != ie; ++it) 250 if ((*it)->isSubsetOf(RHS)) 251 return true; 252 253 return false; 254 } 255 256 /// operator< - Compare two classes. 257 bool operator<(const ClassInfo &RHS) const { 258 if (this == &RHS) 259 return false; 260 261 // Unrelated classes can be ordered by kind. 262 if (!isRelatedTo(RHS)) 263 return Kind < RHS.Kind; 264 265 switch (Kind) { 266 case Invalid: 267 llvm_unreachable("Invalid kind!"); 268 269 default: 270 // This class precedes the RHS if it is a proper subset of the RHS. 271 if (isSubsetOf(RHS)) 272 return true; 273 if (RHS.isSubsetOf(*this)) 274 return false; 275 276 // Otherwise, order by name to ensure we have a total ordering. 277 return ValueName < RHS.ValueName; 278 } 279 } 280}; 281 282namespace { 283/// Sort ClassInfo pointers independently of pointer value. 284struct LessClassInfoPtr { 285 bool operator()(const ClassInfo *LHS, const ClassInfo *RHS) const { 286 return *LHS < *RHS; 287 } 288}; 289} 290 291/// MatchableInfo - Helper class for storing the necessary information for an 292/// instruction or alias which is capable of being matched. 293struct MatchableInfo { 294 struct AsmOperand { 295 /// Token - This is the token that the operand came from. 296 StringRef Token; 297 298 /// The unique class instance this operand should match. 299 ClassInfo *Class; 300 301 /// The operand name this is, if anything. 302 StringRef SrcOpName; 303 304 /// The suboperand index within SrcOpName, or -1 for the entire operand. 305 int SubOpIdx; 306 307 /// Register record if this token is singleton register. 308 Record *SingletonReg; 309 310 explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1), 311 SingletonReg(0) {} 312 }; 313 314 /// ResOperand - This represents a single operand in the result instruction 315 /// generated by the match. In cases (like addressing modes) where a single 316 /// assembler operand expands to multiple MCOperands, this represents the 317 /// single assembler operand, not the MCOperand. 318 struct ResOperand { 319 enum { 320 /// RenderAsmOperand - This represents an operand result that is 321 /// generated by calling the render method on the assembly operand. The 322 /// corresponding AsmOperand is specified by AsmOperandNum. 323 RenderAsmOperand, 324 325 /// TiedOperand - This represents a result operand that is a duplicate of 326 /// a previous result operand. 327 TiedOperand, 328 329 /// ImmOperand - This represents an immediate value that is dumped into 330 /// the operand. 331 ImmOperand, 332 333 /// RegOperand - This represents a fixed register that is dumped in. 334 RegOperand 335 } Kind; 336 337 union { 338 /// This is the operand # in the AsmOperands list that this should be 339 /// copied from. 340 unsigned AsmOperandNum; 341 342 /// TiedOperandNum - This is the (earlier) result operand that should be 343 /// copied from. 344 unsigned TiedOperandNum; 345 346 /// ImmVal - This is the immediate value added to the instruction. 347 int64_t ImmVal; 348 349 /// Register - This is the register record. 350 Record *Register; 351 }; 352 353 /// MINumOperands - The number of MCInst operands populated by this 354 /// operand. 355 unsigned MINumOperands; 356 357 static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) { 358 ResOperand X; 359 X.Kind = RenderAsmOperand; 360 X.AsmOperandNum = AsmOpNum; 361 X.MINumOperands = NumOperands; 362 return X; 363 } 364 365 static ResOperand getTiedOp(unsigned TiedOperandNum) { 366 ResOperand X; 367 X.Kind = TiedOperand; 368 X.TiedOperandNum = TiedOperandNum; 369 X.MINumOperands = 1; 370 return X; 371 } 372 373 static ResOperand getImmOp(int64_t Val) { 374 ResOperand X; 375 X.Kind = ImmOperand; 376 X.ImmVal = Val; 377 X.MINumOperands = 1; 378 return X; 379 } 380 381 static ResOperand getRegOp(Record *Reg) { 382 ResOperand X; 383 X.Kind = RegOperand; 384 X.Register = Reg; 385 X.MINumOperands = 1; 386 return X; 387 } 388 }; 389 390 /// AsmVariantID - Target's assembly syntax variant no. 391 int AsmVariantID; 392 393 /// TheDef - This is the definition of the instruction or InstAlias that this 394 /// matchable came from. 395 Record *const TheDef; 396 397 /// DefRec - This is the definition that it came from. 398 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec; 399 400 const CodeGenInstruction *getResultInst() const { 401 if (DefRec.is<const CodeGenInstruction*>()) 402 return DefRec.get<const CodeGenInstruction*>(); 403 return DefRec.get<const CodeGenInstAlias*>()->ResultInst; 404 } 405 406 /// ResOperands - This is the operand list that should be built for the result 407 /// MCInst. 408 SmallVector<ResOperand, 8> ResOperands; 409 410 /// AsmString - The assembly string for this instruction (with variants 411 /// removed), e.g. "movsx $src, $dst". 412 std::string AsmString; 413 414 /// Mnemonic - This is the first token of the matched instruction, its 415 /// mnemonic. 416 StringRef Mnemonic; 417 418 /// AsmOperands - The textual operands that this instruction matches, 419 /// annotated with a class and where in the OperandList they were defined. 420 /// This directly corresponds to the tokenized AsmString after the mnemonic is 421 /// removed. 422 SmallVector<AsmOperand, 8> AsmOperands; 423 424 /// Predicates - The required subtarget features to match this instruction. 425 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures; 426 427 /// ConversionFnKind - The enum value which is passed to the generated 428 /// convertToMCInst to convert parsed operands into an MCInst for this 429 /// function. 430 std::string ConversionFnKind; 431 432 MatchableInfo(const CodeGenInstruction &CGI) 433 : AsmVariantID(0), TheDef(CGI.TheDef), DefRec(&CGI), 434 AsmString(CGI.AsmString) { 435 } 436 437 MatchableInfo(const CodeGenInstAlias *Alias) 438 : AsmVariantID(0), TheDef(Alias->TheDef), DefRec(Alias), 439 AsmString(Alias->AsmString) { 440 } 441 442 // Two-operand aliases clone from the main matchable, but mark the second 443 // operand as a tied operand of the first for purposes of the assembler. 444 void formTwoOperandAlias(StringRef Constraint); 445 446 void initialize(const AsmMatcherInfo &Info, 447 SmallPtrSet<Record*, 16> &SingletonRegisters, 448 int AsmVariantNo, std::string &RegisterPrefix); 449 450 /// validate - Return true if this matchable is a valid thing to match against 451 /// and perform a bunch of validity checking. 452 bool validate(StringRef CommentDelimiter, bool Hack) const; 453 454 /// extractSingletonRegisterForAsmOperand - Extract singleton register, 455 /// if present, from specified token. 456 void 457 extractSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info, 458 std::string &RegisterPrefix); 459 460 /// findAsmOperand - Find the AsmOperand with the specified name and 461 /// suboperand index. 462 int findAsmOperand(StringRef N, int SubOpIdx) const { 463 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) 464 if (N == AsmOperands[i].SrcOpName && 465 SubOpIdx == AsmOperands[i].SubOpIdx) 466 return i; 467 return -1; 468 } 469 470 /// findAsmOperandNamed - Find the first AsmOperand with the specified name. 471 /// This does not check the suboperand index. 472 int findAsmOperandNamed(StringRef N) const { 473 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) 474 if (N == AsmOperands[i].SrcOpName) 475 return i; 476 return -1; 477 } 478 479 void buildInstructionResultOperands(); 480 void buildAliasResultOperands(); 481 482 /// operator< - Compare two matchables. 483 bool operator<(const MatchableInfo &RHS) const { 484 // The primary comparator is the instruction mnemonic. 485 if (Mnemonic != RHS.Mnemonic) 486 return Mnemonic < RHS.Mnemonic; 487 488 if (AsmOperands.size() != RHS.AsmOperands.size()) 489 return AsmOperands.size() < RHS.AsmOperands.size(); 490 491 // Compare lexicographically by operand. The matcher validates that other 492 // orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith(). 493 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 494 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class) 495 return true; 496 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class) 497 return false; 498 } 499 500 // Give matches that require more features higher precedence. This is useful 501 // because we cannot define AssemblerPredicates with the negation of 502 // processor features. For example, ARM v6 "nop" may be either a HINT or 503 // MOV. With v6, we want to match HINT. The assembler has no way to 504 // predicate MOV under "NoV6", but HINT will always match first because it 505 // requires V6 while MOV does not. 506 if (RequiredFeatures.size() != RHS.RequiredFeatures.size()) 507 return RequiredFeatures.size() > RHS.RequiredFeatures.size(); 508 509 return false; 510 } 511 512 /// couldMatchAmbiguouslyWith - Check whether this matchable could 513 /// ambiguously match the same set of operands as \p RHS (without being a 514 /// strictly superior match). 515 bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) { 516 // The primary comparator is the instruction mnemonic. 517 if (Mnemonic != RHS.Mnemonic) 518 return false; 519 520 // The number of operands is unambiguous. 521 if (AsmOperands.size() != RHS.AsmOperands.size()) 522 return false; 523 524 // Otherwise, make sure the ordering of the two instructions is unambiguous 525 // by checking that either (a) a token or operand kind discriminates them, 526 // or (b) the ordering among equivalent kinds is consistent. 527 528 // Tokens and operand kinds are unambiguous (assuming a correct target 529 // specific parser). 530 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) 531 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind || 532 AsmOperands[i].Class->Kind == ClassInfo::Token) 533 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class || 534 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class) 535 return false; 536 537 // Otherwise, this operand could commute if all operands are equivalent, or 538 // there is a pair of operands that compare less than and a pair that 539 // compare greater than. 540 bool HasLT = false, HasGT = false; 541 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 542 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class) 543 HasLT = true; 544 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class) 545 HasGT = true; 546 } 547 548 return !(HasLT ^ HasGT); 549 } 550 551 void dump(); 552 553private: 554 void tokenizeAsmString(const AsmMatcherInfo &Info); 555}; 556 557/// SubtargetFeatureInfo - Helper class for storing information on a subtarget 558/// feature which participates in instruction matching. 559struct SubtargetFeatureInfo { 560 /// \brief The predicate record for this feature. 561 Record *TheDef; 562 563 /// \brief An unique index assigned to represent this feature. 564 unsigned Index; 565 566 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {} 567 568 /// \brief The name of the enumerated constant identifying this feature. 569 std::string getEnumName() const { 570 return "Feature_" + TheDef->getName(); 571 } 572}; 573 574struct OperandMatchEntry { 575 unsigned OperandMask; 576 MatchableInfo* MI; 577 ClassInfo *CI; 578 579 static OperandMatchEntry create(MatchableInfo* mi, ClassInfo *ci, 580 unsigned opMask) { 581 OperandMatchEntry X; 582 X.OperandMask = opMask; 583 X.CI = ci; 584 X.MI = mi; 585 return X; 586 } 587}; 588 589 590class AsmMatcherInfo { 591public: 592 /// Tracked Records 593 RecordKeeper &Records; 594 595 /// The tablegen AsmParser record. 596 Record *AsmParser; 597 598 /// Target - The target information. 599 CodeGenTarget &Target; 600 601 /// The classes which are needed for matching. 602 std::vector<ClassInfo*> Classes; 603 604 /// The information on the matchables to match. 605 std::vector<MatchableInfo*> Matchables; 606 607 /// Info for custom matching operands by user defined methods. 608 std::vector<OperandMatchEntry> OperandMatchInfo; 609 610 /// Map of Register records to their class information. 611 typedef std::map<Record*, ClassInfo*, LessRecordByID> RegisterClassesTy; 612 RegisterClassesTy RegisterClasses; 613 614 /// Map of Predicate records to their subtarget information. 615 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures; 616 617 /// Map of AsmOperandClass records to their class information. 618 std::map<Record*, ClassInfo*> AsmOperandClasses; 619 620private: 621 /// Map of token to class information which has already been constructed. 622 std::map<std::string, ClassInfo*> TokenClasses; 623 624 /// Map of RegisterClass records to their class information. 625 std::map<Record*, ClassInfo*> RegisterClassClasses; 626 627private: 628 /// getTokenClass - Lookup or create the class for the given token. 629 ClassInfo *getTokenClass(StringRef Token); 630 631 /// getOperandClass - Lookup or create the class for the given operand. 632 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI, 633 int SubOpIdx); 634 ClassInfo *getOperandClass(Record *Rec, int SubOpIdx); 635 636 /// buildRegisterClasses - Build the ClassInfo* instances for register 637 /// classes. 638 void buildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters); 639 640 /// buildOperandClasses - Build the ClassInfo* instances for user defined 641 /// operand classes. 642 void buildOperandClasses(); 643 644 void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName, 645 unsigned AsmOpIdx); 646 void buildAliasOperandReference(MatchableInfo *II, StringRef OpName, 647 MatchableInfo::AsmOperand &Op); 648 649public: 650 AsmMatcherInfo(Record *AsmParser, 651 CodeGenTarget &Target, 652 RecordKeeper &Records); 653 654 /// buildInfo - Construct the various tables used during matching. 655 void buildInfo(); 656 657 /// buildOperandMatchInfo - Build the necessary information to handle user 658 /// defined operand parsing methods. 659 void buildOperandMatchInfo(); 660 661 /// getSubtargetFeature - Lookup or create the subtarget feature info for the 662 /// given operand. 663 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const { 664 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!"); 665 std::map<Record*, SubtargetFeatureInfo*>::const_iterator I = 666 SubtargetFeatures.find(Def); 667 return I == SubtargetFeatures.end() ? 0 : I->second; 668 } 669 670 RecordKeeper &getRecords() const { 671 return Records; 672 } 673}; 674 675} // End anonymous namespace 676 677void MatchableInfo::dump() { 678 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n"; 679 680 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 681 AsmOperand &Op = AsmOperands[i]; 682 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - "; 683 errs() << '\"' << Op.Token << "\"\n"; 684 } 685} 686 687static std::pair<StringRef, StringRef> 688parseTwoOperandConstraint(StringRef S, ArrayRef<SMLoc> Loc) { 689 // Split via the '='. 690 std::pair<StringRef, StringRef> Ops = S.split('='); 691 if (Ops.second == "") 692 PrintFatalError(Loc, "missing '=' in two-operand alias constraint"); 693 // Trim whitespace and the leading '$' on the operand names. 694 size_t start = Ops.first.find_first_of('$'); 695 if (start == std::string::npos) 696 PrintFatalError(Loc, "expected '$' prefix on asm operand name"); 697 Ops.first = Ops.first.slice(start + 1, std::string::npos); 698 size_t end = Ops.first.find_last_of(" \t"); 699 Ops.first = Ops.first.slice(0, end); 700 // Now the second operand. 701 start = Ops.second.find_first_of('$'); 702 if (start == std::string::npos) 703 PrintFatalError(Loc, "expected '$' prefix on asm operand name"); 704 Ops.second = Ops.second.slice(start + 1, std::string::npos); 705 end = Ops.second.find_last_of(" \t"); 706 Ops.first = Ops.first.slice(0, end); 707 return Ops; 708} 709 710void MatchableInfo::formTwoOperandAlias(StringRef Constraint) { 711 // Figure out which operands are aliased and mark them as tied. 712 std::pair<StringRef, StringRef> Ops = 713 parseTwoOperandConstraint(Constraint, TheDef->getLoc()); 714 715 // Find the AsmOperands that refer to the operands we're aliasing. 716 int SrcAsmOperand = findAsmOperandNamed(Ops.first); 717 int DstAsmOperand = findAsmOperandNamed(Ops.second); 718 if (SrcAsmOperand == -1) 719 PrintFatalError(TheDef->getLoc(), 720 "unknown source two-operand alias operand '" + 721 Ops.first.str() + "'."); 722 if (DstAsmOperand == -1) 723 PrintFatalError(TheDef->getLoc(), 724 "unknown destination two-operand alias operand '" + 725 Ops.second.str() + "'."); 726 727 // Find the ResOperand that refers to the operand we're aliasing away 728 // and update it to refer to the combined operand instead. 729 for (unsigned i = 0, e = ResOperands.size(); i != e; ++i) { 730 ResOperand &Op = ResOperands[i]; 731 if (Op.Kind == ResOperand::RenderAsmOperand && 732 Op.AsmOperandNum == (unsigned)SrcAsmOperand) { 733 Op.AsmOperandNum = DstAsmOperand; 734 break; 735 } 736 } 737 // Remove the AsmOperand for the alias operand. 738 AsmOperands.erase(AsmOperands.begin() + SrcAsmOperand); 739 // Adjust the ResOperand references to any AsmOperands that followed 740 // the one we just deleted. 741 for (unsigned i = 0, e = ResOperands.size(); i != e; ++i) { 742 ResOperand &Op = ResOperands[i]; 743 switch(Op.Kind) { 744 default: 745 // Nothing to do for operands that don't reference AsmOperands. 746 break; 747 case ResOperand::RenderAsmOperand: 748 if (Op.AsmOperandNum > (unsigned)SrcAsmOperand) 749 --Op.AsmOperandNum; 750 break; 751 case ResOperand::TiedOperand: 752 if (Op.TiedOperandNum > (unsigned)SrcAsmOperand) 753 --Op.TiedOperandNum; 754 break; 755 } 756 } 757} 758 759void MatchableInfo::initialize(const AsmMatcherInfo &Info, 760 SmallPtrSet<Record*, 16> &SingletonRegisters, 761 int AsmVariantNo, std::string &RegisterPrefix) { 762 AsmVariantID = AsmVariantNo; 763 AsmString = 764 CodeGenInstruction::FlattenAsmStringVariants(AsmString, AsmVariantNo); 765 766 tokenizeAsmString(Info); 767 768 // Compute the require features. 769 std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates"); 770 for (unsigned i = 0, e = Predicates.size(); i != e; ++i) 771 if (SubtargetFeatureInfo *Feature = 772 Info.getSubtargetFeature(Predicates[i])) 773 RequiredFeatures.push_back(Feature); 774 775 // Collect singleton registers, if used. 776 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 777 extractSingletonRegisterForAsmOperand(i, Info, RegisterPrefix); 778 if (Record *Reg = AsmOperands[i].SingletonReg) 779 SingletonRegisters.insert(Reg); 780 } 781} 782 783/// tokenizeAsmString - Tokenize a simplified assembly string. 784void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info) { 785 StringRef String = AsmString; 786 unsigned Prev = 0; 787 bool InTok = true; 788 for (unsigned i = 0, e = String.size(); i != e; ++i) { 789 switch (String[i]) { 790 case '[': 791 case ']': 792 case '*': 793 case '!': 794 case ' ': 795 case '\t': 796 case ',': 797 if (InTok) { 798 AsmOperands.push_back(AsmOperand(String.slice(Prev, i))); 799 InTok = false; 800 } 801 if (!isspace(String[i]) && String[i] != ',') 802 AsmOperands.push_back(AsmOperand(String.substr(i, 1))); 803 Prev = i + 1; 804 break; 805 806 case '\\': 807 if (InTok) { 808 AsmOperands.push_back(AsmOperand(String.slice(Prev, i))); 809 InTok = false; 810 } 811 ++i; 812 assert(i != String.size() && "Invalid quoted character"); 813 AsmOperands.push_back(AsmOperand(String.substr(i, 1))); 814 Prev = i + 1; 815 break; 816 817 case '$': { 818 if (InTok) { 819 AsmOperands.push_back(AsmOperand(String.slice(Prev, i))); 820 InTok = false; 821 } 822 823 // If this isn't "${", treat like a normal token. 824 if (i + 1 == String.size() || String[i + 1] != '{') { 825 Prev = i; 826 break; 827 } 828 829 StringRef::iterator End = std::find(String.begin() + i, String.end(),'}'); 830 assert(End != String.end() && "Missing brace in operand reference!"); 831 size_t EndPos = End - String.begin(); 832 AsmOperands.push_back(AsmOperand(String.slice(i, EndPos+1))); 833 Prev = EndPos + 1; 834 i = EndPos; 835 break; 836 } 837 838 case '.': 839 if (InTok) 840 AsmOperands.push_back(AsmOperand(String.slice(Prev, i))); 841 Prev = i; 842 InTok = true; 843 break; 844 845 default: 846 InTok = true; 847 } 848 } 849 if (InTok && Prev != String.size()) 850 AsmOperands.push_back(AsmOperand(String.substr(Prev))); 851 852 // The first token of the instruction is the mnemonic, which must be a 853 // simple string, not a $foo variable or a singleton register. 854 if (AsmOperands.empty()) 855 PrintFatalError(TheDef->getLoc(), 856 "Instruction '" + TheDef->getName() + "' has no tokens"); 857 Mnemonic = AsmOperands[0].Token; 858 if (Mnemonic.empty()) 859 PrintFatalError(TheDef->getLoc(), 860 "Missing instruction mnemonic"); 861 // FIXME : Check and raise an error if it is a register. 862 if (Mnemonic[0] == '$') 863 PrintFatalError(TheDef->getLoc(), 864 "Invalid instruction mnemonic '" + Mnemonic.str() + "'!"); 865 866 // Remove the first operand, it is tracked in the mnemonic field. 867 AsmOperands.erase(AsmOperands.begin()); 868} 869 870bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const { 871 // Reject matchables with no .s string. 872 if (AsmString.empty()) 873 PrintFatalError(TheDef->getLoc(), "instruction with empty asm string"); 874 875 // Reject any matchables with a newline in them, they should be marked 876 // isCodeGenOnly if they are pseudo instructions. 877 if (AsmString.find('\n') != std::string::npos) 878 PrintFatalError(TheDef->getLoc(), 879 "multiline instruction is not valid for the asmparser, " 880 "mark it isCodeGenOnly"); 881 882 // Remove comments from the asm string. We know that the asmstring only 883 // has one line. 884 if (!CommentDelimiter.empty() && 885 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos) 886 PrintFatalError(TheDef->getLoc(), 887 "asmstring for instruction has comment character in it, " 888 "mark it isCodeGenOnly"); 889 890 // Reject matchables with operand modifiers, these aren't something we can 891 // handle, the target should be refactored to use operands instead of 892 // modifiers. 893 // 894 // Also, check for instructions which reference the operand multiple times; 895 // this implies a constraint we would not honor. 896 std::set<std::string> OperandNames; 897 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) { 898 StringRef Tok = AsmOperands[i].Token; 899 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos) 900 PrintFatalError(TheDef->getLoc(), 901 "matchable with operand modifier '" + Tok.str() + 902 "' not supported by asm matcher. Mark isCodeGenOnly!"); 903 904 // Verify that any operand is only mentioned once. 905 // We reject aliases and ignore instructions for now. 906 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) { 907 if (!Hack) 908 PrintFatalError(TheDef->getLoc(), 909 "ERROR: matchable with tied operand '" + Tok.str() + 910 "' can never be matched!"); 911 // FIXME: Should reject these. The ARM backend hits this with $lane in a 912 // bunch of instructions. It is unclear what the right answer is. 913 DEBUG({ 914 errs() << "warning: '" << TheDef->getName() << "': " 915 << "ignoring instruction with tied operand '" 916 << Tok.str() << "'\n"; 917 }); 918 return false; 919 } 920 } 921 922 return true; 923} 924 925/// extractSingletonRegisterForAsmOperand - Extract singleton register, 926/// if present, from specified token. 927void MatchableInfo:: 928extractSingletonRegisterForAsmOperand(unsigned OperandNo, 929 const AsmMatcherInfo &Info, 930 std::string &RegisterPrefix) { 931 StringRef Tok = AsmOperands[OperandNo].Token; 932 if (RegisterPrefix.empty()) { 933 std::string LoweredTok = Tok.lower(); 934 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(LoweredTok)) 935 AsmOperands[OperandNo].SingletonReg = Reg->TheDef; 936 return; 937 } 938 939 if (!Tok.startswith(RegisterPrefix)) 940 return; 941 942 StringRef RegName = Tok.substr(RegisterPrefix.size()); 943 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName)) 944 AsmOperands[OperandNo].SingletonReg = Reg->TheDef; 945 946 // If there is no register prefix (i.e. "%" in "%eax"), then this may 947 // be some random non-register token, just ignore it. 948 return; 949} 950 951static std::string getEnumNameForToken(StringRef Str) { 952 std::string Res; 953 954 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) { 955 switch (*it) { 956 case '*': Res += "_STAR_"; break; 957 case '%': Res += "_PCT_"; break; 958 case ':': Res += "_COLON_"; break; 959 case '!': Res += "_EXCLAIM_"; break; 960 case '.': Res += "_DOT_"; break; 961 default: 962 if (isalnum(*it)) 963 Res += *it; 964 else 965 Res += "_" + utostr((unsigned) *it) + "_"; 966 } 967 } 968 969 return Res; 970} 971 972ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) { 973 ClassInfo *&Entry = TokenClasses[Token]; 974 975 if (!Entry) { 976 Entry = new ClassInfo(); 977 Entry->Kind = ClassInfo::Token; 978 Entry->ClassName = "Token"; 979 Entry->Name = "MCK_" + getEnumNameForToken(Token); 980 Entry->ValueName = Token; 981 Entry->PredicateMethod = "<invalid>"; 982 Entry->RenderMethod = "<invalid>"; 983 Entry->ParserMethod = ""; 984 Entry->DiagnosticType = ""; 985 Classes.push_back(Entry); 986 } 987 988 return Entry; 989} 990 991ClassInfo * 992AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI, 993 int SubOpIdx) { 994 Record *Rec = OI.Rec; 995 if (SubOpIdx != -1) 996 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef(); 997 return getOperandClass(Rec, SubOpIdx); 998} 999 1000ClassInfo * 1001AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) { 1002 if (Rec->isSubClassOf("RegisterOperand")) { 1003 // RegisterOperand may have an associated ParserMatchClass. If it does, 1004 // use it, else just fall back to the underlying register class. 1005 const RecordVal *R = Rec->getValue("ParserMatchClass"); 1006 if (R == 0 || R->getValue() == 0) 1007 PrintFatalError("Record `" + Rec->getName() + 1008 "' does not have a ParserMatchClass!\n"); 1009 1010 if (DefInit *DI= dyn_cast<DefInit>(R->getValue())) { 1011 Record *MatchClass = DI->getDef(); 1012 if (ClassInfo *CI = AsmOperandClasses[MatchClass]) 1013 return CI; 1014 } 1015 1016 // No custom match class. Just use the register class. 1017 Record *ClassRec = Rec->getValueAsDef("RegClass"); 1018 if (!ClassRec) 1019 PrintFatalError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() + 1020 "' has no associated register class!\n"); 1021 if (ClassInfo *CI = RegisterClassClasses[ClassRec]) 1022 return CI; 1023 PrintFatalError(Rec->getLoc(), "register class has no class info!"); 1024 } 1025 1026 1027 if (Rec->isSubClassOf("RegisterClass")) { 1028 if (ClassInfo *CI = RegisterClassClasses[Rec]) 1029 return CI; 1030 PrintFatalError(Rec->getLoc(), "register class has no class info!"); 1031 } 1032 1033 if (!Rec->isSubClassOf("Operand")) 1034 PrintFatalError(Rec->getLoc(), "Operand `" + Rec->getName() + 1035 "' does not derive from class Operand!\n"); 1036 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass"); 1037 if (ClassInfo *CI = AsmOperandClasses[MatchClass]) 1038 return CI; 1039 1040 PrintFatalError(Rec->getLoc(), "operand has no match class!"); 1041} 1042 1043void AsmMatcherInfo:: 1044buildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) { 1045 const std::vector<CodeGenRegister*> &Registers = 1046 Target.getRegBank().getRegisters(); 1047 ArrayRef<CodeGenRegisterClass*> RegClassList = 1048 Target.getRegBank().getRegClasses(); 1049 1050 // The register sets used for matching. 1051 std::set< std::set<Record*> > RegisterSets; 1052 1053 // Gather the defined sets. 1054 for (ArrayRef<CodeGenRegisterClass*>::const_iterator it = 1055 RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) 1056 RegisterSets.insert(std::set<Record*>( 1057 (*it)->getOrder().begin(), (*it)->getOrder().end())); 1058 1059 // Add any required singleton sets. 1060 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(), 1061 ie = SingletonRegisters.end(); it != ie; ++it) { 1062 Record *Rec = *it; 1063 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1)); 1064 } 1065 1066 // Introduce derived sets where necessary (when a register does not determine 1067 // a unique register set class), and build the mapping of registers to the set 1068 // they should classify to. 1069 std::map<Record*, std::set<Record*> > RegisterMap; 1070 for (std::vector<CodeGenRegister*>::const_iterator it = Registers.begin(), 1071 ie = Registers.end(); it != ie; ++it) { 1072 const CodeGenRegister &CGR = **it; 1073 // Compute the intersection of all sets containing this register. 1074 std::set<Record*> ContainingSet; 1075 1076 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(), 1077 ie = RegisterSets.end(); it != ie; ++it) { 1078 if (!it->count(CGR.TheDef)) 1079 continue; 1080 1081 if (ContainingSet.empty()) { 1082 ContainingSet = *it; 1083 continue; 1084 } 1085 1086 std::set<Record*> Tmp; 1087 std::swap(Tmp, ContainingSet); 1088 std::insert_iterator< std::set<Record*> > II(ContainingSet, 1089 ContainingSet.begin()); 1090 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), II); 1091 } 1092 1093 if (!ContainingSet.empty()) { 1094 RegisterSets.insert(ContainingSet); 1095 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet)); 1096 } 1097 } 1098 1099 // Construct the register classes. 1100 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses; 1101 unsigned Index = 0; 1102 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(), 1103 ie = RegisterSets.end(); it != ie; ++it, ++Index) { 1104 ClassInfo *CI = new ClassInfo(); 1105 CI->Kind = ClassInfo::RegisterClass0 + Index; 1106 CI->ClassName = "Reg" + utostr(Index); 1107 CI->Name = "MCK_Reg" + utostr(Index); 1108 CI->ValueName = ""; 1109 CI->PredicateMethod = ""; // unused 1110 CI->RenderMethod = "addRegOperands"; 1111 CI->Registers = *it; 1112 // FIXME: diagnostic type. 1113 CI->DiagnosticType = ""; 1114 Classes.push_back(CI); 1115 RegisterSetClasses.insert(std::make_pair(*it, CI)); 1116 } 1117 1118 // Find the superclasses; we could compute only the subgroup lattice edges, 1119 // but there isn't really a point. 1120 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(), 1121 ie = RegisterSets.end(); it != ie; ++it) { 1122 ClassInfo *CI = RegisterSetClasses[*it]; 1123 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(), 1124 ie2 = RegisterSets.end(); it2 != ie2; ++it2) 1125 if (*it != *it2 && 1126 std::includes(it2->begin(), it2->end(), it->begin(), it->end())) 1127 CI->SuperClasses.push_back(RegisterSetClasses[*it2]); 1128 } 1129 1130 // Name the register classes which correspond to a user defined RegisterClass. 1131 for (ArrayRef<CodeGenRegisterClass*>::const_iterator 1132 it = RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) { 1133 const CodeGenRegisterClass &RC = **it; 1134 // Def will be NULL for non-user defined register classes. 1135 Record *Def = RC.getDef(); 1136 if (!Def) 1137 continue; 1138 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(RC.getOrder().begin(), 1139 RC.getOrder().end())]; 1140 if (CI->ValueName.empty()) { 1141 CI->ClassName = RC.getName(); 1142 CI->Name = "MCK_" + RC.getName(); 1143 CI->ValueName = RC.getName(); 1144 } else 1145 CI->ValueName = CI->ValueName + "," + RC.getName(); 1146 1147 RegisterClassClasses.insert(std::make_pair(Def, CI)); 1148 } 1149 1150 // Populate the map for individual registers. 1151 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(), 1152 ie = RegisterMap.end(); it != ie; ++it) 1153 RegisterClasses[it->first] = RegisterSetClasses[it->second]; 1154 1155 // Name the register classes which correspond to singleton registers. 1156 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(), 1157 ie = SingletonRegisters.end(); it != ie; ++it) { 1158 Record *Rec = *it; 1159 ClassInfo *CI = RegisterClasses[Rec]; 1160 assert(CI && "Missing singleton register class info!"); 1161 1162 if (CI->ValueName.empty()) { 1163 CI->ClassName = Rec->getName(); 1164 CI->Name = "MCK_" + Rec->getName(); 1165 CI->ValueName = Rec->getName(); 1166 } else 1167 CI->ValueName = CI->ValueName + "," + Rec->getName(); 1168 } 1169} 1170 1171void AsmMatcherInfo::buildOperandClasses() { 1172 std::vector<Record*> AsmOperands = 1173 Records.getAllDerivedDefinitions("AsmOperandClass"); 1174 1175 // Pre-populate AsmOperandClasses map. 1176 for (std::vector<Record*>::iterator it = AsmOperands.begin(), 1177 ie = AsmOperands.end(); it != ie; ++it) 1178 AsmOperandClasses[*it] = new ClassInfo(); 1179 1180 unsigned Index = 0; 1181 for (std::vector<Record*>::iterator it = AsmOperands.begin(), 1182 ie = AsmOperands.end(); it != ie; ++it, ++Index) { 1183 ClassInfo *CI = AsmOperandClasses[*it]; 1184 CI->Kind = ClassInfo::UserClass0 + Index; 1185 1186 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses"); 1187 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) { 1188 DefInit *DI = dyn_cast<DefInit>(Supers->getElement(i)); 1189 if (!DI) { 1190 PrintError((*it)->getLoc(), "Invalid super class reference!"); 1191 continue; 1192 } 1193 1194 ClassInfo *SC = AsmOperandClasses[DI->getDef()]; 1195 if (!SC) 1196 PrintError((*it)->getLoc(), "Invalid super class reference!"); 1197 else 1198 CI->SuperClasses.push_back(SC); 1199 } 1200 CI->ClassName = (*it)->getValueAsString("Name"); 1201 CI->Name = "MCK_" + CI->ClassName; 1202 CI->ValueName = (*it)->getName(); 1203 1204 // Get or construct the predicate method name. 1205 Init *PMName = (*it)->getValueInit("PredicateMethod"); 1206 if (StringInit *SI = dyn_cast<StringInit>(PMName)) { 1207 CI->PredicateMethod = SI->getValue(); 1208 } else { 1209 assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!"); 1210 CI->PredicateMethod = "is" + CI->ClassName; 1211 } 1212 1213 // Get or construct the render method name. 1214 Init *RMName = (*it)->getValueInit("RenderMethod"); 1215 if (StringInit *SI = dyn_cast<StringInit>(RMName)) { 1216 CI->RenderMethod = SI->getValue(); 1217 } else { 1218 assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!"); 1219 CI->RenderMethod = "add" + CI->ClassName + "Operands"; 1220 } 1221 1222 // Get the parse method name or leave it as empty. 1223 Init *PRMName = (*it)->getValueInit("ParserMethod"); 1224 if (StringInit *SI = dyn_cast<StringInit>(PRMName)) 1225 CI->ParserMethod = SI->getValue(); 1226 1227 // Get the diagnostic type or leave it as empty. 1228 // Get the parse method name or leave it as empty. 1229 Init *DiagnosticType = (*it)->getValueInit("DiagnosticType"); 1230 if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType)) 1231 CI->DiagnosticType = SI->getValue(); 1232 1233 AsmOperandClasses[*it] = CI; 1234 Classes.push_back(CI); 1235 } 1236} 1237 1238AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, 1239 CodeGenTarget &target, 1240 RecordKeeper &records) 1241 : Records(records), AsmParser(asmParser), Target(target) { 1242} 1243 1244/// buildOperandMatchInfo - Build the necessary information to handle user 1245/// defined operand parsing methods. 1246void AsmMatcherInfo::buildOperandMatchInfo() { 1247 1248 /// Map containing a mask with all operands indices that can be found for 1249 /// that class inside a instruction. 1250 typedef std::map<ClassInfo*, unsigned, LessClassInfoPtr> OpClassMaskTy; 1251 OpClassMaskTy OpClassMask; 1252 1253 for (std::vector<MatchableInfo*>::const_iterator it = 1254 Matchables.begin(), ie = Matchables.end(); 1255 it != ie; ++it) { 1256 MatchableInfo &II = **it; 1257 OpClassMask.clear(); 1258 1259 // Keep track of all operands of this instructions which belong to the 1260 // same class. 1261 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) { 1262 MatchableInfo::AsmOperand &Op = II.AsmOperands[i]; 1263 if (Op.Class->ParserMethod.empty()) 1264 continue; 1265 unsigned &OperandMask = OpClassMask[Op.Class]; 1266 OperandMask |= (1 << i); 1267 } 1268 1269 // Generate operand match info for each mnemonic/operand class pair. 1270 for (OpClassMaskTy::iterator iit = OpClassMask.begin(), 1271 iie = OpClassMask.end(); iit != iie; ++iit) { 1272 unsigned OpMask = iit->second; 1273 ClassInfo *CI = iit->first; 1274 OperandMatchInfo.push_back(OperandMatchEntry::create(&II, CI, OpMask)); 1275 } 1276 } 1277} 1278 1279void AsmMatcherInfo::buildInfo() { 1280 // Build information about all of the AssemblerPredicates. 1281 std::vector<Record*> AllPredicates = 1282 Records.getAllDerivedDefinitions("Predicate"); 1283 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) { 1284 Record *Pred = AllPredicates[i]; 1285 // Ignore predicates that are not intended for the assembler. 1286 if (!Pred->getValueAsBit("AssemblerMatcherPredicate")) 1287 continue; 1288 1289 if (Pred->getName().empty()) 1290 PrintFatalError(Pred->getLoc(), "Predicate has no name!"); 1291 1292 unsigned FeatureNo = SubtargetFeatures.size(); 1293 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo); 1294 assert(FeatureNo < 32 && "Too many subtarget features!"); 1295 } 1296 1297 // Parse the instructions; we need to do this first so that we can gather the 1298 // singleton register classes. 1299 SmallPtrSet<Record*, 16> SingletonRegisters; 1300 unsigned VariantCount = Target.getAsmParserVariantCount(); 1301 for (unsigned VC = 0; VC != VariantCount; ++VC) { 1302 Record *AsmVariant = Target.getAsmParserVariant(VC); 1303 std::string CommentDelimiter = 1304 AsmVariant->getValueAsString("CommentDelimiter"); 1305 std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix"); 1306 int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); 1307 1308 for (CodeGenTarget::inst_iterator I = Target.inst_begin(), 1309 E = Target.inst_end(); I != E; ++I) { 1310 const CodeGenInstruction &CGI = **I; 1311 1312 // If the tblgen -match-prefix option is specified (for tblgen hackers), 1313 // filter the set of instructions we consider. 1314 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix)) 1315 continue; 1316 1317 // Ignore "codegen only" instructions. 1318 if (CGI.TheDef->getValueAsBit("isCodeGenOnly")) 1319 continue; 1320 1321 // Validate the operand list to ensure we can handle this instruction. 1322 for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) { 1323 const CGIOperandList::OperandInfo &OI = CGI.Operands[i]; 1324 1325 // Validate tied operands. 1326 if (OI.getTiedRegister() != -1) { 1327 // If we have a tied operand that consists of multiple MCOperands, 1328 // reject it. We reject aliases and ignore instructions for now. 1329 if (OI.MINumOperands != 1) { 1330 // FIXME: Should reject these. The ARM backend hits this with $lane 1331 // in a bunch of instructions. The right answer is unclear. 1332 DEBUG({ 1333 errs() << "warning: '" << CGI.TheDef->getName() << "': " 1334 << "ignoring instruction with multi-operand tied operand '" 1335 << OI.Name << "'\n"; 1336 }); 1337 continue; 1338 } 1339 } 1340 } 1341 1342 OwningPtr<MatchableInfo> II(new MatchableInfo(CGI)); 1343 1344 II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix); 1345 1346 // Ignore instructions which shouldn't be matched and diagnose invalid 1347 // instruction definitions with an error. 1348 if (!II->validate(CommentDelimiter, true)) 1349 continue; 1350 1351 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases. 1352 // 1353 // FIXME: This is a total hack. 1354 if (StringRef(II->TheDef->getName()).startswith("Int_") || 1355 StringRef(II->TheDef->getName()).endswith("_Int")) 1356 continue; 1357 1358 Matchables.push_back(II.take()); 1359 } 1360 1361 // Parse all of the InstAlias definitions and stick them in the list of 1362 // matchables. 1363 std::vector<Record*> AllInstAliases = 1364 Records.getAllDerivedDefinitions("InstAlias"); 1365 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) { 1366 CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i], Target); 1367 1368 // If the tblgen -match-prefix option is specified (for tblgen hackers), 1369 // filter the set of instruction aliases we consider, based on the target 1370 // instruction. 1371 if (!StringRef(Alias->ResultInst->TheDef->getName()) 1372 .startswith( MatchPrefix)) 1373 continue; 1374 1375 OwningPtr<MatchableInfo> II(new MatchableInfo(Alias)); 1376 1377 II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix); 1378 1379 // Validate the alias definitions. 1380 II->validate(CommentDelimiter, false); 1381 1382 Matchables.push_back(II.take()); 1383 } 1384 } 1385 1386 // Build info for the register classes. 1387 buildRegisterClasses(SingletonRegisters); 1388 1389 // Build info for the user defined assembly operand classes. 1390 buildOperandClasses(); 1391 1392 // Build the information about matchables, now that we have fully formed 1393 // classes. 1394 std::vector<MatchableInfo*> NewMatchables; 1395 for (std::vector<MatchableInfo*>::iterator it = Matchables.begin(), 1396 ie = Matchables.end(); it != ie; ++it) { 1397 MatchableInfo *II = *it; 1398 1399 // Parse the tokens after the mnemonic. 1400 // Note: buildInstructionOperandReference may insert new AsmOperands, so 1401 // don't precompute the loop bound. 1402 for (unsigned i = 0; i != II->AsmOperands.size(); ++i) { 1403 MatchableInfo::AsmOperand &Op = II->AsmOperands[i]; 1404 StringRef Token = Op.Token; 1405 1406 // Check for singleton registers. 1407 if (Record *RegRecord = II->AsmOperands[i].SingletonReg) { 1408 Op.Class = RegisterClasses[RegRecord]; 1409 assert(Op.Class && Op.Class->Registers.size() == 1 && 1410 "Unexpected class for singleton register"); 1411 continue; 1412 } 1413 1414 // Check for simple tokens. 1415 if (Token[0] != '$') { 1416 Op.Class = getTokenClass(Token); 1417 continue; 1418 } 1419 1420 if (Token.size() > 1 && isdigit(Token[1])) { 1421 Op.Class = getTokenClass(Token); 1422 continue; 1423 } 1424 1425 // Otherwise this is an operand reference. 1426 StringRef OperandName; 1427 if (Token[1] == '{') 1428 OperandName = Token.substr(2, Token.size() - 3); 1429 else 1430 OperandName = Token.substr(1); 1431 1432 if (II->DefRec.is<const CodeGenInstruction*>()) 1433 buildInstructionOperandReference(II, OperandName, i); 1434 else 1435 buildAliasOperandReference(II, OperandName, Op); 1436 } 1437 1438 if (II->DefRec.is<const CodeGenInstruction*>()) { 1439 II->buildInstructionResultOperands(); 1440 // If the instruction has a two-operand alias, build up the 1441 // matchable here. We'll add them in bulk at the end to avoid 1442 // confusing this loop. 1443 std::string Constraint = 1444 II->TheDef->getValueAsString("TwoOperandAliasConstraint"); 1445 if (Constraint != "") { 1446 // Start by making a copy of the original matchable. 1447 OwningPtr<MatchableInfo> AliasII(new MatchableInfo(*II)); 1448 1449 // Adjust it to be a two-operand alias. 1450 AliasII->formTwoOperandAlias(Constraint); 1451 1452 // Add the alias to the matchables list. 1453 NewMatchables.push_back(AliasII.take()); 1454 } 1455 } else 1456 II->buildAliasResultOperands(); 1457 } 1458 if (!NewMatchables.empty()) 1459 Matchables.insert(Matchables.end(), NewMatchables.begin(), 1460 NewMatchables.end()); 1461 1462 // Process token alias definitions and set up the associated superclass 1463 // information. 1464 std::vector<Record*> AllTokenAliases = 1465 Records.getAllDerivedDefinitions("TokenAlias"); 1466 for (unsigned i = 0, e = AllTokenAliases.size(); i != e; ++i) { 1467 Record *Rec = AllTokenAliases[i]; 1468 ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken")); 1469 ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken")); 1470 if (FromClass == ToClass) 1471 PrintFatalError(Rec->getLoc(), 1472 "error: Destination value identical to source value."); 1473 FromClass->SuperClasses.push_back(ToClass); 1474 } 1475 1476 // Reorder classes so that classes precede super classes. 1477 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>()); 1478} 1479 1480/// buildInstructionOperandReference - The specified operand is a reference to a 1481/// named operand such as $src. Resolve the Class and OperandInfo pointers. 1482void AsmMatcherInfo:: 1483buildInstructionOperandReference(MatchableInfo *II, 1484 StringRef OperandName, 1485 unsigned AsmOpIdx) { 1486 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>(); 1487 const CGIOperandList &Operands = CGI.Operands; 1488 MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx]; 1489 1490 // Map this token to an operand. 1491 unsigned Idx; 1492 if (!Operands.hasOperandNamed(OperandName, Idx)) 1493 PrintFatalError(II->TheDef->getLoc(), "error: unable to find operand: '" + 1494 OperandName.str() + "'"); 1495 1496 // If the instruction operand has multiple suboperands, but the parser 1497 // match class for the asm operand is still the default "ImmAsmOperand", 1498 // then handle each suboperand separately. 1499 if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) { 1500 Record *Rec = Operands[Idx].Rec; 1501 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!"); 1502 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass"); 1503 if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") { 1504 // Insert remaining suboperands after AsmOpIdx in II->AsmOperands. 1505 StringRef Token = Op->Token; // save this in case Op gets moved 1506 for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) { 1507 MatchableInfo::AsmOperand NewAsmOp(Token); 1508 NewAsmOp.SubOpIdx = SI; 1509 II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp); 1510 } 1511 // Replace Op with first suboperand. 1512 Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved 1513 Op->SubOpIdx = 0; 1514 } 1515 } 1516 1517 // Set up the operand class. 1518 Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx); 1519 1520 // If the named operand is tied, canonicalize it to the untied operand. 1521 // For example, something like: 1522 // (outs GPR:$dst), (ins GPR:$src) 1523 // with an asmstring of 1524 // "inc $src" 1525 // we want to canonicalize to: 1526 // "inc $dst" 1527 // so that we know how to provide the $dst operand when filling in the result. 1528 int OITied = Operands[Idx].getTiedRegister(); 1529 if (OITied != -1) { 1530 // The tied operand index is an MIOperand index, find the operand that 1531 // contains it. 1532 std::pair<unsigned, unsigned> Idx = Operands.getSubOperandNumber(OITied); 1533 OperandName = Operands[Idx.first].Name; 1534 Op->SubOpIdx = Idx.second; 1535 } 1536 1537 Op->SrcOpName = OperandName; 1538} 1539 1540/// buildAliasOperandReference - When parsing an operand reference out of the 1541/// matching string (e.g. "movsx $src, $dst"), determine what the class of the 1542/// operand reference is by looking it up in the result pattern definition. 1543void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II, 1544 StringRef OperandName, 1545 MatchableInfo::AsmOperand &Op) { 1546 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>(); 1547 1548 // Set up the operand class. 1549 for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i) 1550 if (CGA.ResultOperands[i].isRecord() && 1551 CGA.ResultOperands[i].getName() == OperandName) { 1552 // It's safe to go with the first one we find, because CodeGenInstAlias 1553 // validates that all operands with the same name have the same record. 1554 Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second; 1555 // Use the match class from the Alias definition, not the 1556 // destination instruction, as we may have an immediate that's 1557 // being munged by the match class. 1558 Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(), 1559 Op.SubOpIdx); 1560 Op.SrcOpName = OperandName; 1561 return; 1562 } 1563 1564 PrintFatalError(II->TheDef->getLoc(), "error: unable to find operand: '" + 1565 OperandName.str() + "'"); 1566} 1567 1568void MatchableInfo::buildInstructionResultOperands() { 1569 const CodeGenInstruction *ResultInst = getResultInst(); 1570 1571 // Loop over all operands of the result instruction, determining how to 1572 // populate them. 1573 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { 1574 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; 1575 1576 // If this is a tied operand, just copy from the previously handled operand. 1577 int TiedOp = OpInfo.getTiedRegister(); 1578 if (TiedOp != -1) { 1579 ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); 1580 continue; 1581 } 1582 1583 // Find out what operand from the asmparser this MCInst operand comes from. 1584 int SrcOperand = findAsmOperandNamed(OpInfo.Name); 1585 if (OpInfo.Name.empty() || SrcOperand == -1) 1586 PrintFatalError(TheDef->getLoc(), "Instruction '" + 1587 TheDef->getName() + "' has operand '" + OpInfo.Name + 1588 "' that doesn't appear in asm string!"); 1589 1590 // Check if the one AsmOperand populates the entire operand. 1591 unsigned NumOperands = OpInfo.MINumOperands; 1592 if (AsmOperands[SrcOperand].SubOpIdx == -1) { 1593 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands)); 1594 continue; 1595 } 1596 1597 // Add a separate ResOperand for each suboperand. 1598 for (unsigned AI = 0; AI < NumOperands; ++AI) { 1599 assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI && 1600 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name && 1601 "unexpected AsmOperands for suboperands"); 1602 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1)); 1603 } 1604 } 1605} 1606 1607void MatchableInfo::buildAliasResultOperands() { 1608 const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>(); 1609 const CodeGenInstruction *ResultInst = getResultInst(); 1610 1611 // Loop over all operands of the result instruction, determining how to 1612 // populate them. 1613 unsigned AliasOpNo = 0; 1614 unsigned LastOpNo = CGA.ResultInstOperandIndex.size(); 1615 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { 1616 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; 1617 1618 // If this is a tied operand, just copy from the previously handled operand. 1619 int TiedOp = OpInfo->getTiedRegister(); 1620 if (TiedOp != -1) { 1621 ResOperands.push_back(ResOperand::getTiedOp(TiedOp)); 1622 continue; 1623 } 1624 1625 // Handle all the suboperands for this operand. 1626 const std::string &OpName = OpInfo->Name; 1627 for ( ; AliasOpNo < LastOpNo && 1628 CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) { 1629 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second; 1630 1631 // Find out what operand from the asmparser that this MCInst operand 1632 // comes from. 1633 switch (CGA.ResultOperands[AliasOpNo].Kind) { 1634 case CodeGenInstAlias::ResultOperand::K_Record: { 1635 StringRef Name = CGA.ResultOperands[AliasOpNo].getName(); 1636 int SrcOperand = findAsmOperand(Name, SubIdx); 1637 if (SrcOperand == -1) 1638 PrintFatalError(TheDef->getLoc(), "Instruction '" + 1639 TheDef->getName() + "' has operand '" + OpName + 1640 "' that doesn't appear in asm string!"); 1641 unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1); 1642 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, 1643 NumOperands)); 1644 break; 1645 } 1646 case CodeGenInstAlias::ResultOperand::K_Imm: { 1647 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm(); 1648 ResOperands.push_back(ResOperand::getImmOp(ImmVal)); 1649 break; 1650 } 1651 case CodeGenInstAlias::ResultOperand::K_Reg: { 1652 Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister(); 1653 ResOperands.push_back(ResOperand::getRegOp(Reg)); 1654 break; 1655 } 1656 } 1657 } 1658 } 1659} 1660 1661static unsigned getConverterOperandID(const std::string &Name, 1662 SetVector<std::string> &Table, 1663 bool &IsNew) { 1664 IsNew = Table.insert(Name); 1665 1666 unsigned ID = IsNew ? Table.size() - 1 : 1667 std::find(Table.begin(), Table.end(), Name) - Table.begin(); 1668 1669 assert(ID < Table.size()); 1670 1671 return ID; 1672} 1673 1674 1675static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName, 1676 std::vector<MatchableInfo*> &Infos, 1677 raw_ostream &OS) { 1678 SetVector<std::string> OperandConversionKinds; 1679 SetVector<std::string> InstructionConversionKinds; 1680 std::vector<std::vector<uint8_t> > ConversionTable; 1681 size_t MaxRowLength = 2; // minimum is custom converter plus terminator. 1682 1683 // TargetOperandClass - This is the target's operand class, like X86Operand. 1684 std::string TargetOperandClass = Target.getName() + "Operand"; 1685 1686 // Write the convert function to a separate stream, so we can drop it after 1687 // the enum. We'll build up the conversion handlers for the individual 1688 // operand types opportunistically as we encounter them. 1689 std::string ConvertFnBody; 1690 raw_string_ostream CvtOS(ConvertFnBody); 1691 // Start the unified conversion function. 1692 CvtOS << "void " << Target.getName() << ClassName << "::\n" 1693 << "convertToMCInst(unsigned Kind, MCInst &Inst, " 1694 << "unsigned Opcode,\n" 1695 << " const SmallVectorImpl<MCParsedAsmOperand*" 1696 << "> &Operands) {\n" 1697 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n" 1698 << " const uint8_t *Converter = ConversionTable[Kind];\n" 1699 << " Inst.setOpcode(Opcode);\n" 1700 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n" 1701 << " switch (*p) {\n" 1702 << " default: llvm_unreachable(\"invalid conversion entry!\");\n" 1703 << " case CVT_Reg:\n" 1704 << " static_cast<" << TargetOperandClass 1705 << "*>(Operands[*(p + 1)])->addRegOperands(Inst, 1);\n" 1706 << " break;\n" 1707 << " case CVT_Tied:\n" 1708 << " Inst.addOperand(Inst.getOperand(*(p + 1)));\n" 1709 << " break;\n"; 1710 1711 std::string OperandFnBody; 1712 raw_string_ostream OpOS(OperandFnBody); 1713 // Start the operand number lookup function. 1714 OpOS << "void " << Target.getName() << ClassName << "::\n" 1715 << "convertToMapAndConstraints(unsigned Kind,\n"; 1716 OpOS.indent(27); 1717 OpOS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {\n" 1718 << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n" 1719 << " unsigned NumMCOperands = 0;\n" 1720 << " const uint8_t *Converter = ConversionTable[Kind];\n" 1721 << " for (const uint8_t *p = Converter; *p; p+= 2) {\n" 1722 << " switch (*p) {\n" 1723 << " default: llvm_unreachable(\"invalid conversion entry!\");\n" 1724 << " case CVT_Reg:\n" 1725 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1726 << " Operands[*(p + 1)]->setConstraint(\"m\");\n" 1727 << " ++NumMCOperands;\n" 1728 << " break;\n" 1729 << " case CVT_Tied:\n" 1730 << " ++NumMCOperands;\n" 1731 << " break;\n"; 1732 1733 // Pre-populate the operand conversion kinds with the standard always 1734 // available entries. 1735 OperandConversionKinds.insert("CVT_Done"); 1736 OperandConversionKinds.insert("CVT_Reg"); 1737 OperandConversionKinds.insert("CVT_Tied"); 1738 enum { CVT_Done, CVT_Reg, CVT_Tied }; 1739 1740 for (std::vector<MatchableInfo*>::const_iterator it = Infos.begin(), 1741 ie = Infos.end(); it != ie; ++it) { 1742 MatchableInfo &II = **it; 1743 1744 // Check if we have a custom match function. 1745 std::string AsmMatchConverter = 1746 II.getResultInst()->TheDef->getValueAsString("AsmMatchConverter"); 1747 if (!AsmMatchConverter.empty()) { 1748 std::string Signature = "ConvertCustom_" + AsmMatchConverter; 1749 II.ConversionFnKind = Signature; 1750 1751 // Check if we have already generated this signature. 1752 if (!InstructionConversionKinds.insert(Signature)) 1753 continue; 1754 1755 // Remember this converter for the kind enum. 1756 unsigned KindID = OperandConversionKinds.size(); 1757 OperandConversionKinds.insert("CVT_" + AsmMatchConverter); 1758 1759 // Add the converter row for this instruction. 1760 ConversionTable.push_back(std::vector<uint8_t>()); 1761 ConversionTable.back().push_back(KindID); 1762 ConversionTable.back().push_back(CVT_Done); 1763 1764 // Add the handler to the conversion driver function. 1765 CvtOS << " case CVT_" << AsmMatchConverter << ":\n" 1766 << " " << AsmMatchConverter << "(Inst, Operands);\n" 1767 << " break;\n"; 1768 1769 // FIXME: Handle the operand number lookup for custom match functions. 1770 continue; 1771 } 1772 1773 // Build the conversion function signature. 1774 std::string Signature = "Convert"; 1775 1776 std::vector<uint8_t> ConversionRow; 1777 1778 // Compute the convert enum and the case body. 1779 MaxRowLength = std::max(MaxRowLength, II.ResOperands.size()*2 + 1 ); 1780 1781 for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) { 1782 const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i]; 1783 1784 // Generate code to populate each result operand. 1785 switch (OpInfo.Kind) { 1786 case MatchableInfo::ResOperand::RenderAsmOperand: { 1787 // This comes from something we parsed. 1788 MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum]; 1789 1790 // Registers are always converted the same, don't duplicate the 1791 // conversion function based on them. 1792 Signature += "__"; 1793 std::string Class; 1794 Class = Op.Class->isRegisterClass() ? "Reg" : Op.Class->ClassName; 1795 Signature += Class; 1796 Signature += utostr(OpInfo.MINumOperands); 1797 Signature += "_" + itostr(OpInfo.AsmOperandNum); 1798 1799 // Add the conversion kind, if necessary, and get the associated ID 1800 // the index of its entry in the vector). 1801 std::string Name = "CVT_" + (Op.Class->isRegisterClass() ? "Reg" : 1802 Op.Class->RenderMethod); 1803 1804 bool IsNewConverter = false; 1805 unsigned ID = getConverterOperandID(Name, OperandConversionKinds, 1806 IsNewConverter); 1807 1808 // Add the operand entry to the instruction kind conversion row. 1809 ConversionRow.push_back(ID); 1810 ConversionRow.push_back(OpInfo.AsmOperandNum + 1); 1811 1812 if (!IsNewConverter) 1813 break; 1814 1815 // This is a new operand kind. Add a handler for it to the 1816 // converter driver. 1817 CvtOS << " case " << Name << ":\n" 1818 << " static_cast<" << TargetOperandClass 1819 << "*>(Operands[*(p + 1)])->" 1820 << Op.Class->RenderMethod << "(Inst, " << OpInfo.MINumOperands 1821 << ");\n" 1822 << " break;\n"; 1823 1824 // Add a handler for the operand number lookup. 1825 OpOS << " case " << Name << ":\n" 1826 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1827 << " Operands[*(p + 1)]->setConstraint(\"m\");\n" 1828 << " NumMCOperands += " << OpInfo.MINumOperands << ";\n" 1829 << " break;\n"; 1830 break; 1831 } 1832 case MatchableInfo::ResOperand::TiedOperand: { 1833 // If this operand is tied to a previous one, just copy the MCInst 1834 // operand from the earlier one.We can only tie single MCOperand values. 1835 //assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand"); 1836 unsigned TiedOp = OpInfo.TiedOperandNum; 1837 assert(i > TiedOp && "Tied operand precedes its target!"); 1838 Signature += "__Tie" + utostr(TiedOp); 1839 ConversionRow.push_back(CVT_Tied); 1840 ConversionRow.push_back(TiedOp); 1841 // FIXME: Handle the operand number lookup for tied operands. 1842 break; 1843 } 1844 case MatchableInfo::ResOperand::ImmOperand: { 1845 int64_t Val = OpInfo.ImmVal; 1846 std::string Ty = "imm_" + itostr(Val); 1847 Signature += "__" + Ty; 1848 1849 std::string Name = "CVT_" + Ty; 1850 bool IsNewConverter = false; 1851 unsigned ID = getConverterOperandID(Name, OperandConversionKinds, 1852 IsNewConverter); 1853 // Add the operand entry to the instruction kind conversion row. 1854 ConversionRow.push_back(ID); 1855 ConversionRow.push_back(0); 1856 1857 if (!IsNewConverter) 1858 break; 1859 1860 CvtOS << " case " << Name << ":\n" 1861 << " Inst.addOperand(MCOperand::CreateImm(" << Val << "));\n" 1862 << " break;\n"; 1863 1864 OpOS << " case " << Name << ":\n" 1865 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1866 << " Operands[*(p + 1)]->setConstraint(\"\");\n" 1867 << " ++NumMCOperands;\n" 1868 << " break;\n"; 1869 break; 1870 } 1871 case MatchableInfo::ResOperand::RegOperand: { 1872 std::string Reg, Name; 1873 if (OpInfo.Register == 0) { 1874 Name = "reg0"; 1875 Reg = "0"; 1876 } else { 1877 Reg = getQualifiedName(OpInfo.Register); 1878 Name = "reg" + OpInfo.Register->getName(); 1879 } 1880 Signature += "__" + Name; 1881 Name = "CVT_" + Name; 1882 bool IsNewConverter = false; 1883 unsigned ID = getConverterOperandID(Name, OperandConversionKinds, 1884 IsNewConverter); 1885 // Add the operand entry to the instruction kind conversion row. 1886 ConversionRow.push_back(ID); 1887 ConversionRow.push_back(0); 1888 1889 if (!IsNewConverter) 1890 break; 1891 CvtOS << " case " << Name << ":\n" 1892 << " Inst.addOperand(MCOperand::CreateReg(" << Reg << "));\n" 1893 << " break;\n"; 1894 1895 OpOS << " case " << Name << ":\n" 1896 << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n" 1897 << " Operands[*(p + 1)]->setConstraint(\"m\");\n" 1898 << " ++NumMCOperands;\n" 1899 << " break;\n"; 1900 } 1901 } 1902 } 1903 1904 // If there were no operands, add to the signature to that effect 1905 if (Signature == "Convert") 1906 Signature += "_NoOperands"; 1907 1908 II.ConversionFnKind = Signature; 1909 1910 // Save the signature. If we already have it, don't add a new row 1911 // to the table. 1912 if (!InstructionConversionKinds.insert(Signature)) 1913 continue; 1914 1915 // Add the row to the table. 1916 ConversionTable.push_back(ConversionRow); 1917 } 1918 1919 // Finish up the converter driver function. 1920 CvtOS << " }\n }\n}\n\n"; 1921 1922 // Finish up the operand number lookup function. 1923 OpOS << " }\n }\n}\n\n"; 1924 1925 OS << "namespace {\n"; 1926 1927 // Output the operand conversion kind enum. 1928 OS << "enum OperatorConversionKind {\n"; 1929 for (unsigned i = 0, e = OperandConversionKinds.size(); i != e; ++i) 1930 OS << " " << OperandConversionKinds[i] << ",\n"; 1931 OS << " CVT_NUM_CONVERTERS\n"; 1932 OS << "};\n\n"; 1933 1934 // Output the instruction conversion kind enum. 1935 OS << "enum InstructionConversionKind {\n"; 1936 for (SetVector<std::string>::const_iterator 1937 i = InstructionConversionKinds.begin(), 1938 e = InstructionConversionKinds.end(); i != e; ++i) 1939 OS << " " << *i << ",\n"; 1940 OS << " CVT_NUM_SIGNATURES\n"; 1941 OS << "};\n\n"; 1942 1943 1944 OS << "} // end anonymous namespace\n\n"; 1945 1946 // Output the conversion table. 1947 OS << "static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][" 1948 << MaxRowLength << "] = {\n"; 1949 1950 for (unsigned Row = 0, ERow = ConversionTable.size(); Row != ERow; ++Row) { 1951 assert(ConversionTable[Row].size() % 2 == 0 && "bad conversion row!"); 1952 OS << " // " << InstructionConversionKinds[Row] << "\n"; 1953 OS << " { "; 1954 for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2) 1955 OS << OperandConversionKinds[ConversionTable[Row][i]] << ", " 1956 << (unsigned)(ConversionTable[Row][i + 1]) << ", "; 1957 OS << "CVT_Done },\n"; 1958 } 1959 1960 OS << "};\n\n"; 1961 1962 // Spit out the conversion driver function. 1963 OS << CvtOS.str(); 1964 1965 // Spit out the operand number lookup function. 1966 OS << OpOS.str(); 1967} 1968 1969/// emitMatchClassEnumeration - Emit the enumeration for match class kinds. 1970static void emitMatchClassEnumeration(CodeGenTarget &Target, 1971 std::vector<ClassInfo*> &Infos, 1972 raw_ostream &OS) { 1973 OS << "namespace {\n\n"; 1974 1975 OS << "/// MatchClassKind - The kinds of classes which participate in\n" 1976 << "/// instruction matching.\n"; 1977 OS << "enum MatchClassKind {\n"; 1978 OS << " InvalidMatchClass = 0,\n"; 1979 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 1980 ie = Infos.end(); it != ie; ++it) { 1981 ClassInfo &CI = **it; 1982 OS << " " << CI.Name << ", // "; 1983 if (CI.Kind == ClassInfo::Token) { 1984 OS << "'" << CI.ValueName << "'\n"; 1985 } else if (CI.isRegisterClass()) { 1986 if (!CI.ValueName.empty()) 1987 OS << "register class '" << CI.ValueName << "'\n"; 1988 else 1989 OS << "derived register class\n"; 1990 } else { 1991 OS << "user defined class '" << CI.ValueName << "'\n"; 1992 } 1993 } 1994 OS << " NumMatchClassKinds\n"; 1995 OS << "};\n\n"; 1996 1997 OS << "}\n\n"; 1998} 1999 2000/// emitValidateOperandClass - Emit the function to validate an operand class. 2001static void emitValidateOperandClass(AsmMatcherInfo &Info, 2002 raw_ostream &OS) { 2003 OS << "static unsigned validateOperandClass(MCParsedAsmOperand *GOp, " 2004 << "MatchClassKind Kind) {\n"; 2005 OS << " " << Info.Target.getName() << "Operand &Operand = *(" 2006 << Info.Target.getName() << "Operand*)GOp;\n"; 2007 2008 // The InvalidMatchClass is not to match any operand. 2009 OS << " if (Kind == InvalidMatchClass)\n"; 2010 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n\n"; 2011 2012 // Check for Token operands first. 2013 // FIXME: Use a more specific diagnostic type. 2014 OS << " if (Operand.isToken())\n"; 2015 OS << " return isSubclass(matchTokenString(Operand.getToken()), Kind) ?\n" 2016 << " MCTargetAsmParser::Match_Success :\n" 2017 << " MCTargetAsmParser::Match_InvalidOperand;\n\n"; 2018 2019 // Check the user classes. We don't care what order since we're only 2020 // actually matching against one of them. 2021 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(), 2022 ie = Info.Classes.end(); it != ie; ++it) { 2023 ClassInfo &CI = **it; 2024 2025 if (!CI.isUserClass()) 2026 continue; 2027 2028 OS << " // '" << CI.ClassName << "' class\n"; 2029 OS << " if (Kind == " << CI.Name << ") {\n"; 2030 OS << " if (Operand." << CI.PredicateMethod << "())\n"; 2031 OS << " return MCTargetAsmParser::Match_Success;\n"; 2032 if (!CI.DiagnosticType.empty()) 2033 OS << " return " << Info.Target.getName() << "AsmParser::Match_" 2034 << CI.DiagnosticType << ";\n"; 2035 OS << " }\n\n"; 2036 } 2037 2038 // Check for register operands, including sub-classes. 2039 OS << " if (Operand.isReg()) {\n"; 2040 OS << " MatchClassKind OpKind;\n"; 2041 OS << " switch (Operand.getReg()) {\n"; 2042 OS << " default: OpKind = InvalidMatchClass; break;\n"; 2043 for (AsmMatcherInfo::RegisterClassesTy::iterator 2044 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end(); 2045 it != ie; ++it) 2046 OS << " case " << Info.Target.getName() << "::" 2047 << it->first->getName() << ": OpKind = " << it->second->Name 2048 << "; break;\n"; 2049 OS << " }\n"; 2050 OS << " return isSubclass(OpKind, Kind) ? " 2051 << "MCTargetAsmParser::Match_Success :\n " 2052 << " MCTargetAsmParser::Match_InvalidOperand;\n }\n\n"; 2053 2054 // Generic fallthrough match failure case for operands that don't have 2055 // specialized diagnostic types. 2056 OS << " return MCTargetAsmParser::Match_InvalidOperand;\n"; 2057 OS << "}\n\n"; 2058} 2059 2060/// emitIsSubclass - Emit the subclass predicate function. 2061static void emitIsSubclass(CodeGenTarget &Target, 2062 std::vector<ClassInfo*> &Infos, 2063 raw_ostream &OS) { 2064 OS << "/// isSubclass - Compute whether \\p A is a subclass of \\p B.\n"; 2065 OS << "static bool isSubclass(MatchClassKind A, MatchClassKind B) {\n"; 2066 OS << " if (A == B)\n"; 2067 OS << " return true;\n\n"; 2068 2069 OS << " switch (A) {\n"; 2070 OS << " default:\n"; 2071 OS << " return false;\n"; 2072 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 2073 ie = Infos.end(); it != ie; ++it) { 2074 ClassInfo &A = **it; 2075 2076 std::vector<StringRef> SuperClasses; 2077 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 2078 ie = Infos.end(); it != ie; ++it) { 2079 ClassInfo &B = **it; 2080 2081 if (&A != &B && A.isSubsetOf(B)) 2082 SuperClasses.push_back(B.Name); 2083 } 2084 2085 if (SuperClasses.empty()) 2086 continue; 2087 2088 OS << "\n case " << A.Name << ":\n"; 2089 2090 if (SuperClasses.size() == 1) { 2091 OS << " return B == " << SuperClasses.back() << ";\n"; 2092 continue; 2093 } 2094 2095 OS << " switch (B) {\n"; 2096 OS << " default: return false;\n"; 2097 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i) 2098 OS << " case " << SuperClasses[i] << ": return true;\n"; 2099 OS << " }\n"; 2100 } 2101 OS << " }\n"; 2102 OS << "}\n\n"; 2103} 2104 2105/// emitMatchTokenString - Emit the function to match a token string to the 2106/// appropriate match class value. 2107static void emitMatchTokenString(CodeGenTarget &Target, 2108 std::vector<ClassInfo*> &Infos, 2109 raw_ostream &OS) { 2110 // Construct the match list. 2111 std::vector<StringMatcher::StringPair> Matches; 2112 for (std::vector<ClassInfo*>::iterator it = Infos.begin(), 2113 ie = Infos.end(); it != ie; ++it) { 2114 ClassInfo &CI = **it; 2115 2116 if (CI.Kind == ClassInfo::Token) 2117 Matches.push_back(StringMatcher::StringPair(CI.ValueName, 2118 "return " + CI.Name + ";")); 2119 } 2120 2121 OS << "static MatchClassKind matchTokenString(StringRef Name) {\n"; 2122 2123 StringMatcher("Name", Matches, OS).Emit(); 2124 2125 OS << " return InvalidMatchClass;\n"; 2126 OS << "}\n\n"; 2127} 2128 2129/// emitMatchRegisterName - Emit the function to match a string to the target 2130/// specific register enum. 2131static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser, 2132 raw_ostream &OS) { 2133 // Construct the match list. 2134 std::vector<StringMatcher::StringPair> Matches; 2135 const std::vector<CodeGenRegister*> &Regs = 2136 Target.getRegBank().getRegisters(); 2137 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 2138 const CodeGenRegister *Reg = Regs[i]; 2139 if (Reg->TheDef->getValueAsString("AsmName").empty()) 2140 continue; 2141 2142 Matches.push_back(StringMatcher::StringPair( 2143 Reg->TheDef->getValueAsString("AsmName"), 2144 "return " + utostr(Reg->EnumValue) + ";")); 2145 } 2146 2147 OS << "static unsigned MatchRegisterName(StringRef Name) {\n"; 2148 2149 StringMatcher("Name", Matches, OS).Emit(); 2150 2151 OS << " return 0;\n"; 2152 OS << "}\n\n"; 2153} 2154 2155/// emitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag 2156/// definitions. 2157static void emitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info, 2158 raw_ostream &OS) { 2159 OS << "// Flags for subtarget features that participate in " 2160 << "instruction matching.\n"; 2161 OS << "enum SubtargetFeatureFlag {\n"; 2162 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator 2163 it = Info.SubtargetFeatures.begin(), 2164 ie = Info.SubtargetFeatures.end(); it != ie; ++it) { 2165 SubtargetFeatureInfo &SFI = *it->second; 2166 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n"; 2167 } 2168 OS << " Feature_None = 0\n"; 2169 OS << "};\n\n"; 2170} 2171 2172/// emitOperandDiagnosticTypes - Emit the operand matching diagnostic types. 2173static void emitOperandDiagnosticTypes(AsmMatcherInfo &Info, raw_ostream &OS) { 2174 // Get the set of diagnostic types from all of the operand classes. 2175 std::set<StringRef> Types; 2176 for (std::map<Record*, ClassInfo*>::const_iterator 2177 I = Info.AsmOperandClasses.begin(), 2178 E = Info.AsmOperandClasses.end(); I != E; ++I) { 2179 if (!I->second->DiagnosticType.empty()) 2180 Types.insert(I->second->DiagnosticType); 2181 } 2182 2183 if (Types.empty()) return; 2184 2185 // Now emit the enum entries. 2186 for (std::set<StringRef>::const_iterator I = Types.begin(), E = Types.end(); 2187 I != E; ++I) 2188 OS << " Match_" << *I << ",\n"; 2189 OS << " END_OPERAND_DIAGNOSTIC_TYPES\n"; 2190} 2191 2192/// emitGetSubtargetFeatureName - Emit the helper function to get the 2193/// user-level name for a subtarget feature. 2194static void emitGetSubtargetFeatureName(AsmMatcherInfo &Info, raw_ostream &OS) { 2195 OS << "// User-level names for subtarget features that participate in\n" 2196 << "// instruction matching.\n" 2197 << "static const char *getSubtargetFeatureName(unsigned Val) {\n" 2198 << " switch(Val) {\n"; 2199 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator 2200 it = Info.SubtargetFeatures.begin(), 2201 ie = Info.SubtargetFeatures.end(); it != ie; ++it) { 2202 SubtargetFeatureInfo &SFI = *it->second; 2203 // FIXME: Totally just a placeholder name to get the algorithm working. 2204 OS << " case " << SFI.getEnumName() << ": return \"" 2205 << SFI.TheDef->getValueAsString("PredicateName") << "\";\n"; 2206 } 2207 OS << " default: return \"(unknown)\";\n"; 2208 OS << " }\n}\n\n"; 2209} 2210 2211/// emitComputeAvailableFeatures - Emit the function to compute the list of 2212/// available features given a subtarget. 2213static void emitComputeAvailableFeatures(AsmMatcherInfo &Info, 2214 raw_ostream &OS) { 2215 std::string ClassName = 2216 Info.AsmParser->getValueAsString("AsmParserClassName"); 2217 2218 OS << "unsigned " << Info.Target.getName() << ClassName << "::\n" 2219 << "ComputeAvailableFeatures(uint64_t FB) const {\n"; 2220 OS << " unsigned Features = 0;\n"; 2221 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator 2222 it = Info.SubtargetFeatures.begin(), 2223 ie = Info.SubtargetFeatures.end(); it != ie; ++it) { 2224 SubtargetFeatureInfo &SFI = *it->second; 2225 2226 OS << " if ("; 2227 std::string CondStorage = 2228 SFI.TheDef->getValueAsString("AssemblerCondString"); 2229 StringRef Conds = CondStorage; 2230 std::pair<StringRef,StringRef> Comma = Conds.split(','); 2231 bool First = true; 2232 do { 2233 if (!First) 2234 OS << " && "; 2235 2236 bool Neg = false; 2237 StringRef Cond = Comma.first; 2238 if (Cond[0] == '!') { 2239 Neg = true; 2240 Cond = Cond.substr(1); 2241 } 2242 2243 OS << "((FB & " << Info.Target.getName() << "::" << Cond << ")"; 2244 if (Neg) 2245 OS << " == 0"; 2246 else 2247 OS << " != 0"; 2248 OS << ")"; 2249 2250 if (Comma.second.empty()) 2251 break; 2252 2253 First = false; 2254 Comma = Comma.second.split(','); 2255 } while (true); 2256 2257 OS << ")\n"; 2258 OS << " Features |= " << SFI.getEnumName() << ";\n"; 2259 } 2260 OS << " return Features;\n"; 2261 OS << "}\n\n"; 2262} 2263 2264static std::string GetAliasRequiredFeatures(Record *R, 2265 const AsmMatcherInfo &Info) { 2266 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates"); 2267 std::string Result; 2268 unsigned NumFeatures = 0; 2269 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) { 2270 SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]); 2271 2272 if (F == 0) 2273 PrintFatalError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() + 2274 "' is not marked as an AssemblerPredicate!"); 2275 2276 if (NumFeatures) 2277 Result += '|'; 2278 2279 Result += F->getEnumName(); 2280 ++NumFeatures; 2281 } 2282 2283 if (NumFeatures > 1) 2284 Result = '(' + Result + ')'; 2285 return Result; 2286} 2287 2288/// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions, 2289/// emit a function for them and return true, otherwise return false. 2290static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) { 2291 // Ignore aliases when match-prefix is set. 2292 if (!MatchPrefix.empty()) 2293 return false; 2294 2295 std::vector<Record*> Aliases = 2296 Info.getRecords().getAllDerivedDefinitions("MnemonicAlias"); 2297 if (Aliases.empty()) return false; 2298 2299 OS << "static void applyMnemonicAliases(StringRef &Mnemonic, " 2300 "unsigned Features) {\n"; 2301 2302 // Keep track of all the aliases from a mnemonic. Use an std::map so that the 2303 // iteration order of the map is stable. 2304 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic; 2305 2306 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { 2307 Record *R = Aliases[i]; 2308 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R); 2309 } 2310 2311 // Process each alias a "from" mnemonic at a time, building the code executed 2312 // by the string remapper. 2313 std::vector<StringMatcher::StringPair> Cases; 2314 for (std::map<std::string, std::vector<Record*> >::iterator 2315 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end(); 2316 I != E; ++I) { 2317 const std::vector<Record*> &ToVec = I->second; 2318 2319 // Loop through each alias and emit code that handles each case. If there 2320 // are two instructions without predicates, emit an error. If there is one, 2321 // emit it last. 2322 std::string MatchCode; 2323 int AliasWithNoPredicate = -1; 2324 2325 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) { 2326 Record *R = ToVec[i]; 2327 std::string FeatureMask = GetAliasRequiredFeatures(R, Info); 2328 2329 // If this unconditionally matches, remember it for later and diagnose 2330 // duplicates. 2331 if (FeatureMask.empty()) { 2332 if (AliasWithNoPredicate != -1) { 2333 // We can't have two aliases from the same mnemonic with no predicate. 2334 PrintError(ToVec[AliasWithNoPredicate]->getLoc(), 2335 "two MnemonicAliases with the same 'from' mnemonic!"); 2336 PrintFatalError(R->getLoc(), "this is the other MnemonicAlias."); 2337 } 2338 2339 AliasWithNoPredicate = i; 2340 continue; 2341 } 2342 if (R->getValueAsString("ToMnemonic") == I->first) 2343 PrintFatalError(R->getLoc(), "MnemonicAlias to the same string"); 2344 2345 if (!MatchCode.empty()) 2346 MatchCode += "else "; 2347 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n"; 2348 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n"; 2349 } 2350 2351 if (AliasWithNoPredicate != -1) { 2352 Record *R = ToVec[AliasWithNoPredicate]; 2353 if (!MatchCode.empty()) 2354 MatchCode += "else\n "; 2355 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n"; 2356 } 2357 2358 MatchCode += "return;"; 2359 2360 Cases.push_back(std::make_pair(I->first, MatchCode)); 2361 } 2362 2363 StringMatcher("Mnemonic", Cases, OS).Emit(); 2364 OS << "}\n\n"; 2365 2366 return true; 2367} 2368 2369static const char *getMinimalTypeForRange(uint64_t Range) { 2370 assert(Range < 0xFFFFFFFFULL && "Enum too large"); 2371 if (Range > 0xFFFF) 2372 return "uint32_t"; 2373 if (Range > 0xFF) 2374 return "uint16_t"; 2375 return "uint8_t"; 2376} 2377 2378static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target, 2379 const AsmMatcherInfo &Info, StringRef ClassName, 2380 StringToOffsetTable &StringTable, 2381 unsigned MaxMnemonicIndex) { 2382 unsigned MaxMask = 0; 2383 for (std::vector<OperandMatchEntry>::const_iterator it = 2384 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end(); 2385 it != ie; ++it) { 2386 MaxMask |= it->OperandMask; 2387 } 2388 2389 // Emit the static custom operand parsing table; 2390 OS << "namespace {\n"; 2391 OS << " struct OperandMatchEntry {\n"; 2392 OS << " " << getMinimalTypeForRange(1ULL << Info.SubtargetFeatures.size()) 2393 << " RequiredFeatures;\n"; 2394 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex) 2395 << " Mnemonic;\n"; 2396 OS << " " << getMinimalTypeForRange(Info.Classes.size()) 2397 << " Class;\n"; 2398 OS << " " << getMinimalTypeForRange(MaxMask) 2399 << " OperandMask;\n\n"; 2400 OS << " StringRef getMnemonic() const {\n"; 2401 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n"; 2402 OS << " MnemonicTable[Mnemonic]);\n"; 2403 OS << " }\n"; 2404 OS << " };\n\n"; 2405 2406 OS << " // Predicate for searching for an opcode.\n"; 2407 OS << " struct LessOpcodeOperand {\n"; 2408 OS << " bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n"; 2409 OS << " return LHS.getMnemonic() < RHS;\n"; 2410 OS << " }\n"; 2411 OS << " bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n"; 2412 OS << " return LHS < RHS.getMnemonic();\n"; 2413 OS << " }\n"; 2414 OS << " bool operator()(const OperandMatchEntry &LHS,"; 2415 OS << " const OperandMatchEntry &RHS) {\n"; 2416 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n"; 2417 OS << " }\n"; 2418 OS << " };\n"; 2419 2420 OS << "} // end anonymous namespace.\n\n"; 2421 2422 OS << "static const OperandMatchEntry OperandMatchTable[" 2423 << Info.OperandMatchInfo.size() << "] = {\n"; 2424 2425 OS << " /* Operand List Mask, Mnemonic, Operand Class, Features */\n"; 2426 for (std::vector<OperandMatchEntry>::const_iterator it = 2427 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end(); 2428 it != ie; ++it) { 2429 const OperandMatchEntry &OMI = *it; 2430 const MatchableInfo &II = *OMI.MI; 2431 2432 OS << " { "; 2433 2434 // Write the required features mask. 2435 if (!II.RequiredFeatures.empty()) { 2436 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) { 2437 if (i) OS << "|"; 2438 OS << II.RequiredFeatures[i]->getEnumName(); 2439 } 2440 } else 2441 OS << "0"; 2442 2443 // Store a pascal-style length byte in the mnemonic. 2444 std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str(); 2445 OS << ", " << StringTable.GetOrAddStringOffset(LenMnemonic, false) 2446 << " /* " << II.Mnemonic << " */, "; 2447 2448 OS << OMI.CI->Name; 2449 2450 OS << ", " << OMI.OperandMask; 2451 OS << " /* "; 2452 bool printComma = false; 2453 for (int i = 0, e = 31; i !=e; ++i) 2454 if (OMI.OperandMask & (1 << i)) { 2455 if (printComma) 2456 OS << ", "; 2457 OS << i; 2458 printComma = true; 2459 } 2460 OS << " */"; 2461 2462 OS << " },\n"; 2463 } 2464 OS << "};\n\n"; 2465 2466 // Emit the operand class switch to call the correct custom parser for 2467 // the found operand class. 2468 OS << Target.getName() << ClassName << "::OperandMatchResultTy " 2469 << Target.getName() << ClassName << "::\n" 2470 << "tryCustomParseOperand(SmallVectorImpl<MCParsedAsmOperand*>" 2471 << " &Operands,\n unsigned MCK) {\n\n" 2472 << " switch(MCK) {\n"; 2473 2474 for (std::vector<ClassInfo*>::const_iterator it = Info.Classes.begin(), 2475 ie = Info.Classes.end(); it != ie; ++it) { 2476 ClassInfo *CI = *it; 2477 if (CI->ParserMethod.empty()) 2478 continue; 2479 OS << " case " << CI->Name << ":\n" 2480 << " return " << CI->ParserMethod << "(Operands);\n"; 2481 } 2482 2483 OS << " default:\n"; 2484 OS << " return MatchOperand_NoMatch;\n"; 2485 OS << " }\n"; 2486 OS << " return MatchOperand_NoMatch;\n"; 2487 OS << "}\n\n"; 2488 2489 // Emit the static custom operand parser. This code is very similar with 2490 // the other matcher. Also use MatchResultTy here just in case we go for 2491 // a better error handling. 2492 OS << Target.getName() << ClassName << "::OperandMatchResultTy " 2493 << Target.getName() << ClassName << "::\n" 2494 << "MatchOperandParserImpl(SmallVectorImpl<MCParsedAsmOperand*>" 2495 << " &Operands,\n StringRef Mnemonic) {\n"; 2496 2497 // Emit code to get the available features. 2498 OS << " // Get the current feature set.\n"; 2499 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n"; 2500 2501 OS << " // Get the next operand index.\n"; 2502 OS << " unsigned NextOpNum = Operands.size()-1;\n"; 2503 2504 // Emit code to search the table. 2505 OS << " // Search the table.\n"; 2506 OS << " std::pair<const OperandMatchEntry*, const OperandMatchEntry*>"; 2507 OS << " MnemonicRange =\n"; 2508 OS << " std::equal_range(OperandMatchTable, OperandMatchTable+" 2509 << Info.OperandMatchInfo.size() << ", Mnemonic,\n" 2510 << " LessOpcodeOperand());\n\n"; 2511 2512 OS << " if (MnemonicRange.first == MnemonicRange.second)\n"; 2513 OS << " return MatchOperand_NoMatch;\n\n"; 2514 2515 OS << " for (const OperandMatchEntry *it = MnemonicRange.first,\n" 2516 << " *ie = MnemonicRange.second; it != ie; ++it) {\n"; 2517 2518 OS << " // equal_range guarantees that instruction mnemonic matches.\n"; 2519 OS << " assert(Mnemonic == it->getMnemonic());\n\n"; 2520 2521 // Emit check that the required features are available. 2522 OS << " // check if the available features match\n"; 2523 OS << " if ((AvailableFeatures & it->RequiredFeatures) " 2524 << "!= it->RequiredFeatures) {\n"; 2525 OS << " continue;\n"; 2526 OS << " }\n\n"; 2527 2528 // Emit check to ensure the operand number matches. 2529 OS << " // check if the operand in question has a custom parser.\n"; 2530 OS << " if (!(it->OperandMask & (1 << NextOpNum)))\n"; 2531 OS << " continue;\n\n"; 2532 2533 // Emit call to the custom parser method 2534 OS << " // call custom parse method to handle the operand\n"; 2535 OS << " OperandMatchResultTy Result = "; 2536 OS << "tryCustomParseOperand(Operands, it->Class);\n"; 2537 OS << " if (Result != MatchOperand_NoMatch)\n"; 2538 OS << " return Result;\n"; 2539 OS << " }\n\n"; 2540 2541 OS << " // Okay, we had no match.\n"; 2542 OS << " return MatchOperand_NoMatch;\n"; 2543 OS << "}\n\n"; 2544} 2545 2546void AsmMatcherEmitter::run(raw_ostream &OS) { 2547 CodeGenTarget Target(Records); 2548 Record *AsmParser = Target.getAsmParser(); 2549 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName"); 2550 2551 // Compute the information on the instructions to match. 2552 AsmMatcherInfo Info(AsmParser, Target, Records); 2553 Info.buildInfo(); 2554 2555 // Sort the instruction table using the partial order on classes. We use 2556 // stable_sort to ensure that ambiguous instructions are still 2557 // deterministically ordered. 2558 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(), 2559 less_ptr<MatchableInfo>()); 2560 2561 DEBUG_WITH_TYPE("instruction_info", { 2562 for (std::vector<MatchableInfo*>::iterator 2563 it = Info.Matchables.begin(), ie = Info.Matchables.end(); 2564 it != ie; ++it) 2565 (*it)->dump(); 2566 }); 2567 2568 // Check for ambiguous matchables. 2569 DEBUG_WITH_TYPE("ambiguous_instrs", { 2570 unsigned NumAmbiguous = 0; 2571 for (unsigned i = 0, e = Info.Matchables.size(); i != e; ++i) { 2572 for (unsigned j = i + 1; j != e; ++j) { 2573 MatchableInfo &A = *Info.Matchables[i]; 2574 MatchableInfo &B = *Info.Matchables[j]; 2575 2576 if (A.couldMatchAmbiguouslyWith(B)) { 2577 errs() << "warning: ambiguous matchables:\n"; 2578 A.dump(); 2579 errs() << "\nis incomparable with:\n"; 2580 B.dump(); 2581 errs() << "\n\n"; 2582 ++NumAmbiguous; 2583 } 2584 } 2585 } 2586 if (NumAmbiguous) 2587 errs() << "warning: " << NumAmbiguous 2588 << " ambiguous matchables!\n"; 2589 }); 2590 2591 // Compute the information on the custom operand parsing. 2592 Info.buildOperandMatchInfo(); 2593 2594 // Write the output. 2595 2596 // Information for the class declaration. 2597 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n"; 2598 OS << "#undef GET_ASSEMBLER_HEADER\n"; 2599 OS << " // This should be included into the middle of the declaration of\n"; 2600 OS << " // your subclasses implementation of MCTargetAsmParser.\n"; 2601 OS << " unsigned ComputeAvailableFeatures(uint64_t FeatureBits) const;\n"; 2602 OS << " void convertToMCInst(unsigned Kind, MCInst &Inst, " 2603 << "unsigned Opcode,\n" 2604 << " const SmallVectorImpl<MCParsedAsmOperand*> " 2605 << "&Operands);\n"; 2606 OS << " void convertToMapAndConstraints(unsigned Kind,\n "; 2607 OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands);\n"; 2608 OS << " bool mnemonicIsValid(StringRef Mnemonic);\n"; 2609 OS << " unsigned MatchInstructionImpl(\n"; 2610 OS.indent(27); 2611 OS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n" 2612 << " MCInst &Inst,\n" 2613 << " unsigned &ErrorInfo," 2614 << " bool matchingInlineAsm,\n" 2615 << " unsigned VariantID = 0);\n"; 2616 2617 if (Info.OperandMatchInfo.size()) { 2618 OS << "\n enum OperandMatchResultTy {\n"; 2619 OS << " MatchOperand_Success, // operand matched successfully\n"; 2620 OS << " MatchOperand_NoMatch, // operand did not match\n"; 2621 OS << " MatchOperand_ParseFail // operand matched but had errors\n"; 2622 OS << " };\n"; 2623 OS << " OperandMatchResultTy MatchOperandParserImpl(\n"; 2624 OS << " SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"; 2625 OS << " StringRef Mnemonic);\n"; 2626 2627 OS << " OperandMatchResultTy tryCustomParseOperand(\n"; 2628 OS << " SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"; 2629 OS << " unsigned MCK);\n\n"; 2630 } 2631 2632 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n"; 2633 2634 // Emit the operand match diagnostic enum names. 2635 OS << "\n#ifdef GET_OPERAND_DIAGNOSTIC_TYPES\n"; 2636 OS << "#undef GET_OPERAND_DIAGNOSTIC_TYPES\n\n"; 2637 emitOperandDiagnosticTypes(Info, OS); 2638 OS << "#endif // GET_OPERAND_DIAGNOSTIC_TYPES\n\n"; 2639 2640 2641 OS << "\n#ifdef GET_REGISTER_MATCHER\n"; 2642 OS << "#undef GET_REGISTER_MATCHER\n\n"; 2643 2644 // Emit the subtarget feature enumeration. 2645 emitSubtargetFeatureFlagEnumeration(Info, OS); 2646 2647 // Emit the function to match a register name to number. 2648 // This should be omitted for Mips target 2649 if (AsmParser->getValueAsBit("ShouldEmitMatchRegisterName")) 2650 emitMatchRegisterName(Target, AsmParser, OS); 2651 2652 OS << "#endif // GET_REGISTER_MATCHER\n\n"; 2653 2654 OS << "\n#ifdef GET_SUBTARGET_FEATURE_NAME\n"; 2655 OS << "#undef GET_SUBTARGET_FEATURE_NAME\n\n"; 2656 2657 // Generate the helper function to get the names for subtarget features. 2658 emitGetSubtargetFeatureName(Info, OS); 2659 2660 OS << "#endif // GET_SUBTARGET_FEATURE_NAME\n\n"; 2661 2662 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n"; 2663 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n"; 2664 2665 // Generate the function that remaps for mnemonic aliases. 2666 bool HasMnemonicAliases = emitMnemonicAliases(OS, Info); 2667 2668 // Generate the convertToMCInst function to convert operands into an MCInst. 2669 // Also, generate the convertToMapAndConstraints function for MS-style inline 2670 // assembly. The latter doesn't actually generate a MCInst. 2671 emitConvertFuncs(Target, ClassName, Info.Matchables, OS); 2672 2673 // Emit the enumeration for classes which participate in matching. 2674 emitMatchClassEnumeration(Target, Info.Classes, OS); 2675 2676 // Emit the routine to match token strings to their match class. 2677 emitMatchTokenString(Target, Info.Classes, OS); 2678 2679 // Emit the subclass predicate routine. 2680 emitIsSubclass(Target, Info.Classes, OS); 2681 2682 // Emit the routine to validate an operand against a match class. 2683 emitValidateOperandClass(Info, OS); 2684 2685 // Emit the available features compute function. 2686 emitComputeAvailableFeatures(Info, OS); 2687 2688 2689 StringToOffsetTable StringTable; 2690 2691 size_t MaxNumOperands = 0; 2692 unsigned MaxMnemonicIndex = 0; 2693 for (std::vector<MatchableInfo*>::const_iterator it = 2694 Info.Matchables.begin(), ie = Info.Matchables.end(); 2695 it != ie; ++it) { 2696 MatchableInfo &II = **it; 2697 MaxNumOperands = std::max(MaxNumOperands, II.AsmOperands.size()); 2698 2699 // Store a pascal-style length byte in the mnemonic. 2700 std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str(); 2701 MaxMnemonicIndex = std::max(MaxMnemonicIndex, 2702 StringTable.GetOrAddStringOffset(LenMnemonic, false)); 2703 } 2704 2705 OS << "static const char *const MnemonicTable =\n"; 2706 StringTable.EmitString(OS); 2707 OS << ";\n\n"; 2708 2709 // Emit the static match table; unused classes get initalized to 0 which is 2710 // guaranteed to be InvalidMatchClass. 2711 // 2712 // FIXME: We can reduce the size of this table very easily. First, we change 2713 // it so that store the kinds in separate bit-fields for each index, which 2714 // only needs to be the max width used for classes at that index (we also need 2715 // to reject based on this during classification). If we then make sure to 2716 // order the match kinds appropriately (putting mnemonics last), then we 2717 // should only end up using a few bits for each class, especially the ones 2718 // following the mnemonic. 2719 OS << "namespace {\n"; 2720 OS << " struct MatchEntry {\n"; 2721 OS << " " << getMinimalTypeForRange(MaxMnemonicIndex) 2722 << " Mnemonic;\n"; 2723 OS << " uint16_t Opcode;\n"; 2724 OS << " " << getMinimalTypeForRange(Info.Matchables.size()) 2725 << " ConvertFn;\n"; 2726 OS << " " << getMinimalTypeForRange(1ULL << Info.SubtargetFeatures.size()) 2727 << " RequiredFeatures;\n"; 2728 OS << " " << getMinimalTypeForRange(Info.Classes.size()) 2729 << " Classes[" << MaxNumOperands << "];\n"; 2730 OS << " uint8_t AsmVariantID;\n\n"; 2731 OS << " StringRef getMnemonic() const {\n"; 2732 OS << " return StringRef(MnemonicTable + Mnemonic + 1,\n"; 2733 OS << " MnemonicTable[Mnemonic]);\n"; 2734 OS << " }\n"; 2735 OS << " };\n\n"; 2736 2737 OS << " // Predicate for searching for an opcode.\n"; 2738 OS << " struct LessOpcode {\n"; 2739 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n"; 2740 OS << " return LHS.getMnemonic() < RHS;\n"; 2741 OS << " }\n"; 2742 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n"; 2743 OS << " return LHS < RHS.getMnemonic();\n"; 2744 OS << " }\n"; 2745 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n"; 2746 OS << " return LHS.getMnemonic() < RHS.getMnemonic();\n"; 2747 OS << " }\n"; 2748 OS << " };\n"; 2749 2750 OS << "} // end anonymous namespace.\n\n"; 2751 2752 OS << "static const MatchEntry MatchTable[" 2753 << Info.Matchables.size() << "] = {\n"; 2754 2755 for (std::vector<MatchableInfo*>::const_iterator it = 2756 Info.Matchables.begin(), ie = Info.Matchables.end(); 2757 it != ie; ++it) { 2758 MatchableInfo &II = **it; 2759 2760 // Store a pascal-style length byte in the mnemonic. 2761 std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str(); 2762 OS << " { " << StringTable.GetOrAddStringOffset(LenMnemonic, false) 2763 << " /* " << II.Mnemonic << " */, " 2764 << Target.getName() << "::" 2765 << II.getResultInst()->TheDef->getName() << ", " 2766 << II.ConversionFnKind << ", "; 2767 2768 // Write the required features mask. 2769 if (!II.RequiredFeatures.empty()) { 2770 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) { 2771 if (i) OS << "|"; 2772 OS << II.RequiredFeatures[i]->getEnumName(); 2773 } 2774 } else 2775 OS << "0"; 2776 2777 OS << ", { "; 2778 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) { 2779 MatchableInfo::AsmOperand &Op = II.AsmOperands[i]; 2780 2781 if (i) OS << ", "; 2782 OS << Op.Class->Name; 2783 } 2784 OS << " }, " << II.AsmVariantID; 2785 OS << "},\n"; 2786 } 2787 2788 OS << "};\n\n"; 2789 2790 // A method to determine if a mnemonic is in the list. 2791 OS << "bool " << Target.getName() << ClassName << "::\n" 2792 << "mnemonicIsValid(StringRef Mnemonic) {\n"; 2793 OS << " // Search the table.\n"; 2794 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n"; 2795 OS << " std::equal_range(MatchTable, MatchTable+" 2796 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n"; 2797 OS << " return MnemonicRange.first != MnemonicRange.second;\n"; 2798 OS << "}\n\n"; 2799 2800 // Finally, build the match function. 2801 OS << "unsigned " 2802 << Target.getName() << ClassName << "::\n" 2803 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>" 2804 << " &Operands,\n"; 2805 OS << " MCInst &Inst,\n" 2806 << "unsigned &ErrorInfo, bool matchingInlineAsm, unsigned VariantID) {\n"; 2807 2808 OS << " // Eliminate obvious mismatches.\n"; 2809 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n"; 2810 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n"; 2811 OS << " return Match_InvalidOperand;\n"; 2812 OS << " }\n\n"; 2813 2814 // Emit code to get the available features. 2815 OS << " // Get the current feature set.\n"; 2816 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n"; 2817 2818 OS << " // Get the instruction mnemonic, which is the first token.\n"; 2819 OS << " StringRef Mnemonic = ((" << Target.getName() 2820 << "Operand*)Operands[0])->getToken();\n\n"; 2821 2822 if (HasMnemonicAliases) { 2823 OS << " // Process all MnemonicAliases to remap the mnemonic.\n"; 2824 OS << " // FIXME : Add an entry in AsmParserVariant to check this.\n"; 2825 OS << " if (!VariantID)\n"; 2826 OS << " applyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n"; 2827 } 2828 2829 // Emit code to compute the class list for this operand vector. 2830 OS << " // Some state to try to produce better error messages.\n"; 2831 OS << " bool HadMatchOtherThanFeatures = false;\n"; 2832 OS << " bool HadMatchOtherThanPredicate = false;\n"; 2833 OS << " unsigned RetCode = Match_InvalidOperand;\n"; 2834 OS << " unsigned MissingFeatures = ~0U;\n"; 2835 OS << " // Set ErrorInfo to the operand that mismatches if it is\n"; 2836 OS << " // wrong for all instances of the instruction.\n"; 2837 OS << " ErrorInfo = ~0U;\n"; 2838 2839 // Emit code to search the table. 2840 OS << " // Search the table.\n"; 2841 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n"; 2842 OS << " std::equal_range(MatchTable, MatchTable+" 2843 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n\n"; 2844 2845 OS << " // Return a more specific error code if no mnemonics match.\n"; 2846 OS << " if (MnemonicRange.first == MnemonicRange.second)\n"; 2847 OS << " return Match_MnemonicFail;\n\n"; 2848 2849 OS << " for (const MatchEntry *it = MnemonicRange.first, " 2850 << "*ie = MnemonicRange.second;\n"; 2851 OS << " it != ie; ++it) {\n"; 2852 2853 OS << " // equal_range guarantees that instruction mnemonic matches.\n"; 2854 OS << " assert(Mnemonic == it->getMnemonic());\n"; 2855 2856 // Emit check that the subclasses match. 2857 OS << " if (VariantID != it->AsmVariantID) continue;\n"; 2858 OS << " bool OperandsValid = true;\n"; 2859 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n"; 2860 OS << " if (i + 1 >= Operands.size()) {\n"; 2861 OS << " OperandsValid = (it->Classes[i] == " <<"InvalidMatchClass);\n"; 2862 OS << " if (!OperandsValid) ErrorInfo = i + 1;\n"; 2863 OS << " break;\n"; 2864 OS << " }\n"; 2865 OS << " unsigned Diag = validateOperandClass(Operands[i+1],\n"; 2866 OS.indent(43); 2867 OS << "(MatchClassKind)it->Classes[i]);\n"; 2868 OS << " if (Diag == Match_Success)\n"; 2869 OS << " continue;\n"; 2870 OS << " // If this operand is broken for all of the instances of this\n"; 2871 OS << " // mnemonic, keep track of it so we can report loc info.\n"; 2872 OS << " // If we already had a match that only failed due to a\n"; 2873 OS << " // target predicate, that diagnostic is preferred.\n"; 2874 OS << " if (!HadMatchOtherThanPredicate &&\n"; 2875 OS << " (it == MnemonicRange.first || ErrorInfo <= i+1)) {\n"; 2876 OS << " ErrorInfo = i+1;\n"; 2877 OS << " // InvalidOperand is the default. Prefer specificity.\n"; 2878 OS << " if (Diag != Match_InvalidOperand)\n"; 2879 OS << " RetCode = Diag;\n"; 2880 OS << " }\n"; 2881 OS << " // Otherwise, just reject this instance of the mnemonic.\n"; 2882 OS << " OperandsValid = false;\n"; 2883 OS << " break;\n"; 2884 OS << " }\n\n"; 2885 2886 OS << " if (!OperandsValid) continue;\n"; 2887 2888 // Emit check that the required features are available. 2889 OS << " if ((AvailableFeatures & it->RequiredFeatures) " 2890 << "!= it->RequiredFeatures) {\n"; 2891 OS << " HadMatchOtherThanFeatures = true;\n"; 2892 OS << " unsigned NewMissingFeatures = it->RequiredFeatures & " 2893 "~AvailableFeatures;\n"; 2894 OS << " if (CountPopulation_32(NewMissingFeatures) <=\n" 2895 " CountPopulation_32(MissingFeatures))\n"; 2896 OS << " MissingFeatures = NewMissingFeatures;\n"; 2897 OS << " continue;\n"; 2898 OS << " }\n"; 2899 OS << "\n"; 2900 OS << " if (matchingInlineAsm) {\n"; 2901 OS << " Inst.setOpcode(it->Opcode);\n"; 2902 OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n"; 2903 OS << " return Match_Success;\n"; 2904 OS << " }\n\n"; 2905 OS << " // We have selected a definite instruction, convert the parsed\n" 2906 << " // operands into the appropriate MCInst.\n"; 2907 OS << " convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n"; 2908 OS << "\n"; 2909 2910 // Verify the instruction with the target-specific match predicate function. 2911 OS << " // We have a potential match. Check the target predicate to\n" 2912 << " // handle any context sensitive constraints.\n" 2913 << " unsigned MatchResult;\n" 2914 << " if ((MatchResult = checkTargetMatchPredicate(Inst)) !=" 2915 << " Match_Success) {\n" 2916 << " Inst.clear();\n" 2917 << " RetCode = MatchResult;\n" 2918 << " HadMatchOtherThanPredicate = true;\n" 2919 << " continue;\n" 2920 << " }\n\n"; 2921 2922 // Call the post-processing function, if used. 2923 std::string InsnCleanupFn = 2924 AsmParser->getValueAsString("AsmParserInstCleanup"); 2925 if (!InsnCleanupFn.empty()) 2926 OS << " " << InsnCleanupFn << "(Inst);\n"; 2927 2928 OS << " return Match_Success;\n"; 2929 OS << " }\n\n"; 2930 2931 OS << " // Okay, we had no match. Try to return a useful error code.\n"; 2932 OS << " if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)\n"; 2933 OS << " return RetCode;\n\n"; 2934 OS << " // Missing feature matches return which features were missing\n"; 2935 OS << " ErrorInfo = MissingFeatures;\n"; 2936 OS << " return Match_MissingFeature;\n"; 2937 OS << "}\n\n"; 2938 2939 if (Info.OperandMatchInfo.size()) 2940 emitCustomOperandParsing(OS, Target, Info, ClassName, StringTable, 2941 MaxMnemonicIndex); 2942 2943 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n"; 2944} 2945 2946namespace llvm { 2947 2948void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) { 2949 emitSourceFileHeader("Assembly Matcher Source Fragment", OS); 2950 AsmMatcherEmitter(RK).run(OS); 2951} 2952 2953} // End llvm namespace 2954