DisassemblerEmitter.cpp revision b68a3ee82a8a34f7bae1d68d76f574e76a5535ef
15d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)//===- DisassemblerEmitter.cpp - Generate a disassembler ------------------===// 25d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// 35d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// The LLVM Compiler Infrastructure 45d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// 55d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// This file is distributed under the University of Illinois Open Source 65d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// License. See LICENSE.TXT for details. 75d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)// 85d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)//===----------------------------------------------------------------------===// 95d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles) 105d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)#include "DisassemblerEmitter.h" 11116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch#include "CodeGenTarget.h" 12116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch#include "Record.h" 13116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch#include "X86DisassemblerTables.h" 14116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch#include "X86RecognizableInstr.h" 15116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch#include "ARMDecoderEmitter.h" 16116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 17116680a4aac90f2aa7413d9095a592090648e557Ben Murdochusing namespace llvm; 18116680a4aac90f2aa7413d9095a592090648e557Ben Murdochusing namespace llvm::X86Disassembler; 19116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 20116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// DisassemblerEmitter - Contains disassembler table emitters for various 21116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// architectures. 22116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 23116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// X86 Disassembler Emitter 24116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// 255d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// *** IF YOU'RE HERE TO RESOLVE A "Primary decode conflict", LOOK DOWN NEAR 265d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// THE END OF THIS COMMENT! 275d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// 285d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// The X86 disassembler emitter is part of the X86 Disassembler, which is 295d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// documented in lib/Target/X86/X86Disassembler.h. 305d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// 315d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// The emitter produces the tables that the disassembler uses to translate 325d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// instructions. The emitter generates the following tables: 335d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// 345d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// - One table (CONTEXTS_SYM) that contains a mapping of attribute masks to 355d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// instruction contexts. Although for each attribute there are cases where 365d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// that attribute determines decoding, in the majority of cases decoding is 375d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// the same whether or not an attribute is present. For example, a 64-bit 385d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// instruction with an OPSIZE prefix and an XS prefix decodes the same way in 395d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// all cases as a 64-bit instruction with only OPSIZE set. (The XS prefix 405d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// may have effects on its execution, but does not change the instruction 415d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// returned.) This allows considerable space savings in other tables. 425d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// - Four tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and 435d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// THREEBYTE3A_SYM) contain the hierarchy that the decoder traverses while 445d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// decoding an instruction. At the lowest level of this hierarchy are 455d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// instruction UIDs, 16-bit integers that can be used to uniquely identify 465d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// the instruction and correspond exactly to its position in the list of 475d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// CodeGenInstructions for the target. 485d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// - One table (INSTRUCTIONS_SYM) contains information about the operands of 495d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// each instruction and how to decode them. 505d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// 515d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// During table generation, there may be conflicts between instructions that 525d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// occupy the same space in the decode tables. These conflicts are resolved as 535d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// follows in setTableFields() (X86DisassemblerTables.cpp) 545d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// 555d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// - If the current context is the native context for one of the instructions 565d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// (that is, the attributes specified for it in the LLVM tables specify 575d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// precisely the current context), then it has priority. 585d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// - If the current context isn't native for either of the instructions, then 595d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// the higher-priority context wins (that is, the one that is more specific). 605d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// That hierarchy is determined by outranks() (X86DisassemblerTables.cpp) 615d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// - If the current context is native for both instructions, then the table 625d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// emitter reports a conflict and dies. 635d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// 645d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// *** RESOLUTION FOR "Primary decode conflict"S 65116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// 66116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// If two instructions collide, typically the solution is (in order of 67116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// likelihood): 68116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// 69116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// (1) to filter out one of the instructions by editing filter() 70116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// (X86RecognizableInstr.cpp). This is the most common resolution, but 71116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// check the Intel manuals first to make sure that (2) and (3) are not the 72116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// problem. 73116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// (2) to fix the tables (X86.td and its subsidiaries) so the opcodes are 74116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// accurate. Sometimes they are not. 75116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// (3) to fix the tables to reflect the actual context (for example, required 76116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// prefixes), and possibly to add a new context by editing 77116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// lib/Target/X86/X86DisassemblerDecoderCommon.h. This is unlikely to be 78116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// the cause. 79116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// 805d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// DisassemblerEmitter.cpp contains the implementation for the emitter, 815d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// which simply pulls out instructions from the CodeGenTarget and pushes them 825d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// into X86DisassemblerTables. 835d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// X86DisassemblerTables.h contains the interface for the instruction tables, 845d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// which manage and emit the structures discussed above. 855d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// X86DisassemblerTables.cpp contains the implementation for the instruction 865d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// tables. 875d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// X86ModRMFilters.h contains filters that can be used to determine which 885d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// ModR/M values are valid for a particular instruction. These are used to 895d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// populate ModRMDecisions. 905d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// X86RecognizableInstr.h contains the interface for a single instruction, 915d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// which knows how to translate itself from a CodeGenInstruction and provide 925d1f7b1de12d16ceb2c938c56701a3e8bfa558f7Torne (Richard Coles)/// the information necessary for integration into the tables. 93116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// X86RecognizableInstr.cpp contains the implementation for a single 94116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch/// instruction. 95116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 96116680a4aac90f2aa7413d9095a592090648e557Ben Murdochvoid DisassemblerEmitter::run(raw_ostream &OS) { 97116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch CodeGenTarget Target; 98116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 99116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch OS << "/*===- TableGen'erated file " 100116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << "---------------------------------------*- C -*-===*\n" 101116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << " *\n" 102116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << " * " << Target.getName() << " Disassembler\n" 103116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << " *\n" 104116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << " * Automatically generated file, do not edit!\n" 105116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << " *\n" 106116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << " *===---------------------------------------------------------------" 107116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch << "-------===*/\n"; 108116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 109116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch // X86 uses a custom disassembler. 110116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch if (Target.getName() == "X86") { 111116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch DisassemblerTables Tables; 112116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 113116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch const std::vector<const CodeGenInstruction*> &numberedInstructions = 114116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch Target.getInstructionsByEnumValue(); 115116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 116116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch for (unsigned i = 0, e = numberedInstructions.size(); i != e; ++i) 117116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch RecognizableInstr::processInstr(Tables, *numberedInstructions[i], i); 118116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 119116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch // FIXME: As long as we are using exceptions, might as well drop this to the 120116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch // actual conflict site. 121116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch if (Tables.hasConflicts()) 122116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch throw TGError(Target.getTargetRecord()->getLoc(), 123116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch "Primary decode conflict"); 124116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 125116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch Tables.emit(OS); 126116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch return; 127116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch } 128116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 129116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch // Fixed-instruction-length targets use a common disassembler. 130116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch if (Target.getName() == "ARM") { 131116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch ARMDecoderEmitter(Records).run(OS); 132116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch return; 133116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch } 134116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 135116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch throw TGError(Target.getTargetRecord()->getLoc(), 136116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch "Unable to generate disassembler for this target"); 137116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch} 138116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch