RegisterInfoEmitter.cpp revision ac46893e246748876d1155bb0c9e8892e52acab7
1//===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This tablegen backend is responsible for emitting a description of a target
11// register file for a code generator.  It uses instances of the Register,
12// RegisterAliases, and RegisterClass classes to gather this information.
13//
14//===----------------------------------------------------------------------===//
15
16#include "RegisterInfoEmitter.h"
17#include "CodeGenTarget.h"
18#include "CodeGenRegisters.h"
19#include "Record.h"
20#include "llvm/ADT/StringExtras.h"
21#include "llvm/ADT/STLExtras.h"
22#include <set>
23using namespace llvm;
24
25// runEnums - Print out enum values for all of the registers.
26void RegisterInfoEmitter::runEnums(std::ostream &OS) {
27  CodeGenTarget Target;
28  const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
29
30  std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
31
32  EmitSourceFileHeader("Target Register Enum Values", OS);
33  OS << "namespace llvm {\n\n";
34
35  if (!Namespace.empty())
36    OS << "namespace " << Namespace << " {\n";
37  OS << "  enum {\n    NoRegister,\n";
38
39  for (unsigned i = 0, e = Registers.size(); i != e; ++i)
40    OS << "    " << Registers[i].getName() << ", \t// " << i+1 << "\n";
41
42  OS << "  };\n";
43  if (!Namespace.empty())
44    OS << "}\n";
45  OS << "} // End llvm namespace \n";
46}
47
48void RegisterInfoEmitter::runHeader(std::ostream &OS) {
49  EmitSourceFileHeader("Register Information Header Fragment", OS);
50  CodeGenTarget Target;
51  const std::string &TargetName = Target.getName();
52  std::string ClassName = TargetName + "GenRegisterInfo";
53
54  OS << "#include \"llvm/Target/MRegisterInfo.h\"\n\n";
55
56  OS << "namespace llvm {\n\n";
57
58  OS << "struct " << ClassName << " : public MRegisterInfo {\n"
59     << "  " << ClassName
60     << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
61     << "  const unsigned* getCalleeSaveRegs() const;\n"
62     << "};\n\n";
63
64  const std::vector<CodeGenRegisterClass> &RegisterClasses =
65    Target.getRegisterClasses();
66
67  if (!RegisterClasses.empty()) {
68    OS << "namespace " << RegisterClasses[0].Namespace
69       << " { // Register classes\n";
70    for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
71      const std::string &Name = RegisterClasses[i].getName();
72      OS << "  extern TargetRegisterClass * const "<< Name <<"RegisterClass;\n";
73    }
74    OS << "} // end of namespace " << TargetName << "\n\n";
75  }
76  OS << "} // End llvm namespace \n";
77}
78
79// RegisterInfoEmitter::run - Main register file description emitter.
80//
81void RegisterInfoEmitter::run(std::ostream &OS) {
82  CodeGenTarget Target;
83  EmitSourceFileHeader("Register Information Source Fragment", OS);
84
85  OS << "namespace llvm {\n\n";
86
87  // Start out by emitting each of the register classes... to do this, we build
88  // a set of registers which belong to a register class, this is to ensure that
89  // each register is only in a single register class.
90  //
91  const std::vector<CodeGenRegisterClass> &RegisterClasses =
92    Target.getRegisterClasses();
93
94  std::set<Record*> RegistersFound;
95
96  // Loop over all of the register classes... emitting each one.
97  OS << "namespace {     // Register classes...\n";
98
99  // RegClassesBelongedTo - Keep track of which register classes each reg
100  // belongs to.
101  std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
102
103  for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
104    const CodeGenRegisterClass &RC = RegisterClasses[rc];
105
106    // Give the register class a legal C name if it's anonymous.
107    std::string Name = RC.TheDef->getName();
108
109    // Emit the register list now.
110    OS << "  // " << Name << " Register Class...\n  const unsigned " << Name
111       << "[] = {\n    ";
112    for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
113      Record *Reg = RC.Elements[i];
114      if (RegistersFound.count(Reg))
115        throw "Register '" + Reg->getName() +
116              "' included in multiple register classes!";
117      RegistersFound.insert(Reg);
118      OS << getQualifiedName(Reg) << ", ";
119
120      // Keep track of which regclasses this register is in.
121      RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
122    }
123    OS << "\n  };\n\n";
124
125    OS << "  struct " << Name << "Class : public TargetRegisterClass {\n"
126       << "    " << Name << "Class() : TargetRegisterClass("
127       << RC.SpillSize/8 << ", " << RC.SpillAlignment/8 << ", " << Name << ", "
128       << Name << " + " << RC.Elements.size() << ") {}\n"
129       << RC.MethodProtos << "  };\n";
130    OS << RC.MethodBodies << "\n";
131  }
132  OS << "}  // end anonymous namespace\n\n";
133
134  // Now that all of the structs have been emitted, emit the instances.
135  if (!RegisterClasses.empty()) {
136    OS << "namespace " << RegisterClasses[0].Namespace
137       << " {   // Register class instances\n";
138    for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
139      OS << "  " << RegisterClasses[i].getName()  << "Class\t"
140         << RegisterClasses[i].getName() << "RegClassInstance;\n";
141    OS << "}\n";
142  }
143
144  OS << "\nnamespace {\n";
145  OS << "  const TargetRegisterClass* const RegisterClasses[] = {\n";
146  for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
147    OS << "    &" << getQualifiedName(RegisterClasses[i].TheDef)
148       << "RegClassInstance,\n";
149  OS << "  };\n";
150
151  // Emit register class aliases...
152  std::map<Record*, std::set<Record*> > RegisterAliases;
153  const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
154
155  for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
156    Record *R = Regs[i].TheDef;
157    ListInit *LI = Regs[i].TheDef->getValueAsListInit("Aliases");
158    // Add information that R aliases all of the elements in the list... and
159    // that everything in the list aliases R.
160    for (unsigned j = 0, e = LI->getSize(); j != e; ++j) {
161      DefInit *Reg = dynamic_cast<DefInit*>(LI->getElement(j));
162      if (!Reg) throw "ERROR: Alias list element is not a def!";
163      if (RegisterAliases[R].count(Reg->getDef()))
164        std::cerr << "Warning: register alias between " << getQualifiedName(R)
165                  << " and " << getQualifiedName(Reg->getDef())
166                  << " specified multiple times!\n";
167      RegisterAliases[R].insert(Reg->getDef());
168
169      if (RegisterAliases[Reg->getDef()].count(R))
170        std::cerr << "Warning: register alias between " << getQualifiedName(R)
171                  << " and " << getQualifiedName(Reg->getDef())
172                  << " specified multiple times!\n";
173      RegisterAliases[Reg->getDef()].insert(R);
174    }
175  }
176
177  if (!RegisterAliases.empty())
178    OS << "\n\n  // Register Alias Sets...\n";
179
180  // Emit the empty alias list
181  OS << "  const unsigned Empty_AliasSet[] = { 0 };\n";
182  // Loop over all of the registers which have aliases, emitting the alias list
183  // to memory.
184  for (std::map<Record*, std::set<Record*> >::iterator
185         I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
186    OS << "  const unsigned " << I->first->getName() << "_AliasSet[] = { ";
187    for (std::set<Record*>::iterator ASI = I->second.begin(),
188           E = I->second.end(); ASI != E; ++ASI)
189      OS << getQualifiedName(*ASI) << ", ";
190    OS << "0 };\n";
191  }
192
193  OS << "\n  const MRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
194  OS << "    { \"NOREG\",\t0,\t\t0,\t0 },\n";
195
196
197  // Now that register alias sets have been emitted, emit the register
198  // descriptors now.
199  const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
200  for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
201    const CodeGenRegister &Reg = Registers[i];
202    OS << "    { \"";
203    if (!Reg.TheDef->getValueAsString("Name").empty())
204      OS << Reg.TheDef->getValueAsString("Name");
205    else
206      OS << Reg.getName();
207    OS << "\",\t";
208    if (RegisterAliases.count(Reg.TheDef))
209      OS << Reg.getName() << "_AliasSet,\t";
210    else
211      OS << "Empty_AliasSet,\t";
212
213    // Figure out what the size and alignment of the spill slots are for this
214    // reg.  This may be explicitly declared in the register, or it may be
215    // inferred from the register classes it is part of.
216    std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E;
217    tie(I, E) = RegClassesBelongedTo.equal_range(Reg.TheDef);
218    unsigned SpillSize = Reg.DeclaredSpillSize;
219    unsigned SpillAlign = Reg.DeclaredSpillAlignment;
220    for (; I != E; ++I) {   // For each reg class this belongs to.
221      const CodeGenRegisterClass *RC = I->second;
222      if (SpillSize == 0)
223        SpillSize = RC->SpillSize;
224      else if (SpillSize != RC->SpillSize)
225        throw "Spill size for regclass '" + RC->getName() +
226              "' doesn't match spill sized already inferred for register '" +
227              Reg.getName() + "'!";
228      if (SpillAlign == 0)
229        SpillAlign = RC->SpillAlignment;
230      else if (SpillAlign != RC->SpillAlignment)
231        throw "Spill alignment for regclass '" + RC->getName() +
232              "' doesn't match spill sized already inferred for register '" +
233              Reg.getName() + "'!";
234    }
235
236    OS << SpillSize << ", " << SpillAlign << " },\n";
237  }
238  OS << "  };\n";      // End of register descriptors...
239  OS << "}\n\n";       // End of anonymous namespace...
240
241  if (!RegisterClasses.empty()) {
242    OS << "namespace " << RegisterClasses[0].Namespace
243       << " { // Register classes\n";
244    for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
245      OS << "  TargetRegisterClass * const " << RegisterClasses[i].getName()
246         << "RegisterClass = &" << getQualifiedName(RegisterClasses[i].TheDef)
247         << "RegClassInstance;\n";
248    }
249    OS << "} // end of namespace " << RegisterClasses[0].Namespace << "\n\n";
250  }
251
252
253  std::string ClassName = Target.getName() + "GenRegisterInfo";
254
255  // Emit the constructor of the class...
256  OS << ClassName << "::" << ClassName
257     << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
258     << "  : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
259     << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
260     << "                 CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
261
262  // Emit the getCalleeSaveRegs method...
263  OS << "const unsigned* " << ClassName << "::getCalleeSaveRegs() const {\n"
264     << "  static const unsigned CalleeSaveRegs[] = {\n    ";
265
266  const std::vector<Record*> &CSR = Target.getCalleeSavedRegisters();
267  for (unsigned i = 0, e = CSR.size(); i != e; ++i)
268    OS << getQualifiedName(CSR[i]) << ", ";
269  OS << " 0\n  };\n  return CalleeSaveRegs;\n}\n\n";
270  OS << "} // End llvm namespace \n";
271}
272