RegisterInfoEmitter.cpp revision f5da13367f88f06e3b585dc2263ab6e9ca6c4bf8
1//===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This tablegen backend is responsible for emitting a description of a target 11// register file for a code generator. It uses instances of the Register, 12// RegisterAliases, and RegisterClass classes to gather this information. 13// 14//===----------------------------------------------------------------------===// 15 16#include "RegisterInfoEmitter.h" 17#include "CodeGenTarget.h" 18#include "CodeGenRegisters.h" 19#include "Record.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/STLExtras.h" 22#include "llvm/Support/Streams.h" 23#include <set> 24using namespace llvm; 25 26// runEnums - Print out enum values for all of the registers. 27void RegisterInfoEmitter::runEnums(std::ostream &OS) { 28 CodeGenTarget Target; 29 const std::vector<CodeGenRegister> &Registers = Target.getRegisters(); 30 31 std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace"); 32 33 EmitSourceFileHeader("Target Register Enum Values", OS); 34 OS << "namespace llvm {\n\n"; 35 36 if (!Namespace.empty()) 37 OS << "namespace " << Namespace << " {\n"; 38 OS << " enum {\n NoRegister,\n"; 39 40 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 41 OS << " " << Registers[i].getName() << (i != (e-1) ? ", \t// " : " \t// ") << i+1 << "\n"; 42 43 OS << " };\n"; 44 if (!Namespace.empty()) 45 OS << "}\n"; 46 OS << "} // End llvm namespace \n"; 47} 48 49void RegisterInfoEmitter::runHeader(std::ostream &OS) { 50 EmitSourceFileHeader("Register Information Header Fragment", OS); 51 CodeGenTarget Target; 52 const std::string &TargetName = Target.getName(); 53 std::string ClassName = TargetName + "GenRegisterInfo"; 54 55 OS << "#include \"llvm/Target/MRegisterInfo.h\"\n"; 56 OS << "#include <string>\n\n"; 57 58 OS << "namespace llvm {\n\n"; 59 60 OS << "struct " << ClassName << " : public MRegisterInfo {\n" 61 << " " << ClassName 62 << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n" 63 << " int getDwarfRegNum(unsigned RegNum) const;\n" 64 << "};\n\n"; 65 66 const std::vector<CodeGenRegisterClass> &RegisterClasses = 67 Target.getRegisterClasses(); 68 69 if (!RegisterClasses.empty()) { 70 OS << "namespace " << RegisterClasses[0].Namespace 71 << " { // Register classes\n"; 72 73 OS << " enum {\n"; 74 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 75 if (i) OS << ",\n"; 76 OS << " " << RegisterClasses[i].getName() << "RegClassID"; 77 if (!i) OS << " = 1"; 78 } 79 OS << "\n };\n\n"; 80 81 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 82 const std::string &Name = RegisterClasses[i].getName(); 83 84 // Output the register class definition. 85 OS << " struct " << Name << "Class : public TargetRegisterClass {\n" 86 << " " << Name << "Class();\n" 87 << RegisterClasses[i].MethodProtos << " };\n"; 88 89 // Output the extern for the instance. 90 OS << " extern " << Name << "Class\t" << Name << "RegClass;\n"; 91 // Output the extern for the pointer to the instance (should remove). 92 OS << " static TargetRegisterClass * const "<< Name <<"RegisterClass = &" 93 << Name << "RegClass;\n"; 94 } 95 OS << "} // end of namespace " << TargetName << "\n\n"; 96 } 97 OS << "} // End llvm namespace \n"; 98} 99 100bool isSubRegisterClass(const CodeGenRegisterClass &RC, 101 std::set<Record*> &RegSet) { 102 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 103 Record *Reg = RC.Elements[i]; 104 if (!RegSet.count(Reg)) 105 return false; 106 } 107 return true; 108} 109 110// RegisterInfoEmitter::run - Main register file description emitter. 111// 112void RegisterInfoEmitter::run(std::ostream &OS) { 113 CodeGenTarget Target; 114 EmitSourceFileHeader("Register Information Source Fragment", OS); 115 116 OS << "namespace llvm {\n\n"; 117 118 // Start out by emitting each of the register classes... to do this, we build 119 // a set of registers which belong to a register class, this is to ensure that 120 // each register is only in a single register class. 121 // 122 const std::vector<CodeGenRegisterClass> &RegisterClasses = 123 Target.getRegisterClasses(); 124 125 // Loop over all of the register classes... emitting each one. 126 OS << "namespace { // Register classes...\n"; 127 128 // RegClassesBelongedTo - Keep track of which register classes each reg 129 // belongs to. 130 std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo; 131 132 // Emit the register enum value arrays for each RegisterClass 133 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 134 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 135 136 // Give the register class a legal C name if it's anonymous. 137 std::string Name = RC.TheDef->getName(); 138 139 // Emit the register list now. 140 OS << " // " << Name << " Register Class...\n" 141 << " static const unsigned " << Name 142 << "[] = {\n "; 143 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 144 Record *Reg = RC.Elements[i]; 145 OS << getQualifiedName(Reg) << ", "; 146 147 // Keep track of which regclasses this register is in. 148 RegClassesBelongedTo.insert(std::make_pair(Reg, &RC)); 149 } 150 OS << "\n };\n\n"; 151 } 152 153 // Emit the ValueType arrays for each RegisterClass 154 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 155 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 156 157 // Give the register class a legal C name if it's anonymous. 158 std::string Name = RC.TheDef->getName() + "VTs"; 159 160 // Emit the register list now. 161 OS << " // " << Name 162 << " Register Class Value Types...\n" 163 << " static const MVT::ValueType " << Name 164 << "[] = {\n "; 165 for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i) 166 OS << RC.VTs[i] << ", "; 167 OS << "MVT::Other\n };\n\n"; 168 } 169 OS << "} // end anonymous namespace\n\n"; 170 171 // Now that all of the structs have been emitted, emit the instances. 172 if (!RegisterClasses.empty()) { 173 OS << "namespace " << RegisterClasses[0].Namespace 174 << " { // Register class instances\n"; 175 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) 176 OS << " " << RegisterClasses[i].getName() << "Class\t" 177 << RegisterClasses[i].getName() << "RegClass;\n"; 178 179 std::map<unsigned, std::set<unsigned> > SuperClassMap; 180 OS << "\n"; 181 // Emit the sub-classes array for each RegisterClass 182 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 183 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 184 185 // Give the register class a legal C name if it's anonymous. 186 std::string Name = RC.TheDef->getName(); 187 188 std::set<Record*> RegSet; 189 for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { 190 Record *Reg = RC.Elements[i]; 191 RegSet.insert(Reg); 192 } 193 194 OS << " // " << Name 195 << " Register Class sub-classes...\n" 196 << " static const TargetRegisterClass* const " 197 << Name << "Subclasses [] = {\n "; 198 199 bool Empty = true; 200 for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) { 201 const CodeGenRegisterClass &RC2 = RegisterClasses[rc2]; 202 if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() || 203 RC.SpillSize != RC2.SpillSize || !isSubRegisterClass(RC2, RegSet)) 204 continue; 205 206 if (!Empty) OS << ", "; 207 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; 208 Empty = false; 209 210 std::map<unsigned, std::set<unsigned> >::iterator SCMI = 211 SuperClassMap.find(rc2); 212 if (SCMI == SuperClassMap.end()) { 213 SuperClassMap.insert(std::make_pair(rc2, std::set<unsigned>())); 214 SCMI = SuperClassMap.find(rc2); 215 } 216 SCMI->second.insert(rc); 217 } 218 219 OS << (!Empty ? ", " : "") << "NULL"; 220 OS << "\n };\n\n"; 221 } 222 223 for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { 224 const CodeGenRegisterClass &RC = RegisterClasses[rc]; 225 226 // Give the register class a legal C name if it's anonymous. 227 std::string Name = RC.TheDef->getName(); 228 229 OS << " // " << Name 230 << " Register Class super-classes...\n" 231 << " static const TargetRegisterClass* const " 232 << Name << "Superclasses [] = {\n "; 233 234 bool Empty = true; 235 std::map<unsigned, std::set<unsigned> >::iterator I = 236 SuperClassMap.find(rc); 237 if (I != SuperClassMap.end()) { 238 for (std::set<unsigned>::iterator II = I->second.begin(), 239 EE = I->second.end(); II != EE; ++II) { 240 const CodeGenRegisterClass &RC2 = RegisterClasses[*II]; 241 if (!Empty) OS << ", "; 242 OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; 243 Empty = false; 244 } 245 } 246 247 OS << (!Empty ? ", " : "") << "NULL"; 248 OS << "\n };\n\n"; 249 } 250 251 252 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { 253 const CodeGenRegisterClass &RC = RegisterClasses[i]; 254 OS << RC.MethodBodies << "\n"; 255 OS << RC.getName() << "Class::" << RC.getName() 256 << "Class() : TargetRegisterClass(" 257 << RC.getName() + "RegClassID" << ", " 258 << RC.getName() + "VTs" << ", " 259 << RC.getName() + "Subclasses" << ", " 260 << RC.getName() + "Superclasses" << ", " 261 << RC.SpillSize/8 << ", " 262 << RC.SpillAlignment/8 << ", " << RC.getName() << ", " 263 << RC.getName() << " + " << RC.Elements.size() << ") {}\n"; 264 } 265 266 OS << "}\n"; 267 } 268 269 OS << "\nnamespace {\n"; 270 OS << " const TargetRegisterClass* const RegisterClasses[] = {\n"; 271 for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) 272 OS << " &" << getQualifiedName(RegisterClasses[i].TheDef) 273 << "RegClass,\n"; 274 OS << " };\n"; 275 276 // Emit register class aliases... 277 std::map<Record*, std::set<Record*> > RegisterAliases; 278 const std::vector<CodeGenRegister> &Regs = Target.getRegisters(); 279 280 for (unsigned i = 0, e = Regs.size(); i != e; ++i) { 281 Record *R = Regs[i].TheDef; 282 std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases"); 283 // Add information that R aliases all of the elements in the list... and 284 // that everything in the list aliases R. 285 for (unsigned j = 0, e = LI.size(); j != e; ++j) { 286 Record *Reg = LI[j]; 287 if (RegisterAliases[R].count(Reg)) 288 cerr << "Warning: register alias between " << getQualifiedName(R) 289 << " and " << getQualifiedName(Reg) 290 << " specified multiple times!\n"; 291 RegisterAliases[R].insert(Reg); 292 293 if (RegisterAliases[Reg].count(R)) 294 cerr << "Warning: register alias between " << getQualifiedName(R) 295 << " and " << getQualifiedName(Reg) 296 << " specified multiple times!\n"; 297 RegisterAliases[Reg].insert(R); 298 } 299 } 300 301 if (!RegisterAliases.empty()) 302 OS << "\n\n // Register Alias Sets...\n"; 303 304 // Emit the empty alias list 305 OS << " const unsigned Empty_AliasSet[] = { 0 };\n"; 306 // Loop over all of the registers which have aliases, emitting the alias list 307 // to memory. 308 for (std::map<Record*, std::set<Record*> >::iterator 309 I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) { 310 OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { "; 311 for (std::set<Record*>::iterator ASI = I->second.begin(), 312 E = I->second.end(); ASI != E; ++ASI) 313 OS << getQualifiedName(*ASI) << ", "; 314 OS << "0 };\n"; 315 } 316 317 OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n"; 318 OS << " { \"NOREG\",\t0 },\n"; 319 320 321 // Now that register alias sets have been emitted, emit the register 322 // descriptors now. 323 const std::vector<CodeGenRegister> &Registers = Target.getRegisters(); 324 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 325 const CodeGenRegister &Reg = Registers[i]; 326 OS << " { \""; 327 if (!Reg.TheDef->getValueAsString("Name").empty()) 328 OS << Reg.TheDef->getValueAsString("Name"); 329 else 330 OS << Reg.getName(); 331 OS << "\",\t"; 332 if (RegisterAliases.count(Reg.TheDef)) 333 OS << Reg.getName() << "_AliasSet },\n"; 334 else 335 OS << "Empty_AliasSet },\n"; 336 } 337 OS << " };\n"; // End of register descriptors... 338 OS << "}\n\n"; // End of anonymous namespace... 339 340 std::string ClassName = Target.getName() + "GenRegisterInfo"; 341 342 // Emit the constructor of the class... 343 OS << ClassName << "::" << ClassName 344 << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n" 345 << " : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1 346 << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n " 347 << " CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n"; 348 349 // Emit information about the dwarf register numbers. 350 OS << "int " << ClassName << "::getDwarfRegNum(unsigned RegNum) const {\n"; 351 OS << " static const int DwarfRegNums[] = { -1, // NoRegister"; 352 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 353 if (!(i % 16)) OS << "\n "; 354 const CodeGenRegister &Reg = Registers[i]; 355 int DwarfRegNum = Reg.TheDef->getValueAsInt("DwarfNumber"); 356 OS << DwarfRegNum; 357 if ((i + 1) != e) OS << ", "; 358 } 359 OS << "\n };\n"; 360 OS << " assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&\n"; 361 OS << " \"RegNum exceeds number of registers\");\n"; 362 OS << " return DwarfRegNums[RegNum];\n"; 363 OS << "}\n\n"; 364 365 OS << "} // End llvm namespace \n"; 366} 367