lp_bld_limits.h revision 6dddd184803da5f67f69e7c243dbb596b4dd4b9d 
1/**************************************************************************
2 *
3 * Copyright 2010-2012 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
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27
28
29#ifndef LP_BLD_LIMITS_H_
30#define LP_BLD_LIMITS_H_
31
32
33#include <limits.h>
34
35#include "pipe/p_state.h"
36#include "pipe/p_defines.h"
37
38
39/*
40 * TGSI translation limits.
41 *
42 * Some are slightly above SM 3.0 requirements to give some wiggle room to
43 * the state trackers.
44 */
45
46#define LP_MAX_TGSI_TEMPS 256
47
48#define LP_MAX_TGSI_ADDRS 16
49
50#define LP_MAX_TGSI_IMMEDIATES 256
51
52#define LP_MAX_TGSI_PREDS 16
53
54/**
55 * Maximum control flow nesting
56 *
57 * SM3.0 requires 24
58 */
59#define LP_MAX_TGSI_NESTING 32
60
61/**
62 * Maximum iterations before loop termination
63 * Shared between every loop in a TGSI shader
64 */
65#define LP_MAX_TGSI_LOOP_ITERATIONS 65535
66
67
68/**
69 * Some of these limits are actually infinite (i.e., only limited by available
70 * memory), however advertising INT_MAX would cause some test problems to
71 * actually try to allocate the maximum and run out of memory and crash.  So
72 * stick with something reasonable here.
73 */
74static INLINE int
75gallivm_get_shader_param(enum pipe_shader_cap param)
76{
77   switch(param) {
78   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
79   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
80   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
81   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
82      return 1 * 1024 * 1024;
83   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
84      return LP_MAX_TGSI_NESTING;
85   case PIPE_SHADER_CAP_MAX_INPUTS:
86      return PIPE_MAX_SHADER_INPUTS;
87   case PIPE_SHADER_CAP_MAX_CONSTS:
88      return 16 * 2024;
89   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
90      return PIPE_MAX_CONSTANT_BUFFERS;
91   case PIPE_SHADER_CAP_MAX_TEMPS:
92      return LP_MAX_TGSI_TEMPS;
93   case PIPE_SHADER_CAP_MAX_ADDRS:
94      return LP_MAX_TGSI_ADDRS;
95   case PIPE_SHADER_CAP_MAX_PREDS:
96      return LP_MAX_TGSI_PREDS;
97   case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
98      return 1;
99   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
100   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
101   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
102   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
103      return 1;
104   case PIPE_SHADER_CAP_SUBROUTINES:
105      return 1;
106   case PIPE_SHADER_CAP_INTEGERS:
107      return 1;
108   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
109      return PIPE_MAX_SAMPLERS;
110   default:
111      return 0;
112   }
113}
114
115
116#endif /* LP_BLD_LIMITS_H_ */
117