tgsi_exec.h revision 2083a276eb270b748d1c2668eb9faa5aadc8e700
1/************************************************************************** 2 * 3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * Copyright 2009-2010 VMware, Inc. All rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial portions 17 * of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 **************************************************************************/ 28 29#ifndef TGSI_EXEC_H 30#define TGSI_EXEC_H 31 32#include "pipe/p_compiler.h" 33#include "pipe/p_state.h" 34#include "pipe/p_shader_tokens.h" 35 36#if defined __cplusplus 37extern "C" { 38#endif 39 40 41#define NUM_CHANNELS 4 /* R,G,B,A */ 42#define QUAD_SIZE 4 /* 4 pixel/quad */ 43 44 45/** 46 * Registers may be treated as float, signed int or unsigned int. 47 */ 48union tgsi_exec_channel 49{ 50 float f[QUAD_SIZE]; 51 int i[QUAD_SIZE]; 52 unsigned u[QUAD_SIZE]; 53}; 54 55/** 56 * A vector[RGBA] of channels[4 pixels] 57 */ 58struct tgsi_exec_vector 59{ 60 union tgsi_exec_channel xyzw[NUM_CHANNELS]; 61}; 62 63/** 64 * For fragment programs, information for computing fragment input 65 * values from plane equation of the triangle/line. 66 */ 67struct tgsi_interp_coef 68{ 69 float a0[NUM_CHANNELS]; /* in an xyzw layout */ 70 float dadx[NUM_CHANNELS]; 71 float dady[NUM_CHANNELS]; 72}; 73 74enum tgsi_sampler_control { 75 tgsi_sampler_lod_bias, 76 tgsi_sampler_lod_explicit 77}; 78 79/** 80 * Information for sampling textures, which must be implemented 81 * by code outside the TGSI executor. 82 */ 83struct tgsi_sampler 84{ 85 /** Get samples for four fragments in a quad */ 86 void (*get_samples)(struct tgsi_sampler *sampler, 87 const float s[QUAD_SIZE], 88 const float t[QUAD_SIZE], 89 const float p[QUAD_SIZE], 90 const float c0[QUAD_SIZE], 91 enum tgsi_sampler_control control, 92 float rgba[NUM_CHANNELS][QUAD_SIZE]); 93 void (*get_dims)(struct tgsi_sampler *sampler, int level, 94 int dims[4]); 95 void (*get_texel)(struct tgsi_sampler *sampler, const int i[QUAD_SIZE], 96 const int j[QUAD_SIZE], const int k[QUAD_SIZE], 97 const int lod[QUAD_SIZE], const int8_t offset[3], 98 float rgba[NUM_CHANNELS][QUAD_SIZE]); 99}; 100 101#define TGSI_EXEC_NUM_TEMPS 128 102#define TGSI_EXEC_NUM_IMMEDIATES 256 103#define TGSI_EXEC_NUM_TEMP_ARRAYS 8 104 105/* 106 * Locations of various utility registers (_I = Index, _C = Channel) 107 */ 108#define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0) 109#define TGSI_EXEC_TEMP_00000000_C 0 110 111#define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) 112#define TGSI_EXEC_TEMP_7FFFFFFF_C 1 113 114#define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0) 115#define TGSI_EXEC_TEMP_80000000_C 2 116 117#define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) 118#define TGSI_EXEC_TEMP_FFFFFFFF_C 3 119 120#define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1) 121#define TGSI_EXEC_TEMP_ONE_C 0 122 123#define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1) 124#define TGSI_EXEC_TEMP_TWO_C 1 125 126#define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1) 127#define TGSI_EXEC_TEMP_128_C 2 128 129#define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1) 130#define TGSI_EXEC_TEMP_MINUS_128_C 3 131 132#define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2) 133#define TGSI_EXEC_TEMP_KILMASK_C 0 134 135#define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2) 136#define TGSI_EXEC_TEMP_OUTPUT_C 1 137 138#define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2) 139#define TGSI_EXEC_TEMP_PRIMITIVE_C 2 140 141#define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2) 142#define TGSI_EXEC_TEMP_THREE_C 3 143 144#define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3) 145#define TGSI_EXEC_TEMP_HALF_C 0 146 147/* execution mask, each value is either 0 or ~0 */ 148#define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3) 149#define TGSI_EXEC_MASK_C 1 150 151/* 4 register buffer for various purposes */ 152#define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4) 153#define TGSI_EXEC_NUM_TEMP_R 4 154 155#define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8) 156#define TGSI_EXEC_NUM_ADDRS 1 157 158/* predicate register */ 159#define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9) 160#define TGSI_EXEC_NUM_PREDS 1 161 162#define TGSI_EXEC_NUM_TEMP_EXTRAS 10 163 164 165 166#define TGSI_EXEC_MAX_NESTING 32 167#define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING 168#define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING 169#define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING 170#define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING 171 172/* The maximum number of input attributes per vertex. For 2D 173 * input register files, this is the stride between two 1D 174 * arrays. 175 */ 176#define TGSI_EXEC_MAX_INPUT_ATTRIBS 17 177 178/* The maximum number of constant vectors per constant buffer. 179 */ 180#define TGSI_EXEC_MAX_CONST_BUFFER 4096 181 182/* The maximum number of vertices per primitive */ 183#define TGSI_MAX_PRIM_VERTICES 6 184 185/* The maximum number of primitives to be generated */ 186#define TGSI_MAX_PRIMITIVES 64 187 188/* The maximum total number of vertices */ 189#define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS) 190 191#define TGSI_MAX_MISC_INPUTS 8 192 193/** function call/activation record */ 194struct tgsi_call_record 195{ 196 uint CondStackTop; 197 uint LoopStackTop; 198 uint ContStackTop; 199 int SwitchStackTop; 200 int BreakStackTop; 201 uint ReturnAddr; 202}; 203 204 205/* Switch-case block state. */ 206struct tgsi_switch_record { 207 uint mask; /**< execution mask */ 208 union tgsi_exec_channel selector; /**< a value case statements are compared to */ 209 uint defaultMask; /**< non-execute mask for default case */ 210}; 211 212 213enum tgsi_break_type { 214 TGSI_EXEC_BREAK_INSIDE_LOOP, 215 TGSI_EXEC_BREAK_INSIDE_SWITCH 216}; 217 218 219#define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING) 220 221 222/** 223 * Run-time virtual machine state for executing TGSI shader. 224 */ 225struct tgsi_exec_machine 226{ 227 /* Total = program temporaries + internal temporaries 228 */ 229 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS + 230 TGSI_EXEC_NUM_TEMP_EXTRAS]; 231 struct tgsi_exec_vector TempArray[TGSI_EXEC_NUM_TEMP_ARRAYS][TGSI_EXEC_NUM_TEMPS]; 232 233 float Imms[TGSI_EXEC_NUM_IMMEDIATES][4]; 234 235 float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4]; 236 237 struct tgsi_exec_vector *Inputs; 238 struct tgsi_exec_vector *Outputs; 239 240 /* System values */ 241 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT]; 242 float SystemValue[TGSI_MAX_MISC_INPUTS][4]; 243 244 struct tgsi_exec_vector *Addrs; 245 struct tgsi_exec_vector *Predicates; 246 247 struct tgsi_sampler **Samplers; 248 249 unsigned ImmLimit; 250 251 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS]; 252 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS]; 253 254 const struct tgsi_token *Tokens; /**< Declarations, instructions */ 255 unsigned Processor; /**< TGSI_PROCESSOR_x */ 256 257 /* GEOMETRY processor only. */ 258 unsigned *Primitives; 259 unsigned NumOutputs; 260 unsigned MaxGeometryShaderOutputs; 261 262 /* FRAGMENT processor only. */ 263 const struct tgsi_interp_coef *InterpCoefs; 264 struct tgsi_exec_vector QuadPos; 265 float Face; /**< +1 if front facing, -1 if back facing */ 266 267 /* Conditional execution masks */ 268 uint CondMask; /**< For IF/ELSE/ENDIF */ 269 uint LoopMask; /**< For BGNLOOP/ENDLOOP */ 270 uint ContMask; /**< For loop CONT statements */ 271 uint FuncMask; /**< For function calls */ 272 uint ExecMask; /**< = CondMask & LoopMask */ 273 274 /* Current switch-case state. */ 275 struct tgsi_switch_record Switch; 276 277 /* Current break type. */ 278 enum tgsi_break_type BreakType; 279 280 /** Condition mask stack (for nested conditionals) */ 281 uint CondStack[TGSI_EXEC_MAX_COND_NESTING]; 282 int CondStackTop; 283 284 /** Loop mask stack (for nested loops) */ 285 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING]; 286 int LoopStackTop; 287 288 /** Loop label stack */ 289 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING]; 290 int LoopLabelStackTop; 291 292 /** Loop continue mask stack (see comments in tgsi_exec.c) */ 293 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING]; 294 int ContStackTop; 295 296 /** Switch case stack */ 297 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING]; 298 int SwitchStackTop; 299 300 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK]; 301 int BreakStackTop; 302 303 /** Function execution mask stack (for executing subroutine code) */ 304 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING]; 305 int FuncStackTop; 306 307 /** Function call stack for saving/restoring the program counter */ 308 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING]; 309 int CallStackTop; 310 311 struct tgsi_full_instruction *Instructions; 312 uint NumInstructions; 313 314 struct tgsi_full_declaration *Declarations; 315 uint NumDeclarations; 316 317 struct tgsi_declaration_resource Resources[PIPE_MAX_SHADER_RESOURCES]; 318 319 boolean UsedGeometryShader; 320}; 321 322struct tgsi_exec_machine * 323tgsi_exec_machine_create( void ); 324 325void 326tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach); 327 328 329void 330tgsi_exec_machine_bind_shader( 331 struct tgsi_exec_machine *mach, 332 const struct tgsi_token *tokens, 333 uint numSamplers, 334 struct tgsi_sampler **samplers); 335 336uint 337tgsi_exec_machine_run( 338 struct tgsi_exec_machine *mach ); 339 340 341void 342tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach); 343 344 345boolean 346tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst); 347 348 349static INLINE void 350tgsi_set_kill_mask(struct tgsi_exec_machine *mach, unsigned mask) 351{ 352 mach->Temps[TGSI_EXEC_TEMP_KILMASK_I].xyzw[TGSI_EXEC_TEMP_KILMASK_C].u[0] = 353 mask; 354} 355 356 357/** Set execution mask values prior to executing the shader */ 358static INLINE void 359tgsi_set_exec_mask(struct tgsi_exec_machine *mach, 360 boolean ch0, boolean ch1, boolean ch2, boolean ch3) 361{ 362 int *mask = mach->Temps[TGSI_EXEC_MASK_I].xyzw[TGSI_EXEC_MASK_C].i; 363 mask[0] = ch0 ? ~0 : 0; 364 mask[1] = ch1 ? ~0 : 0; 365 mask[2] = ch2 ? ~0 : 0; 366 mask[3] = ch3 ? ~0 : 0; 367} 368 369 370extern void 371tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach, 372 unsigned num_bufs, 373 const void **bufs, 374 const unsigned *buf_sizes); 375 376 377static INLINE int 378tgsi_exec_get_shader_param(enum pipe_shader_cap param) 379{ 380 switch(param) { 381 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 382 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 383 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 384 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 385 return INT_MAX; 386 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 387 return TGSI_EXEC_MAX_NESTING; 388 case PIPE_SHADER_CAP_MAX_INPUTS: 389 return TGSI_EXEC_MAX_INPUT_ATTRIBS; 390 case PIPE_SHADER_CAP_MAX_CONSTS: 391 return TGSI_EXEC_MAX_CONST_BUFFER; 392 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 393 return PIPE_MAX_CONSTANT_BUFFERS; 394 case PIPE_SHADER_CAP_MAX_TEMPS: 395 return TGSI_EXEC_NUM_TEMPS; 396 case PIPE_SHADER_CAP_MAX_ADDRS: 397 return TGSI_EXEC_NUM_ADDRS; 398 case PIPE_SHADER_CAP_MAX_PREDS: 399 return TGSI_EXEC_NUM_PREDS; 400 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 401 return 1; 402 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 403 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 404 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 405 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 406 return 1; 407 case PIPE_SHADER_CAP_SUBROUTINES: 408 return 1; 409 case PIPE_SHADER_CAP_INTEGERS: 410 return 1; 411 default: 412 return 0; 413 } 414} 415 416#if defined __cplusplus 417} /* extern "C" */ 418#endif 419 420#endif /* TGSI_EXEC_H */ 421