tgsi_exec.h revision d562f97bef99e051842ae0cec8f5ac46a10a73c4 
1/**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc.  All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29#ifndef TGSI_EXEC_H
30#define TGSI_EXEC_H
31
32#include "pipe/p_compiler.h"
33#include "pipe/p_state.h"
34#include "pipe/p_shader_tokens.h"
35
36#if defined __cplusplus
37extern "C" {
38#endif
39
40
41#define NUM_CHANNELS 4  /* R,G,B,A */
42#define QUAD_SIZE    4  /* 4 pixel/quad */
43
44
45/**
46  * Registers may be treated as float, signed int or unsigned int.
47  */
48union tgsi_exec_channel
49{
50   float    f[QUAD_SIZE];
51   int      i[QUAD_SIZE];
52   unsigned u[QUAD_SIZE];
53};
54
55/**
56  * A vector[RGBA] of channels[4 pixels]
57  */
58struct tgsi_exec_vector
59{
60   union tgsi_exec_channel xyzw[NUM_CHANNELS];
61};
62
63/**
64 * For fragment programs, information for computing fragment input
65 * values from plane equation of the triangle/line.
66 */
67struct tgsi_interp_coef
68{
69   float a0[NUM_CHANNELS];	/* in an xyzw layout */
70   float dadx[NUM_CHANNELS];
71   float dady[NUM_CHANNELS];
72};
73
74enum tgsi_sampler_control {
75   tgsi_sampler_lod_bias,
76   tgsi_sampler_lod_explicit
77};
78
79/**
80 * Information for sampling textures, which must be implemented
81 * by code outside the TGSI executor.
82 */
83struct tgsi_sampler
84{
85   /** Get samples for four fragments in a quad */
86   void (*get_samples)(struct tgsi_sampler *sampler,
87                       const float s[QUAD_SIZE],
88                       const float t[QUAD_SIZE],
89                       const float p[QUAD_SIZE],
90                       const float c0[QUAD_SIZE],
91                       enum tgsi_sampler_control control,
92                       float rgba[NUM_CHANNELS][QUAD_SIZE]);
93   void (*get_dims)(struct tgsi_sampler *sampler, int level,
94		    int dims[4]);
95   void (*get_texel)(struct tgsi_sampler *sampler, const int i[QUAD_SIZE],
96		     const int j[QUAD_SIZE], const int k[QUAD_SIZE],
97		     const int lod[QUAD_SIZE], float rgba[NUM_CHANNELS][QUAD_SIZE]);
98};
99
100#define TGSI_EXEC_NUM_TEMPS       128
101#define TGSI_EXEC_NUM_IMMEDIATES  256
102#define TGSI_EXEC_NUM_TEMP_ARRAYS 8
103
104/*
105 * Locations of various utility registers (_I = Index, _C = Channel)
106 */
107#define TGSI_EXEC_TEMP_00000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
108#define TGSI_EXEC_TEMP_00000000_C   0
109
110#define TGSI_EXEC_TEMP_7FFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
111#define TGSI_EXEC_TEMP_7FFFFFFF_C   1
112
113#define TGSI_EXEC_TEMP_80000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
114#define TGSI_EXEC_TEMP_80000000_C   2
115
116#define TGSI_EXEC_TEMP_FFFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
117#define TGSI_EXEC_TEMP_FFFFFFFF_C   3
118
119#define TGSI_EXEC_TEMP_ONE_I        (TGSI_EXEC_NUM_TEMPS + 1)
120#define TGSI_EXEC_TEMP_ONE_C        0
121
122#define TGSI_EXEC_TEMP_TWO_I        (TGSI_EXEC_NUM_TEMPS + 1)
123#define TGSI_EXEC_TEMP_TWO_C        1
124
125#define TGSI_EXEC_TEMP_128_I        (TGSI_EXEC_NUM_TEMPS + 1)
126#define TGSI_EXEC_TEMP_128_C        2
127
128#define TGSI_EXEC_TEMP_MINUS_128_I  (TGSI_EXEC_NUM_TEMPS + 1)
129#define TGSI_EXEC_TEMP_MINUS_128_C  3
130
131#define TGSI_EXEC_TEMP_KILMASK_I    (TGSI_EXEC_NUM_TEMPS + 2)
132#define TGSI_EXEC_TEMP_KILMASK_C    0
133
134#define TGSI_EXEC_TEMP_OUTPUT_I     (TGSI_EXEC_NUM_TEMPS + 2)
135#define TGSI_EXEC_TEMP_OUTPUT_C     1
136
137#define TGSI_EXEC_TEMP_PRIMITIVE_I  (TGSI_EXEC_NUM_TEMPS + 2)
138#define TGSI_EXEC_TEMP_PRIMITIVE_C  2
139
140#define TGSI_EXEC_TEMP_THREE_I      (TGSI_EXEC_NUM_TEMPS + 2)
141#define TGSI_EXEC_TEMP_THREE_C      3
142
143#define TGSI_EXEC_TEMP_HALF_I       (TGSI_EXEC_NUM_TEMPS + 3)
144#define TGSI_EXEC_TEMP_HALF_C       0
145
146/* execution mask, each value is either 0 or ~0 */
147#define TGSI_EXEC_MASK_I            (TGSI_EXEC_NUM_TEMPS + 3)
148#define TGSI_EXEC_MASK_C            1
149
150/* 4 register buffer for various purposes */
151#define TGSI_EXEC_TEMP_R0           (TGSI_EXEC_NUM_TEMPS + 4)
152#define TGSI_EXEC_NUM_TEMP_R        4
153
154#define TGSI_EXEC_TEMP_ADDR         (TGSI_EXEC_NUM_TEMPS + 8)
155#define TGSI_EXEC_NUM_ADDRS         1
156
157/* predicate register */
158#define TGSI_EXEC_TEMP_P0           (TGSI_EXEC_NUM_TEMPS + 9)
159#define TGSI_EXEC_NUM_PREDS         1
160
161#define TGSI_EXEC_NUM_TEMP_EXTRAS   10
162
163
164
165#define TGSI_EXEC_MAX_NESTING  32
166#define TGSI_EXEC_MAX_COND_NESTING  TGSI_EXEC_MAX_NESTING
167#define TGSI_EXEC_MAX_LOOP_NESTING  TGSI_EXEC_MAX_NESTING
168#define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
169#define TGSI_EXEC_MAX_CALL_NESTING  TGSI_EXEC_MAX_NESTING
170
171/* The maximum number of input attributes per vertex. For 2D
172 * input register files, this is the stride between two 1D
173 * arrays.
174 */
175#define TGSI_EXEC_MAX_INPUT_ATTRIBS 17
176
177/* The maximum number of constant vectors per constant buffer.
178 */
179#define TGSI_EXEC_MAX_CONST_BUFFER  4096
180
181/* The maximum number of vertices per primitive */
182#define TGSI_MAX_PRIM_VERTICES 6
183
184/* The maximum number of primitives to be generated */
185#define TGSI_MAX_PRIMITIVES 64
186
187/* The maximum total number of vertices */
188#define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
189
190#define TGSI_MAX_MISC_INPUTS 8
191
192/** function call/activation record */
193struct tgsi_call_record
194{
195   uint CondStackTop;
196   uint LoopStackTop;
197   uint ContStackTop;
198   int SwitchStackTop;
199   int BreakStackTop;
200   uint ReturnAddr;
201};
202
203
204/* Switch-case block state. */
205struct tgsi_switch_record {
206   uint mask;                          /**< execution mask */
207   union tgsi_exec_channel selector;   /**< a value case statements are compared to */
208   uint defaultMask;                   /**< non-execute mask for default case */
209};
210
211
212enum tgsi_break_type {
213   TGSI_EXEC_BREAK_INSIDE_LOOP,
214   TGSI_EXEC_BREAK_INSIDE_SWITCH
215};
216
217
218#define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
219
220
221/**
222 * Run-time virtual machine state for executing TGSI shader.
223 */
224struct tgsi_exec_machine
225{
226   /* Total = program temporaries + internal temporaries
227    */
228   struct tgsi_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS +
229                                       TGSI_EXEC_NUM_TEMP_EXTRAS];
230   struct tgsi_exec_vector       TempArray[TGSI_EXEC_NUM_TEMP_ARRAYS][TGSI_EXEC_NUM_TEMPS];
231
232   float                         Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
233
234   float                         ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
235
236   struct tgsi_exec_vector       *Inputs;
237   struct tgsi_exec_vector       *Outputs;
238
239   /* System values */
240   unsigned                      SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
241   float                         SystemValue[TGSI_MAX_MISC_INPUTS][4];
242
243   struct tgsi_exec_vector       *Addrs;
244   struct tgsi_exec_vector       *Predicates;
245
246   struct tgsi_sampler           **Samplers;
247
248   unsigned                      ImmLimit;
249
250   const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
251   unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
252
253   const struct tgsi_token       *Tokens;   /**< Declarations, instructions */
254   unsigned                      Processor; /**< TGSI_PROCESSOR_x */
255
256   /* GEOMETRY processor only. */
257   unsigned                      *Primitives;
258   unsigned                       NumOutputs;
259   unsigned                       MaxGeometryShaderOutputs;
260
261   /* FRAGMENT processor only. */
262   const struct tgsi_interp_coef *InterpCoefs;
263   struct tgsi_exec_vector       QuadPos;
264   float                         Face;    /**< +1 if front facing, -1 if back facing */
265
266   /* Conditional execution masks */
267   uint CondMask;  /**< For IF/ELSE/ENDIF */
268   uint LoopMask;  /**< For BGNLOOP/ENDLOOP */
269   uint ContMask;  /**< For loop CONT statements */
270   uint FuncMask;  /**< For function calls */
271   uint ExecMask;  /**< = CondMask & LoopMask */
272
273   /* Current switch-case state. */
274   struct tgsi_switch_record Switch;
275
276   /* Current break type. */
277   enum tgsi_break_type BreakType;
278
279   /** Condition mask stack (for nested conditionals) */
280   uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
281   int CondStackTop;
282
283   /** Loop mask stack (for nested loops) */
284   uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
285   int LoopStackTop;
286
287   /** Loop label stack */
288   uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
289   int LoopLabelStackTop;
290
291   /** Loop continue mask stack (see comments in tgsi_exec.c) */
292   uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
293   int ContStackTop;
294
295   /** Switch case stack */
296   struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
297   int SwitchStackTop;
298
299   enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
300   int BreakStackTop;
301
302   /** Function execution mask stack (for executing subroutine code) */
303   uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
304   int FuncStackTop;
305
306   /** Function call stack for saving/restoring the program counter */
307   struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
308   int CallStackTop;
309
310   struct tgsi_full_instruction *Instructions;
311   uint NumInstructions;
312
313   struct tgsi_full_declaration *Declarations;
314   uint NumDeclarations;
315
316   struct tgsi_declaration_resource Resources[PIPE_MAX_SHADER_RESOURCES];
317
318   boolean UsedGeometryShader;
319};
320
321struct tgsi_exec_machine *
322tgsi_exec_machine_create( void );
323
324void
325tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
326
327
328void
329tgsi_exec_machine_bind_shader(
330   struct tgsi_exec_machine *mach,
331   const struct tgsi_token *tokens,
332   uint numSamplers,
333   struct tgsi_sampler **samplers);
334
335uint
336tgsi_exec_machine_run(
337   struct tgsi_exec_machine *mach );
338
339
340void
341tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
342
343
344boolean
345tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
346
347
348static INLINE void
349tgsi_set_kill_mask(struct tgsi_exec_machine *mach, unsigned mask)
350{
351   mach->Temps[TGSI_EXEC_TEMP_KILMASK_I].xyzw[TGSI_EXEC_TEMP_KILMASK_C].u[0] =
352      mask;
353}
354
355
356/** Set execution mask values prior to executing the shader */
357static INLINE void
358tgsi_set_exec_mask(struct tgsi_exec_machine *mach,
359                   boolean ch0, boolean ch1, boolean ch2, boolean ch3)
360{
361   int *mask = mach->Temps[TGSI_EXEC_MASK_I].xyzw[TGSI_EXEC_MASK_C].i;
362   mask[0] = ch0 ? ~0 : 0;
363   mask[1] = ch1 ? ~0 : 0;
364   mask[2] = ch2 ? ~0 : 0;
365   mask[3] = ch3 ? ~0 : 0;
366}
367
368
369extern void
370tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
371                               unsigned num_bufs,
372                               const void **bufs,
373                               const unsigned *buf_sizes);
374
375
376static INLINE int
377tgsi_exec_get_shader_param(enum pipe_shader_cap param)
378{
379   switch(param) {
380   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
381   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
382   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
383   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
384      return INT_MAX;
385   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
386      return TGSI_EXEC_MAX_NESTING;
387   case PIPE_SHADER_CAP_MAX_INPUTS:
388      return TGSI_EXEC_MAX_INPUT_ATTRIBS;
389   case PIPE_SHADER_CAP_MAX_CONSTS:
390      return TGSI_EXEC_MAX_CONST_BUFFER;
391   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
392      return PIPE_MAX_CONSTANT_BUFFERS;
393   case PIPE_SHADER_CAP_MAX_TEMPS:
394      return TGSI_EXEC_NUM_TEMPS;
395   case PIPE_SHADER_CAP_MAX_ADDRS:
396      return TGSI_EXEC_NUM_ADDRS;
397   case PIPE_SHADER_CAP_MAX_PREDS:
398      return TGSI_EXEC_NUM_PREDS;
399   case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
400      return 1;
401   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
402   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
403   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
404   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
405      return 1;
406   case PIPE_SHADER_CAP_SUBROUTINES:
407      return 1;
408   case PIPE_SHADER_CAP_INTEGERS:
409      return 1;
410   default:
411      return 0;
412   }
413}
414
415#if defined __cplusplus
416} /* extern "C" */
417#endif
418
419#endif /* TGSI_EXEC_H */
420