r300_screen.c revision 2154c672b3f2a0f3de7aaacd9260954b9310262a
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "util/u_format.h" 25#include "util/u_format_s3tc.h" 26#include "util/u_memory.h" 27#include "os/os_time.h" 28#include "vl/vl_decoder.h" 29#include "vl/vl_video_buffer.h" 30 31#include "r300_context.h" 32#include "r300_texture.h" 33#include "r300_screen_buffer.h" 34#include "r300_state_inlines.h" 35#include "r300_public.h" 36 37#include "draw/draw_context.h" 38 39/* Return the identifier behind whom the brave coders responsible for this 40 * amalgamation of code, sweat, and duct tape, routinely obscure their names. 41 * 42 * ...I should have just put "Corbin Simpson", but I'm not that cool. 43 * 44 * (Or egotistical. Yet.) */ 45static const char* r300_get_vendor(struct pipe_screen* pscreen) 46{ 47 return "X.Org R300 Project"; 48} 49 50static const char* chip_families[] = { 51 "ATI R300", 52 "ATI R350", 53 "ATI RV350", 54 "ATI RV370", 55 "ATI RV380", 56 "ATI RS400", 57 "ATI RC410", 58 "ATI RS480", 59 "ATI R420", 60 "ATI R423", 61 "ATI R430", 62 "ATI R480", 63 "ATI R481", 64 "ATI RV410", 65 "ATI RS600", 66 "ATI RS690", 67 "ATI RS740", 68 "ATI RV515", 69 "ATI R520", 70 "ATI RV530", 71 "ATI R580", 72 "ATI RV560", 73 "ATI RV570" 74}; 75 76static const char* r300_get_name(struct pipe_screen* pscreen) 77{ 78 struct r300_screen* r300screen = r300_screen(pscreen); 79 80 return chip_families[r300screen->caps.family]; 81} 82 83static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) 84{ 85 struct r300_screen* r300screen = r300_screen(pscreen); 86 boolean is_r500 = r300screen->caps.is_r500; 87 88 switch (param) { 89 /* Supported features (boolean caps). */ 90 case PIPE_CAP_NPOT_TEXTURES: 91 case PIPE_CAP_TWO_SIDED_STENCIL: 92 case PIPE_CAP_GLSL: 93 /* I'll be frank. This is a lie. 94 * 95 * We don't truly support GLSL on any of this driver's chipsets. 96 * To be fair, no chipset supports the full GLSL specification 97 * to the best of our knowledge, but some of the less esoteric 98 * features are still missing here. 99 * 100 * Rather than cripple ourselves intentionally, I'm going to set 101 * this flag, and as Gallium's interface continues to change, I 102 * hope that this single monolithic GLSL enable can slowly get 103 * split down into many different pieces and the state tracker 104 * will handle fallbacks transparently, like it should. 105 * 106 * ~ C. 107 */ 108 case PIPE_CAP_ANISOTROPIC_FILTER: 109 case PIPE_CAP_POINT_SPRITE: 110 case PIPE_CAP_OCCLUSION_QUERY: 111 case PIPE_CAP_TEXTURE_SHADOW_MAP: 112 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 113 case PIPE_CAP_TEXTURE_MIRROR_REPEAT: 114 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 115 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: 116 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 118 return 1; 119 120 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */ 121 case PIPE_CAP_TEXTURE_SWIZZLE: 122 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1; 123 124 /* Supported on r500 only. */ 125 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL: 126 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: 127 case PIPE_CAP_SM3: 128 return is_r500 ? 1 : 0; 129 130 /* Unsupported features. */ 131 case PIPE_CAP_TIMER_QUERY: 132 case PIPE_CAP_DUAL_SOURCE_BLEND: 133 case PIPE_CAP_INDEP_BLEND_ENABLE: 134 case PIPE_CAP_INDEP_BLEND_FUNC: 135 case PIPE_CAP_DEPTH_CLAMP: 136 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: 137 case PIPE_CAP_SHADER_STENCIL_EXPORT: 138 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: 139 case PIPE_CAP_TGSI_INSTANCEID: 140 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 141 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 142 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: 143 case PIPE_CAP_SEAMLESS_CUBE_MAP: 144 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: 145 case PIPE_CAP_SCALED_RESOLVE: 146 case PIPE_CAP_MIN_TEXEL_OFFSET: 147 case PIPE_CAP_MAX_TEXEL_OFFSET: 148 return 0; 149 150 /* SWTCL-only features. */ 151 case PIPE_CAP_STREAM_OUTPUT: 152 case PIPE_CAP_PRIMITIVE_RESTART: 153 return !r300screen->caps.has_tcl; 154 155 /* Texturing. */ 156 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: 157 case PIPE_CAP_MAX_COMBINED_SAMPLERS: 158 return r300screen->caps.num_tex_units; 159 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 160 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 161 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 162 /* 13 == 4096, 12 == 2048 */ 163 return is_r500 ? 13 : 12; 164 165 /* Render targets. */ 166 case PIPE_CAP_MAX_RENDER_TARGETS: 167 return 4; 168 169 default: 170 debug_printf("r300: Warning: Unknown CAP %d in get_param.\n", 171 param); 172 return 0; 173 } 174} 175 176static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param) 177{ 178 struct r300_screen* r300screen = r300_screen(pscreen); 179 boolean is_r400 = r300screen->caps.is_r400; 180 boolean is_r500 = r300screen->caps.is_r500; 181 182 switch (shader) 183 { 184 case PIPE_SHADER_FRAGMENT: 185 switch (param) 186 { 187 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 188 return is_r500 || is_r400 ? 512 : 96; 189 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 190 return is_r500 || is_r400 ? 512 : 64; 191 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 192 return is_r500 || is_r400 ? 512 : 32; 193 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 194 return is_r500 ? 511 : 4; 195 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 196 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */ 197 /* Fragment shader limits. */ 198 case PIPE_SHADER_CAP_MAX_INPUTS: 199 /* 2 colors + 8 texcoords are always supported 200 * (minus fog and wpos). 201 * 202 * R500 has the ability to turn 3rd and 4th color into 203 * additional texcoords but there is no two-sided color 204 * selection then. However the facing bit can be used instead. */ 205 return 10; 206 case PIPE_SHADER_CAP_MAX_CONSTS: 207 return is_r500 ? 256 : 32; 208 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 209 return 1; 210 case PIPE_SHADER_CAP_MAX_TEMPS: 211 return is_r500 ? 128 : is_r400 ? 64 : 32; 212 case PIPE_SHADER_CAP_MAX_ADDRS: 213 return 0; 214 case PIPE_SHADER_CAP_MAX_PREDS: 215 return is_r500 ? 1 : 0; 216 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 217 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 218 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 219 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 220 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 221 case PIPE_SHADER_CAP_SUBROUTINES: 222 case PIPE_SHADER_CAP_INTEGERS: 223 return 0; 224 } 225 break; 226 case PIPE_SHADER_VERTEX: 227 if (!r300screen->caps.has_tcl) { 228 return draw_get_shader_param(shader, param); 229 } 230 231 switch (param) 232 { 233 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 234 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 235 return is_r500 ? 1024 : 256; 236 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 237 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 238 return 0; 239 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 240 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */ 241 case PIPE_SHADER_CAP_MAX_INPUTS: 242 return 16; 243 case PIPE_SHADER_CAP_MAX_CONSTS: 244 return 256; 245 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 246 return 1; 247 case PIPE_SHADER_CAP_MAX_TEMPS: 248 return 32; 249 case PIPE_SHADER_CAP_MAX_ADDRS: 250 return 1; /* XXX guessed */ 251 case PIPE_SHADER_CAP_MAX_PREDS: 252 return is_r500 ? 4 : 0; /* XXX guessed. */ 253 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 254 return 1; 255 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 256 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 257 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 258 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 259 case PIPE_SHADER_CAP_SUBROUTINES: 260 case PIPE_SHADER_CAP_INTEGERS: 261 return 0; 262 } 263 break; 264 default: 265 break; 266 } 267 return 0; 268} 269 270static float r300_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param) 271{ 272 struct r300_screen* r300screen = r300_screen(pscreen); 273 274 switch (param) { 275 case PIPE_CAP_MAX_LINE_WIDTH: 276 case PIPE_CAP_MAX_LINE_WIDTH_AA: 277 case PIPE_CAP_MAX_POINT_WIDTH: 278 case PIPE_CAP_MAX_POINT_WIDTH_AA: 279 /* The maximum dimensions of the colorbuffer are our practical 280 * rendering limits. 2048 pixels should be enough for anybody. */ 281 if (r300screen->caps.is_r500) { 282 return 4096.0f; 283 } else if (r300screen->caps.is_r400) { 284 return 4021.0f; 285 } else { 286 return 2560.0f; 287 } 288 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: 289 return 16.0f; 290 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: 291 return 16.0f; 292 case PIPE_CAP_GUARD_BAND_LEFT: 293 case PIPE_CAP_GUARD_BAND_TOP: 294 case PIPE_CAP_GUARD_BAND_RIGHT: 295 case PIPE_CAP_GUARD_BAND_BOTTOM: 296 /* XXX I don't know what these should be but the least we can do is 297 * silence the potential error message */ 298 return 0.0f; 299 default: 300 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n", 301 param); 302 return 0.0f; 303 } 304} 305 306static int r300_get_video_param(struct pipe_screen *screen, 307 enum pipe_video_profile profile, 308 enum pipe_video_cap param) 309{ 310 switch (param) { 311 case PIPE_VIDEO_CAP_SUPPORTED: 312 return vl_profile_supported(screen, profile); 313 case PIPE_VIDEO_CAP_NPOT_TEXTURES: 314 return 0; 315 case PIPE_VIDEO_CAP_MAX_WIDTH: 316 case PIPE_VIDEO_CAP_MAX_HEIGHT: 317 return vl_video_buffer_max_size(screen); 318 case PIPE_VIDEO_CAP_NUM_BUFFERS_DESIRED: 319 return vl_num_buffers_desired(screen, profile); 320 default: 321 return 0; 322 } 323} 324 325static boolean r300_is_format_supported(struct pipe_screen* screen, 326 enum pipe_format format, 327 enum pipe_texture_target target, 328 unsigned sample_count, 329 unsigned usage) 330{ 331 uint32_t retval = 0; 332 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8; 333 boolean is_r500 = r300_screen(screen)->caps.is_r500; 334 boolean is_r400 = r300_screen(screen)->caps.is_r400; 335 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || 336 format == PIPE_FORMAT_R10G10B10X2_SNORM || 337 format == PIPE_FORMAT_B10G10R10A2_UNORM || 338 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM; 339 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM || 340 format == PIPE_FORMAT_RGTC1_SNORM || 341 format == PIPE_FORMAT_LATC1_UNORM || 342 format == PIPE_FORMAT_LATC1_SNORM; 343 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM || 344 format == PIPE_FORMAT_RGTC2_SNORM || 345 format == PIPE_FORMAT_LATC2_UNORM || 346 format == PIPE_FORMAT_LATC2_SNORM; 347 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT || 348 format == PIPE_FORMAT_R16G16_FLOAT || 349 format == PIPE_FORMAT_A16_FLOAT || 350 format == PIPE_FORMAT_L16_FLOAT || 351 format == PIPE_FORMAT_L16A16_FLOAT || 352 format == PIPE_FORMAT_I16_FLOAT; 353 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT || 354 format == PIPE_FORMAT_R16G16_FLOAT || 355 format == PIPE_FORMAT_R16G16B16_FLOAT || 356 format == PIPE_FORMAT_R16G16B16A16_FLOAT; 357 358 if (!util_format_is_supported(format, usage)) 359 return FALSE; 360 361 /* Check multisampling support. */ 362 switch (sample_count) { 363 case 0: 364 case 1: 365 break; 366 case 2: 367 case 3: 368 case 4: 369 case 6: 370 return FALSE; 371#if 0 372 if (usage != PIPE_BIND_RENDER_TARGET || 373 !util_format_is_rgba8_variant( 374 util_format_description(format))) { 375 return FALSE; 376 } 377#endif 378 break; 379 default: 380 return FALSE; 381 } 382 383 /* Check sampler format support. */ 384 if ((usage & PIPE_BIND_SAMPLER_VIEW) && 385 /* ATI1N is r5xx-only. */ 386 (is_r500 || !is_ati1n) && 387 /* ATI2N is supported on r4xx-r5xx. */ 388 (is_r400 || is_r500 || !is_ati2n) && 389 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */ 390 (drm_2_8_0 || !is_x16f_xy16f) && 391 r300_is_sampler_format_supported(format)) { 392 retval |= PIPE_BIND_SAMPLER_VIEW; 393 } 394 395 /* Check colorbuffer format support. */ 396 if ((usage & (PIPE_BIND_RENDER_TARGET | 397 PIPE_BIND_DISPLAY_TARGET | 398 PIPE_BIND_SCANOUT | 399 PIPE_BIND_SHARED)) && 400 /* 2101010 cannot be rendered to on non-r5xx. */ 401 (!is_color2101010 || (is_r500 && drm_2_8_0)) && 402 r300_is_colorbuffer_format_supported(format)) { 403 retval |= usage & 404 (PIPE_BIND_RENDER_TARGET | 405 PIPE_BIND_DISPLAY_TARGET | 406 PIPE_BIND_SCANOUT | 407 PIPE_BIND_SHARED); 408 } 409 410 /* Check depth-stencil format support. */ 411 if (usage & PIPE_BIND_DEPTH_STENCIL && 412 r300_is_zs_format_supported(format)) { 413 retval |= PIPE_BIND_DEPTH_STENCIL; 414 } 415 416 /* Check vertex buffer format support. */ 417 if (usage & PIPE_BIND_VERTEX_BUFFER && 418 /* Half float is supported on >= RV350. */ 419 (is_r400 || is_r500 || !is_half_float) && 420 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) { 421 retval |= PIPE_BIND_VERTEX_BUFFER; 422 } 423 424 /* Transfers are always supported. */ 425 if (usage & PIPE_BIND_TRANSFER_READ) 426 retval |= PIPE_BIND_TRANSFER_READ; 427 if (usage & PIPE_BIND_TRANSFER_WRITE) 428 retval |= PIPE_BIND_TRANSFER_WRITE; 429 430 return retval == usage; 431} 432 433static void r300_destroy_screen(struct pipe_screen* pscreen) 434{ 435 struct r300_screen* r300screen = r300_screen(pscreen); 436 struct radeon_winsys *rws = radeon_winsys(pscreen); 437 438 util_slab_destroy(&r300screen->pool_buffers); 439 pipe_mutex_destroy(r300screen->num_contexts_mutex); 440 441 if (rws) 442 rws->destroy(rws); 443 444 FREE(r300screen); 445} 446 447static void r300_fence_reference(struct pipe_screen *screen, 448 struct pipe_fence_handle **ptr, 449 struct pipe_fence_handle *fence) 450{ 451 pb_reference((struct pb_buffer**)ptr, 452 (struct pb_buffer*)fence); 453} 454 455static boolean r300_fence_signalled(struct pipe_screen *screen, 456 struct pipe_fence_handle *fence) 457{ 458 struct radeon_winsys *rws = r300_screen(screen)->rws; 459 struct pb_buffer *rfence = (struct pb_buffer*)fence; 460 461 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE); 462} 463 464static boolean r300_fence_finish(struct pipe_screen *screen, 465 struct pipe_fence_handle *fence, 466 uint64_t timeout) 467{ 468 struct radeon_winsys *rws = r300_screen(screen)->rws; 469 struct pb_buffer *rfence = (struct pb_buffer*)fence; 470 471 if (timeout != PIPE_TIMEOUT_INFINITE) { 472 int64_t start_time = os_time_get(); 473 474 /* Convert to microseconds. */ 475 timeout /= 1000; 476 477 /* Wait in a loop. */ 478 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) { 479 if (os_time_get() - start_time >= timeout) { 480 return FALSE; 481 } 482 os_time_sleep(10); 483 } 484 return TRUE; 485 } 486 487 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE); 488 return TRUE; 489} 490 491struct pipe_screen* r300_screen_create(struct radeon_winsys *rws) 492{ 493 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); 494 495 if (!r300screen) { 496 FREE(r300screen); 497 return NULL; 498 } 499 500 rws->query_info(rws, &r300screen->info); 501 502 r300_init_debug(r300screen); 503 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps); 504 505 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK)) 506 r300screen->caps.zmask_ram = 0; 507 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ)) 508 r300screen->caps.hiz_ram = 0; 509 510 if (r300screen->info.drm_minor < 8) 511 r300screen->caps.has_us_format = FALSE; 512 513 pipe_mutex_init(r300screen->num_contexts_mutex); 514 515 util_slab_create(&r300screen->pool_buffers, 516 sizeof(struct r300_resource), 64, 517 UTIL_SLAB_SINGLETHREADED); 518 519 r300screen->rws = rws; 520 r300screen->screen.winsys = (struct pipe_winsys*)rws; 521 r300screen->screen.destroy = r300_destroy_screen; 522 r300screen->screen.get_name = r300_get_name; 523 r300screen->screen.get_vendor = r300_get_vendor; 524 r300screen->screen.get_param = r300_get_param; 525 r300screen->screen.get_shader_param = r300_get_shader_param; 526 r300screen->screen.get_paramf = r300_get_paramf; 527 r300screen->screen.get_video_param = r300_get_video_param; 528 r300screen->screen.is_format_supported = r300_is_format_supported; 529 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported; 530 r300screen->screen.context_create = r300_create_context; 531 r300screen->screen.fence_reference = r300_fence_reference; 532 r300screen->screen.fence_signalled = r300_fence_signalled; 533 r300screen->screen.fence_finish = r300_fence_finish; 534 535 r300_init_screen_resource_functions(r300screen); 536 537 util_format_s3tc_init(); 538 539 return &r300screen->screen; 540} 541