r300_screen.c revision 406563931068a63d5207fc9962de1638e0da4b81
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "util/u_format.h" 25#include "util/u_format_s3tc.h" 26#include "util/u_memory.h" 27#include "os/os_time.h" 28#include "vl/vl_decoder.h" 29#include "vl/vl_video_buffer.h" 30 31#include "r300_context.h" 32#include "r300_texture.h" 33#include "r300_screen_buffer.h" 34#include "r300_state_inlines.h" 35#include "r300_public.h" 36 37#include "draw/draw_context.h" 38 39/* Return the identifier behind whom the brave coders responsible for this 40 * amalgamation of code, sweat, and duct tape, routinely obscure their names. 41 * 42 * ...I should have just put "Corbin Simpson", but I'm not that cool. 43 * 44 * (Or egotistical. Yet.) */ 45static const char* r300_get_vendor(struct pipe_screen* pscreen) 46{ 47 return "X.Org R300 Project"; 48} 49 50static const char* chip_families[] = { 51 "ATI R300", 52 "ATI R350", 53 "ATI RV350", 54 "ATI RV370", 55 "ATI RV380", 56 "ATI RS400", 57 "ATI RC410", 58 "ATI RS480", 59 "ATI R420", 60 "ATI R423", 61 "ATI R430", 62 "ATI R480", 63 "ATI R481", 64 "ATI RV410", 65 "ATI RS600", 66 "ATI RS690", 67 "ATI RS740", 68 "ATI RV515", 69 "ATI R520", 70 "ATI RV530", 71 "ATI R580", 72 "ATI RV560", 73 "ATI RV570" 74}; 75 76static const char* r300_get_name(struct pipe_screen* pscreen) 77{ 78 struct r300_screen* r300screen = r300_screen(pscreen); 79 80 return chip_families[r300screen->caps.family]; 81} 82 83static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) 84{ 85 struct r300_screen* r300screen = r300_screen(pscreen); 86 boolean is_r500 = r300screen->caps.is_r500; 87 88 switch (param) { 89 /* Supported features (boolean caps). */ 90 case PIPE_CAP_NPOT_TEXTURES: 91 case PIPE_CAP_TWO_SIDED_STENCIL: 92 case PIPE_CAP_ANISOTROPIC_FILTER: 93 case PIPE_CAP_POINT_SPRITE: 94 case PIPE_CAP_OCCLUSION_QUERY: 95 case PIPE_CAP_TEXTURE_SHADOW_MAP: 96 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 97 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 98 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: 99 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 100 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 101 case PIPE_CAP_CONDITIONAL_RENDER: 102 case PIPE_CAP_TEXTURE_BARRIER: 103 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS: 104 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: 105 case PIPE_CAP_VERTEX_COLOR_CLAMPED: 106 case PIPE_CAP_USER_INDEX_BUFFERS: 107 case PIPE_CAP_USER_CONSTANT_BUFFERS: 108 return 1; 109 110 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: 111 return 16; 112 113 case PIPE_CAP_GLSL_FEATURE_LEVEL: 114 return 120; 115 116 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */ 117 case PIPE_CAP_TEXTURE_SWIZZLE: 118 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1; 119 120 /* Supported on r500 only. */ 121 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: 122 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: 123 case PIPE_CAP_SM3: 124 return is_r500 ? 1 : 0; 125 126 /* Unsupported features. */ 127 case PIPE_CAP_TIMER_QUERY: 128 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: 129 case PIPE_CAP_INDEP_BLEND_ENABLE: 130 case PIPE_CAP_INDEP_BLEND_FUNC: 131 case PIPE_CAP_DEPTH_CLIP_DISABLE: 132 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: 133 case PIPE_CAP_SHADER_STENCIL_EXPORT: 134 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: 135 case PIPE_CAP_TGSI_INSTANCEID: 136 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 137 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 138 case PIPE_CAP_SEAMLESS_CUBE_MAP: 139 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: 140 case PIPE_CAP_SCALED_RESOLVE: 141 case PIPE_CAP_MIN_TEXEL_OFFSET: 142 case PIPE_CAP_MAX_TEXEL_OFFSET: 143 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: 144 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: 145 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: 146 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: 147 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: 148 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: 149 case PIPE_CAP_COMPUTE: 150 return 0; 151 152 /* SWTCL-only features. */ 153 case PIPE_CAP_PRIMITIVE_RESTART: 154 case PIPE_CAP_USER_VERTEX_BUFFERS: 155 return !r300screen->caps.has_tcl; 156 157 /* HWTCL-only features / limitations. */ 158 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: 159 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: 160 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: 161 return r300screen->caps.has_tcl; 162 163 /* Texturing. */ 164 case PIPE_CAP_MAX_COMBINED_SAMPLERS: 165 return r300screen->caps.num_tex_units; 166 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 167 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 168 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 169 /* 13 == 4096, 12 == 2048 */ 170 return is_r500 ? 13 : 12; 171 172 /* Render targets. */ 173 case PIPE_CAP_MAX_RENDER_TARGETS: 174 return 4; 175 } 176 return 0; 177} 178 179static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, enum pipe_shader_cap param) 180{ 181 struct r300_screen* r300screen = r300_screen(pscreen); 182 boolean is_r400 = r300screen->caps.is_r400; 183 boolean is_r500 = r300screen->caps.is_r500; 184 185 switch (shader) { 186 case PIPE_SHADER_FRAGMENT: 187 switch (param) 188 { 189 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 190 return is_r500 || is_r400 ? 512 : 96; 191 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 192 return is_r500 || is_r400 ? 512 : 64; 193 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 194 return is_r500 || is_r400 ? 512 : 32; 195 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 196 return is_r500 ? 511 : 4; 197 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 198 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */ 199 /* Fragment shader limits. */ 200 case PIPE_SHADER_CAP_MAX_INPUTS: 201 /* 2 colors + 8 texcoords are always supported 202 * (minus fog and wpos). 203 * 204 * R500 has the ability to turn 3rd and 4th color into 205 * additional texcoords but there is no two-sided color 206 * selection then. However the facing bit can be used instead. */ 207 return 10; 208 case PIPE_SHADER_CAP_MAX_CONSTS: 209 return is_r500 ? 256 : 32; 210 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 211 return 1; 212 case PIPE_SHADER_CAP_MAX_TEMPS: 213 return is_r500 ? 128 : is_r400 ? 64 : 32; 214 case PIPE_SHADER_CAP_MAX_PREDS: 215 return is_r500 ? 1 : 0; 216 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 217 return r300screen->caps.num_tex_units; 218 case PIPE_SHADER_CAP_MAX_ADDRS: 219 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 220 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 221 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 222 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 223 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 224 case PIPE_SHADER_CAP_SUBROUTINES: 225 case PIPE_SHADER_CAP_INTEGERS: 226 return 0; 227 case PIPE_SHADER_CAP_PREFERRED_IR: 228 return PIPE_SHADER_IR_TGSI; 229 } 230 break; 231 case PIPE_SHADER_VERTEX: 232 switch (param) 233 { 234 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 235 case PIPE_SHADER_CAP_SUBROUTINES: 236 return 0; 237 default:; 238 } 239 240 if (!r300screen->caps.has_tcl) { 241 return draw_get_shader_param(shader, param); 242 } 243 244 switch (param) 245 { 246 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 247 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 248 return is_r500 ? 1024 : 256; 249 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 250 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */ 251 case PIPE_SHADER_CAP_MAX_INPUTS: 252 return 16; 253 case PIPE_SHADER_CAP_MAX_CONSTS: 254 return 256; 255 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 256 return 1; 257 case PIPE_SHADER_CAP_MAX_TEMPS: 258 return 32; 259 case PIPE_SHADER_CAP_MAX_ADDRS: 260 return 1; /* XXX guessed */ 261 case PIPE_SHADER_CAP_MAX_PREDS: 262 return is_r500 ? 4 : 0; /* XXX guessed. */ 263 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 264 return 1; 265 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 266 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 267 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 268 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 269 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 270 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 271 case PIPE_SHADER_CAP_SUBROUTINES: 272 case PIPE_SHADER_CAP_INTEGERS: 273 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 274 return 0; 275 case PIPE_SHADER_CAP_PREFERRED_IR: 276 return PIPE_SHADER_IR_TGSI; 277 } 278 break; 279 } 280 return 0; 281} 282 283static float r300_get_paramf(struct pipe_screen* pscreen, 284 enum pipe_capf param) 285{ 286 struct r300_screen* r300screen = r300_screen(pscreen); 287 288 switch (param) { 289 case PIPE_CAPF_MAX_LINE_WIDTH: 290 case PIPE_CAPF_MAX_LINE_WIDTH_AA: 291 case PIPE_CAPF_MAX_POINT_WIDTH: 292 case PIPE_CAPF_MAX_POINT_WIDTH_AA: 293 /* The maximum dimensions of the colorbuffer are our practical 294 * rendering limits. 2048 pixels should be enough for anybody. */ 295 if (r300screen->caps.is_r500) { 296 return 4096.0f; 297 } else if (r300screen->caps.is_r400) { 298 return 4021.0f; 299 } else { 300 return 2560.0f; 301 } 302 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: 303 return 16.0f; 304 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: 305 return 16.0f; 306 case PIPE_CAPF_GUARD_BAND_LEFT: 307 case PIPE_CAPF_GUARD_BAND_TOP: 308 case PIPE_CAPF_GUARD_BAND_RIGHT: 309 case PIPE_CAPF_GUARD_BAND_BOTTOM: 310 /* XXX I don't know what these should be but the least we can do is 311 * silence the potential error message */ 312 return 0.0f; 313 default: 314 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n", 315 param); 316 return 0.0f; 317 } 318} 319 320static int r300_get_video_param(struct pipe_screen *screen, 321 enum pipe_video_profile profile, 322 enum pipe_video_cap param) 323{ 324 switch (param) { 325 case PIPE_VIDEO_CAP_SUPPORTED: 326 return vl_profile_supported(screen, profile); 327 case PIPE_VIDEO_CAP_NPOT_TEXTURES: 328 return 0; 329 case PIPE_VIDEO_CAP_MAX_WIDTH: 330 case PIPE_VIDEO_CAP_MAX_HEIGHT: 331 return vl_video_buffer_max_size(screen); 332 case PIPE_VIDEO_CAP_PREFERED_FORMAT: 333 return PIPE_FORMAT_NV12; 334 case PIPE_VIDEO_CAP_PREFERS_INTERLACED: 335 return false; 336 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: 337 return false; 338 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE: 339 return true; 340 default: 341 return 0; 342 } 343} 344 345static boolean r300_is_format_supported(struct pipe_screen* screen, 346 enum pipe_format format, 347 enum pipe_texture_target target, 348 unsigned sample_count, 349 unsigned usage) 350{ 351 uint32_t retval = 0; 352 boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8; 353 boolean is_r500 = r300_screen(screen)->caps.is_r500; 354 boolean is_r400 = r300_screen(screen)->caps.is_r400; 355 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || 356 format == PIPE_FORMAT_R10G10B10X2_SNORM || 357 format == PIPE_FORMAT_B10G10R10A2_UNORM || 358 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM; 359 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM || 360 format == PIPE_FORMAT_RGTC1_SNORM || 361 format == PIPE_FORMAT_LATC1_UNORM || 362 format == PIPE_FORMAT_LATC1_SNORM; 363 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM || 364 format == PIPE_FORMAT_RGTC2_SNORM || 365 format == PIPE_FORMAT_LATC2_UNORM || 366 format == PIPE_FORMAT_LATC2_SNORM; 367 boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT || 368 format == PIPE_FORMAT_R16G16_FLOAT || 369 format == PIPE_FORMAT_A16_FLOAT || 370 format == PIPE_FORMAT_L16_FLOAT || 371 format == PIPE_FORMAT_L16A16_FLOAT || 372 format == PIPE_FORMAT_I16_FLOAT; 373 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT || 374 format == PIPE_FORMAT_R16G16_FLOAT || 375 format == PIPE_FORMAT_R16G16B16_FLOAT || 376 format == PIPE_FORMAT_R16G16B16A16_FLOAT; 377 378 if (!util_format_is_supported(format, usage)) 379 return FALSE; 380 381 /* Check multisampling support. */ 382 switch (sample_count) { 383 case 0: 384 case 1: 385 break; 386 case 2: 387 case 3: 388 case 4: 389 case 6: 390 return FALSE; 391#if 0 392 if (usage != PIPE_BIND_RENDER_TARGET || 393 !util_format_is_rgba8_variant( 394 util_format_description(format))) { 395 return FALSE; 396 } 397#endif 398 break; 399 default: 400 return FALSE; 401 } 402 403 /* Check sampler format support. */ 404 if ((usage & PIPE_BIND_SAMPLER_VIEW) && 405 /* ATI1N is r5xx-only. */ 406 (is_r500 || !is_ati1n) && 407 /* ATI2N is supported on r4xx-r5xx. */ 408 (is_r400 || is_r500 || !is_ati2n) && 409 /* R16F and RG16F texture support was added in as late as DRM 2.8.0 */ 410 (drm_2_8_0 || !is_x16f_xy16f) && 411 r300_is_sampler_format_supported(format)) { 412 retval |= PIPE_BIND_SAMPLER_VIEW; 413 } 414 415 /* Check colorbuffer format support. */ 416 if ((usage & (PIPE_BIND_RENDER_TARGET | 417 PIPE_BIND_DISPLAY_TARGET | 418 PIPE_BIND_SCANOUT | 419 PIPE_BIND_SHARED)) && 420 /* 2101010 cannot be rendered to on non-r5xx. */ 421 (!is_color2101010 || (is_r500 && drm_2_8_0)) && 422 r300_is_colorbuffer_format_supported(format)) { 423 retval |= usage & 424 (PIPE_BIND_RENDER_TARGET | 425 PIPE_BIND_DISPLAY_TARGET | 426 PIPE_BIND_SCANOUT | 427 PIPE_BIND_SHARED); 428 } 429 430 /* Check depth-stencil format support. */ 431 if (usage & PIPE_BIND_DEPTH_STENCIL && 432 r300_is_zs_format_supported(format)) { 433 retval |= PIPE_BIND_DEPTH_STENCIL; 434 } 435 436 /* Check vertex buffer format support. */ 437 if (usage & PIPE_BIND_VERTEX_BUFFER) { 438 if (r300_screen(screen)->caps.has_tcl) { 439 /* Half float is supported on >= R400. */ 440 if ((is_r400 || is_r500 || !is_half_float) && 441 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) { 442 retval |= PIPE_BIND_VERTEX_BUFFER; 443 } 444 } else { 445 /* SW TCL */ 446 if (!util_format_is_pure_integer(format)) { 447 retval |= PIPE_BIND_VERTEX_BUFFER; 448 } 449 } 450 } 451 452 /* Transfers are always supported. */ 453 if (usage & PIPE_BIND_TRANSFER_READ) 454 retval |= PIPE_BIND_TRANSFER_READ; 455 if (usage & PIPE_BIND_TRANSFER_WRITE) 456 retval |= PIPE_BIND_TRANSFER_WRITE; 457 458 return retval == usage; 459} 460 461static void r300_destroy_screen(struct pipe_screen* pscreen) 462{ 463 struct r300_screen* r300screen = r300_screen(pscreen); 464 struct radeon_winsys *rws = radeon_winsys(pscreen); 465 466 if (rws) 467 rws->destroy(rws); 468 469 FREE(r300screen); 470} 471 472static void r300_fence_reference(struct pipe_screen *screen, 473 struct pipe_fence_handle **ptr, 474 struct pipe_fence_handle *fence) 475{ 476 pb_reference((struct pb_buffer**)ptr, 477 (struct pb_buffer*)fence); 478} 479 480static boolean r300_fence_signalled(struct pipe_screen *screen, 481 struct pipe_fence_handle *fence) 482{ 483 struct radeon_winsys *rws = r300_screen(screen)->rws; 484 struct pb_buffer *rfence = (struct pb_buffer*)fence; 485 486 return !rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE); 487} 488 489static boolean r300_fence_finish(struct pipe_screen *screen, 490 struct pipe_fence_handle *fence, 491 uint64_t timeout) 492{ 493 struct radeon_winsys *rws = r300_screen(screen)->rws; 494 struct pb_buffer *rfence = (struct pb_buffer*)fence; 495 496 if (timeout != PIPE_TIMEOUT_INFINITE) { 497 int64_t start_time = os_time_get(); 498 499 /* Convert to microseconds. */ 500 timeout /= 1000; 501 502 /* Wait in a loop. */ 503 while (rws->buffer_is_busy(rfence, RADEON_USAGE_READWRITE)) { 504 if (os_time_get() - start_time >= timeout) { 505 return FALSE; 506 } 507 os_time_sleep(10); 508 } 509 return TRUE; 510 } 511 512 rws->buffer_wait(rfence, RADEON_USAGE_READWRITE); 513 return TRUE; 514} 515 516struct pipe_screen* r300_screen_create(struct radeon_winsys *rws) 517{ 518 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); 519 520 if (!r300screen) { 521 FREE(r300screen); 522 return NULL; 523 } 524 525 rws->query_info(rws, &r300screen->info); 526 527 r300_init_debug(r300screen); 528 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps); 529 530 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK)) 531 r300screen->caps.zmask_ram = 0; 532 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ)) 533 r300screen->caps.hiz_ram = 0; 534 535 if (r300screen->info.drm_minor < 8) 536 r300screen->caps.has_us_format = FALSE; 537 538 r300screen->rws = rws; 539 r300screen->screen.destroy = r300_destroy_screen; 540 r300screen->screen.get_name = r300_get_name; 541 r300screen->screen.get_vendor = r300_get_vendor; 542 r300screen->screen.get_param = r300_get_param; 543 r300screen->screen.get_shader_param = r300_get_shader_param; 544 r300screen->screen.get_paramf = r300_get_paramf; 545 r300screen->screen.get_video_param = r300_get_video_param; 546 r300screen->screen.is_format_supported = r300_is_format_supported; 547 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported; 548 r300screen->screen.context_create = r300_create_context; 549 r300screen->screen.fence_reference = r300_fence_reference; 550 r300screen->screen.fence_signalled = r300_fence_signalled; 551 r300screen->screen.fence_finish = r300_fence_finish; 552 553 r300_init_screen_resource_functions(r300screen); 554 555 util_format_s3tc_init(); 556 557 return &r300screen->screen; 558} 559