1f903da7335433ae243cf7ff59662be1a03ee9a14Tom Stellard//===-- AMDGPUISelLowering.h - AMDGPU Lowering Interface --------*- C++ -*-===// 2a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 3a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// The LLVM Compiler Infrastructure 4a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 5a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// This file is distributed under the University of Illinois Open Source 6a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// License. See LICENSE.TXT for details. 7a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 8a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard//===----------------------------------------------------------------------===// 9a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 10f903da7335433ae243cf7ff59662be1a03ee9a14Tom Stellard// This file contains the interface defintiion of the TargetLowering class 11f903da7335433ae243cf7ff59662be1a03ee9a14Tom Stellard// that is common to all AMD GPUs. 12a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 13a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard//===----------------------------------------------------------------------===// 14a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 15a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard#ifndef AMDGPUISELLOWERING_H 16a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard#define AMDGPUISELLOWERING_H 17a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 1827ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard#include "llvm/Target/TargetLowering.h" 19a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 20a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellardnamespace llvm { 21a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 2227ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellardclass MachineRegisterInfo; 2327ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard 2427ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellardclass AMDGPUTargetLowering : public TargetLowering 25a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard{ 26431bb79a41bd5e7402954385daea1594c3e750abTom Stellardprivate: 27431bb79a41bd5e7402954385daea1594c3e750abTom Stellard SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; 2833e7db9a1dafdcf5c7c745180831403e0485544dTom Stellard SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const; 29431bb79a41bd5e7402954385daea1594c3e750abTom Stellard 30a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellardprotected: 31bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard 3240c41fe890e53d99afb4e2c3fbf10043081edd9eTom Stellard /// CreateLiveInRegister - Helper function that adds Reg to the LiveIn list 3340c41fe890e53d99afb4e2c3fbf10043081edd9eTom Stellard /// of the DAG's MachineFunction. This returns a Register SDNode representing 34228a6641ccddaf24a993f827af1e97379785985aTom Stellard /// Reg. 3540c41fe890e53d99afb4e2c3fbf10043081edd9eTom Stellard SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC, 3640c41fe890e53d99afb4e2c3fbf10043081edd9eTom Stellard unsigned Reg, EVT VT) const; 3740c41fe890e53d99afb4e2c3fbf10043081edd9eTom Stellard 385523502ff917803166051c8947f5dd3b23c6fcf8Tom Stellard bool isHWTrueValue(SDValue Op) const; 395523502ff917803166051c8947f5dd3b23c6fcf8Tom Stellard bool isHWFalseValue(SDValue Op) const; 40cee23ab246f22210b3063cdc47bdb45b3d943526Tom Stellard 41a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellardpublic: 42a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard AMDGPUTargetLowering(TargetMachine &TM); 43a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 440ce6e506016222b264163ee718202371f19064dbTom Stellard virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 450ce6e506016222b264163ee718202371f19064dbTom Stellard bool isVarArg, 460ce6e506016222b264163ee718202371f19064dbTom Stellard const SmallVectorImpl<ISD::InputArg> &Ins, 470ce6e506016222b264163ee718202371f19064dbTom Stellard DebugLoc DL, SelectionDAG &DAG, 480ce6e506016222b264163ee718202371f19064dbTom Stellard SmallVectorImpl<SDValue> &InVals) const; 490ce6e506016222b264163ee718202371f19064dbTom Stellard 500ce6e506016222b264163ee718202371f19064dbTom Stellard virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, 510ce6e506016222b264163ee718202371f19064dbTom Stellard bool isVarArg, 520ce6e506016222b264163ee718202371f19064dbTom Stellard const SmallVectorImpl<ISD::OutputArg> &Outs, 530ce6e506016222b264163ee718202371f19064dbTom Stellard const SmallVectorImpl<SDValue> &OutVals, 540ce6e506016222b264163ee718202371f19064dbTom Stellard DebugLoc DL, SelectionDAG &DAG) const; 550ce6e506016222b264163ee718202371f19064dbTom Stellard 56431bb79a41bd5e7402954385daea1594c3e750abTom Stellard virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 579a020092aedc6310d5bfc72b2aa6fc4348fe5c32Tom Stellard SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const; 58c6c8a05c509b30600d2ccb4be635f05cd71c68a4Tom Stellard SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const; 59431bb79a41bd5e7402954385daea1594c3e750abTom Stellard virtual const char* getTargetNodeName(unsigned Opcode) const; 60431bb79a41bd5e7402954385daea1594c3e750abTom Stellard 6127ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard// Functions defined in AMDILISelLowering.cpp 6227ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellardpublic: 6327ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard 6427ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard /// computeMaskedBitsForTargetNode - Determine which of the bits specified 6527ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard /// in Mask are known to be either zero or one and return them in the 6627ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard /// KnownZero/KnownOne bitsets. 6727ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard virtual void computeMaskedBitsForTargetNode(const SDValue Op, 6827ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard APInt &KnownZero, 6927ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard APInt &KnownOne, 7027ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard const SelectionDAG &DAG, 7127ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard unsigned Depth = 0) const; 7227ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard 7327ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info, 7427ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard const CallInst &I, unsigned Intrinsic) const; 7527ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard 7627ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard /// isFPImmLegal - We want to mark f32/f64 floating point values as legal. 7727ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 7827ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard 7927ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard /// ShouldShrinkFPConstant - We don't want to shrink f64/f32 constants. 8027ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard bool ShouldShrinkFPConstant(EVT VT) const; 8127ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard 8227ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellardprivate: 8327ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard void InitAMDILLowering(); 8427ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSREM(SDValue Op, SelectionDAG &DAG) const; 8527ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSREM8(SDValue Op, SelectionDAG &DAG) const; 8627ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSREM16(SDValue Op, SelectionDAG &DAG) const; 8727ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSREM32(SDValue Op, SelectionDAG &DAG) const; 8827ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSREM64(SDValue Op, SelectionDAG &DAG) const; 8927ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSDIV(SDValue Op, SelectionDAG &DAG) const; 9027ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSDIV24(SDValue Op, SelectionDAG &DAG) const; 9127ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSDIV32(SDValue Op, SelectionDAG &DAG) const; 9227ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSDIV64(SDValue Op, SelectionDAG &DAG) const; 9327ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; 9427ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const; 9527ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard EVT genIntType(uint32_t size = 32, uint32_t numEle = 1) const; 9627ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 9727ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const; 98a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard}; 99a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 100431bb79a41bd5e7402954385daea1594c3e750abTom Stellardnamespace AMDGPUISD 101431bb79a41bd5e7402954385daea1594c3e750abTom Stellard{ 102431bb79a41bd5e7402954385daea1594c3e750abTom Stellard 103431bb79a41bd5e7402954385daea1594c3e750abTom Stellardenum 104431bb79a41bd5e7402954385daea1594c3e750abTom Stellard{ 10527ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard // AMDIL ISD Opcodes 10627ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard FIRST_NUMBER = ISD::BUILTIN_OP_END, 10727ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard MAD, // 32bit Fused Multiply Add instruction 10827ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard VBUILD, // scalar to vector mov instruction 10927ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard CALL, // Function call based on a single integer 11027ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard UMUL, // 32bit unsigned multiplication 11127ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard DIV_INF, // Divide with infinity returned on zero divisor 11227ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard RET_FLAG, 11327ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard BRANCH_COND, 11427ae41c83dafcec09e870b3cf08b060064dbb122Tom Stellard // End AMDIL ISD Opcodes 115c53c8d05551083437eb991e79002c0a272541a79Tom Stellard BITALIGN, 116d4984f346320e64b58e38e443e5b99d09b7067bcTom Stellard FRACT, 117431bb79a41bd5e7402954385daea1594c3e750abTom Stellard FMAX, 118431bb79a41bd5e7402954385daea1594c3e750abTom Stellard SMAX, 119431bb79a41bd5e7402954385daea1594c3e750abTom Stellard UMAX, 1207e3cd8df183448e2cc01a8f2645a001b0972f4abTom Stellard FMIN, 1217e3cd8df183448e2cc01a8f2645a001b0972f4abTom Stellard SMIN, 1227e3cd8df183448e2cc01a8f2645a001b0972f4abTom Stellard UMIN, 12333e7db9a1dafdcf5c7c745180831403e0485544dTom Stellard URECIP, 124431bb79a41bd5e7402954385daea1594c3e750abTom Stellard LAST_AMDGPU_ISD_NUMBER 125431bb79a41bd5e7402954385daea1594c3e750abTom Stellard}; 126431bb79a41bd5e7402954385daea1594c3e750abTom Stellard 127431bb79a41bd5e7402954385daea1594c3e750abTom Stellard 128431bb79a41bd5e7402954385daea1594c3e750abTom Stellard} // End namespace AMDGPUISD 129431bb79a41bd5e7402954385daea1594c3e750abTom Stellard 13050ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellardnamespace SIISD { 13150ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard 13250ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellardenum { 13350ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard SI_FIRST = AMDGPUISD::LAST_AMDGPU_ISD_NUMBER, 13450ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard VCC_AND, 13550ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard VCC_BITCAST 13650ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard}; 13750ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard 13850ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard} // End namespace SIISD 13950ff2dc0a4f553eb8d634d6f081fe5e4e25f6f48Tom Stellard 140bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard} // End namespace llvm 141a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 142bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard#endif // AMDGPUISELLOWERING_H 143