1e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 2e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard#include "AMDGPUInstPrinter.h" 3e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard#include "llvm/MC/MCInst.h" 4e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 5e30b4644b613a130318cdf240ad237b0afbc525aTom Stellardusing namespace llvm; 6e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 7e30b4644b613a130318cdf240ad237b0afbc525aTom Stellardvoid AMDGPUInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, 8e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard StringRef Annot) { 9e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard printInstruction(MI, OS); 10e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 11e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard printAnnotation(OS, Annot); 12e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard} 13e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 14e30b4644b613a130318cdf240ad237b0afbc525aTom Stellardvoid AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, 15e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard raw_ostream &O) { 16e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 17e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard const MCOperand &Op = MI->getOperand(OpNo); 18e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard if (Op.isReg()) { 19e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard O << getRegisterName(Op.getReg()); 20e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard } else if (Op.isImm()) { 21e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard O << Op.getImm(); 22e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard } else if (Op.isFPImm()) { 23e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard O << Op.getFPImm(); 24e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard } else { 25e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard assert(!"unknown operand type in printOperand"); 26e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard } 27e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard} 28e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 29e30b4644b613a130318cdf240ad237b0afbc525aTom Stellardvoid AMDGPUInstPrinter::printMemOperand(const MCInst *MI, unsigned OpNo, 30e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard raw_ostream &O) { 31e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard printOperand(MI, OpNo, O); 32e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard} 33e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard 34e30b4644b613a130318cdf240ad237b0afbc525aTom Stellard#include "AMDGPUGenAsmWriter.inc" 35