AMDGPUMCTargetDesc.cpp revision 2ad8608cb3e6a8d2f375ad2295504167b082711f 
1//===-- AMDGPUMCTargetDesc.cpp - AMDGPU Target Descriptions ---------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file provides AMDGPU specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AMDGPUMCTargetDesc.h"
15#include "AMDGPUMCAsmInfo.h"
16#include "InstPrinter/AMDGPUInstPrinter.h"
17#include "llvm/MC/MachineLocation.h"
18#include "llvm/MC/MCCodeGenInfo.h"
19#include "llvm/MC/MCInstrInfo.h"
20#include "llvm/MC/MCRegisterInfo.h"
21#include "llvm/MC/MCStreamer.h"
22#include "llvm/MC/MCSubtargetInfo.h"
23#include "llvm/Support/ErrorHandling.h"
24#include "llvm/Support/TargetRegistry.h"
25
26#define GET_INSTRINFO_MC_DESC
27#include "AMDGPUGenInstrInfo.inc"
28
29#define GET_SUBTARGETINFO_MC_DESC
30#include "AMDGPUGenSubtargetInfo.inc"
31
32#define GET_REGINFO_MC_DESC
33#include "AMDGPUGenRegisterInfo.inc"
34
35using namespace llvm;
36
37static MCInstrInfo *createAMDGPUMCInstrInfo() {
38  MCInstrInfo *X = new MCInstrInfo();
39  InitAMDGPUMCInstrInfo(X);
40  return X;
41}
42
43static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) {
44  MCRegisterInfo *X = new MCRegisterInfo();
45  InitAMDGPUMCRegisterInfo(X, 0);
46  return X;
47}
48
49static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU,
50                                                   StringRef FS) {
51  MCSubtargetInfo * X = new MCSubtargetInfo();
52  InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS);
53  return X;
54}
55
56static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
57                                               CodeModel::Model CM,
58                                               CodeGenOpt::Level OL) {
59  MCCodeGenInfo *X = new MCCodeGenInfo();
60  X->InitMCCodeGenInfo(RM, CM, OL);
61  return X;
62}
63
64static MCInstPrinter *createAMDGPUMCInstPrinter(const Target &T,
65                                                unsigned SyntaxVariant,
66                                                const MCAsmInfo &MAI,
67                                                const MCInstrInfo &MII,
68                                                const MCRegisterInfo &MRI,
69                                                const MCSubtargetInfo &STI) {
70  return new AMDGPUInstPrinter(MAI, MII, MRI);
71}
72
73static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII,
74                                                const MCSubtargetInfo &STI,
75                                                MCContext &Ctx) {
76  if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) {
77    return createSIMCCodeEmitter(MCII, STI, Ctx);
78  } else {
79    return createR600MCCodeEmitter(MCII, STI, Ctx);
80  }
81}
82
83static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
84                                    MCContext &Ctx, MCAsmBackend &MAB,
85                                    raw_ostream &_OS,
86                                    MCCodeEmitter *_Emitter,
87                                    bool RelaxAll,
88                                    bool NoExecStack) {
89  return createPureStreamer(Ctx, MAB, _OS, _Emitter);
90}
91
92extern "C" void LLVMInitializeAMDGPUTargetMC() {
93
94  RegisterMCAsmInfo<AMDGPUMCAsmInfo> Y(TheAMDGPUTarget);
95
96  TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDGPUMCCodeGenInfo);
97
98  TargetRegistry::RegisterMCInstrInfo(TheAMDGPUTarget, createAMDGPUMCInstrInfo);
99
100  TargetRegistry::RegisterMCRegInfo(TheAMDGPUTarget, createAMDGPUMCRegisterInfo);
101
102  TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDGPUMCSubtargetInfo);
103
104  TargetRegistry::RegisterMCInstPrinter(TheAMDGPUTarget, createAMDGPUMCInstPrinter);
105
106  TargetRegistry::RegisterMCCodeEmitter(TheAMDGPUTarget, createAMDGPUMCCodeEmitter);
107
108  TargetRegistry::RegisterMCAsmBackend(TheAMDGPUTarget, createAMDGPUAsmBackend);
109
110  TargetRegistry::RegisterMCObjectStreamer(TheAMDGPUTarget, createMCStreamer);
111}
112