Makefile.sources revision 235318a578b3d7772a60590c7e76791ed6d1a78e 
1
2GENERATED_SOURCES := \
3	R600Intrinsics.td		\
4	R600RegisterInfo.td		\
5	SIRegisterInfo.td		\
6	SIRegisterGetHWRegNum.inc		\
7	AMDGPUGenRegisterInfo.inc	\
8	AMDGPUGenInstrInfo.inc		\
9	AMDGPUGenAsmWriter.inc		\
10	AMDGPUGenDAGISel.inc		\
11	AMDGPUGenCallingConv.inc		\
12	AMDGPUGenSubtargetInfo.inc		\
13	AMDGPUGenEDInfo.inc		\
14	AMDGPUGenIntrinsics.inc		\
15	AMDGPUGenCodeEmitter.inc	\
16	AMDGPUGenMCCodeEmitter.inc	\
17	AMDGPUGenDFAPacketizer.inc
18
19CPP_SOURCES := \
20	AMDIL7XXDevice.cpp		\
21	AMDILCFGStructurizer.cpp	\
22	AMDILDevice.cpp			\
23	AMDILDeviceInfo.cpp		\
24	AMDILEvergreenDevice.cpp	\
25	AMDILFrameLowering.cpp		\
26	AMDILIntrinsicInfo.cpp		\
27	AMDILISelDAGToDAG.cpp		\
28	AMDILISelLowering.cpp		\
29	AMDILNIDevice.cpp		\
30	AMDILPeepholeOptimizer.cpp	\
31	AMDILSIDevice.cpp		\
32	AMDGPUAsmPrinter.cpp \
33	AMDGPUMCInstLower.cpp \
34	AMDGPUSubtarget.cpp		\
35	AMDGPUTargetMachine.cpp		\
36	AMDGPUISelLowering.cpp		\
37	AMDGPUConvertToISA.cpp		\
38	AMDGPUInstrInfo.cpp		\
39	AMDGPURegisterInfo.cpp		\
40	R600CodeEmitter.cpp		\
41	R600ExpandSpecialInstrs.cpp	\
42	R600ISelLowering.cpp		\
43	R600InstrInfo.cpp		\
44	R600KernelParameters.cpp	\
45	R600MachineFunctionInfo.cpp	\
46	R600RegisterInfo.cpp		\
47	SIAssignInterpRegs.cpp		\
48	SIInstrInfo.cpp			\
49	SIISelLowering.cpp		\
50	SIMachineFunctionInfo.cpp	\
51	SIRegisterInfo.cpp		\
52	InstPrinter/AMDGPUInstPrinter.cpp \
53	MCTargetDesc/AMDILMCAsmInfo.cpp	\
54	MCTargetDesc/AMDGPUAsmBackend.cpp \
55	MCTargetDesc/AMDILMCTargetDesc.cpp	\
56	MCTargetDesc/SIMCCodeEmitter.cpp \
57	TargetInfo/AMDILTargetInfo.cpp	\
58	radeon_llvm_emit.cpp
59
60C_SOURCES := \
61	radeon_setup_tgsi_llvm.c
62