Makefile.sources revision 82a5d0c64142990236b40567561b6e99b7158216 
1
2GENERATED_SOURCES := \
3	R600Intrinsics.td		\
4	R600RegisterInfo.td		\
5	SIRegisterInfo.td		\
6	SIRegisterGetHWRegNum.inc		\
7	AMDGPUGenRegisterInfo.inc	\
8	AMDGPUGenInstrInfo.inc		\
9	AMDGPUGenAsmWriter.inc		\
10	AMDGPUGenDAGISel.inc		\
11	AMDGPUGenCallingConv.inc		\
12	AMDGPUGenSubtargetInfo.inc		\
13	AMDGPUGenEDInfo.inc		\
14	AMDGPUGenIntrinsics.inc		\
15	AMDGPUGenCodeEmitter.inc	\
16	AMDGPUGenDFAPacketizer.inc
17
18CPP_SOURCES := \
19	AMDIL7XXDevice.cpp		\
20	AMDILCFGStructurizer.cpp	\
21	AMDILDevice.cpp			\
22	AMDILDeviceInfo.cpp		\
23	AMDILEvergreenDevice.cpp	\
24	AMDILFrameLowering.cpp		\
25	AMDILIntrinsicInfo.cpp		\
26	AMDILISelDAGToDAG.cpp		\
27	AMDILISelLowering.cpp		\
28	AMDILNIDevice.cpp		\
29	AMDILPeepholeOptimizer.cpp	\
30	AMDILSIDevice.cpp		\
31	AMDGPUSubtarget.cpp		\
32	AMDGPUTargetMachine.cpp		\
33	AMDGPUISelLowering.cpp		\
34	AMDGPUConvertToISA.cpp		\
35	AMDGPUInstrInfo.cpp		\
36	AMDGPURegisterInfo.cpp		\
37	R600CodeEmitter.cpp		\
38	R600ExpandSpecialInstrs.cpp	\
39	R600ISelLowering.cpp		\
40	R600InstrInfo.cpp		\
41	R600KernelParameters.cpp	\
42	R600MachineFunctionInfo.cpp	\
43	R600RegisterInfo.cpp		\
44	SIAssignInterpRegs.cpp		\
45	SICodeEmitter.cpp		\
46	SIInstrInfo.cpp			\
47	SIISelLowering.cpp		\
48	SIMachineFunctionInfo.cpp	\
49	SIRegisterInfo.cpp		\
50	MCTargetDesc/AMDILMCAsmInfo.cpp	\
51	MCTargetDesc/AMDILMCTargetDesc.cpp	\
52	TargetInfo/AMDILTargetInfo.cpp	\
53	radeon_llvm_emit.cpp
54
55C_SOURCES := \
56	radeon_setup_tgsi_llvm.c
57