Makefile.sources revision 90bd1d52bbf95947955a66ec67f5f6c7dc87119a
1 2GENERATED_SOURCES := \ 3 R600Intrinsics.td \ 4 R600RegisterInfo.td \ 5 SIRegisterInfo.td \ 6 SIRegisterGetHWRegNum.inc \ 7 AMDGPUGenRegisterInfo.inc \ 8 AMDGPUGenInstrInfo.inc \ 9 AMDGPUGenAsmWriter.inc \ 10 AMDGPUGenDAGISel.inc \ 11 AMDGPUGenCallingConv.inc \ 12 AMDGPUGenSubtargetInfo.inc \ 13 AMDGPUGenEDInfo.inc \ 14 AMDGPUGenIntrinsics.inc \ 15 AMDGPUGenCodeEmitter.inc \ 16 AMDGPUGenMCCodeEmitter.inc \ 17 AMDGPUGenDFAPacketizer.inc 18 19CPP_SOURCES := \ 20 AMDIL7XXDevice.cpp \ 21 AMDILCFGStructurizer.cpp \ 22 AMDILDevice.cpp \ 23 AMDILDeviceInfo.cpp \ 24 AMDILEvergreenDevice.cpp \ 25 AMDILFrameLowering.cpp \ 26 AMDILIntrinsicInfo.cpp \ 27 AMDILISelDAGToDAG.cpp \ 28 AMDILISelLowering.cpp \ 29 AMDILNIDevice.cpp \ 30 AMDILPeepholeOptimizer.cpp \ 31 AMDILSIDevice.cpp \ 32 AMDGPUAsmPrinter.cpp \ 33 AMDGPUMCInstLower.cpp \ 34 AMDGPUSubtarget.cpp \ 35 AMDGPUTargetMachine.cpp \ 36 AMDGPUISelLowering.cpp \ 37 AMDGPUConvertToISA.cpp \ 38 AMDGPUInstrInfo.cpp \ 39 AMDGPURegisterInfo.cpp \ 40 R600ExpandSpecialInstrs.cpp \ 41 R600ISelLowering.cpp \ 42 R600InstrInfo.cpp \ 43 R600KernelParameters.cpp \ 44 R600MachineFunctionInfo.cpp \ 45 R600RegisterInfo.cpp \ 46 SIAssignInterpRegs.cpp \ 47 SIInstrInfo.cpp \ 48 SIISelLowering.cpp \ 49 SIMachineFunctionInfo.cpp \ 50 SIRegisterInfo.cpp \ 51 InstPrinter/AMDGPUInstPrinter.cpp \ 52 MCTargetDesc/AMDILMCAsmInfo.cpp \ 53 MCTargetDesc/AMDGPUAsmBackend.cpp \ 54 MCTargetDesc/AMDILMCTargetDesc.cpp \ 55 MCTargetDesc/SIMCCodeEmitter.cpp \ 56 MCTargetDesc/R600MCCodeEmitter.cpp \ 57 TargetInfo/AMDILTargetInfo.cpp \ 58 radeon_llvm_emit.cpp 59 60C_SOURCES := \ 61 radeon_setup_tgsi_llvm.c 62