Makefile.sources revision d088da917bb3495491b9a5da5ca1716ddd91ddd5 
1
2GENERATED_SOURCES := \
3	R600Intrinsics.td		\
4	R600RegisterInfo.td		\
5	SIRegisterInfo.td		\
6	SIRegisterGetHWRegNum.inc		\
7	AMDILGenRegisterInfo.inc	\
8	AMDILGenInstrInfo.inc		\
9	AMDILGenAsmWriter.inc		\
10	AMDILGenDAGISel.inc		\
11	AMDILGenCallingConv.inc		\
12	AMDILGenSubtargetInfo.inc		\
13	AMDILGenEDInfo.inc		\
14	AMDILGenIntrinsics.inc		\
15	AMDILGenCodeEmitter.inc
16
17CPP_SOURCES := \
18	AMDIL7XXDevice.cpp		\
19	AMDILCFGStructurizer.cpp	\
20	AMDILDevice.cpp			\
21	AMDILDeviceInfo.cpp		\
22	AMDILEvergreenDevice.cpp	\
23	AMDILFrameLowering.cpp		\
24	AMDILInstrInfo.cpp		\
25	AMDILIntrinsicInfo.cpp		\
26	AMDILISelDAGToDAG.cpp		\
27	AMDILISelLowering.cpp		\
28	AMDILNIDevice.cpp		\
29	AMDILPeepholeOptimizer.cpp	\
30	AMDILRegisterInfo.cpp		\
31	AMDILSIDevice.cpp		\
32	AMDILSubtarget.cpp		\
33	AMDILTargetMachine.cpp		\
34	AMDGPUTargetMachine.cpp		\
35	AMDGPUISelLowering.cpp		\
36	AMDGPUConvertToISA.cpp		\
37	AMDGPULowerInstructions.cpp		\
38	AMDGPUInstrInfo.cpp		\
39	AMDGPURegisterInfo.cpp		\
40	AMDGPUUtil.cpp			\
41	R600CodeEmitter.cpp		\
42	R600ISelLowering.cpp		\
43	R600InstrInfo.cpp		\
44	R600KernelParameters.cpp	\
45	R600LowerInstructions.cpp	\
46	R600MachineFunctionInfo.cpp	\
47	R600RegisterInfo.cpp		\
48	SIAssignInterpRegs.cpp		\
49	SICodeEmitter.cpp		\
50	SIInstrInfo.cpp			\
51	SIISelLowering.cpp		\
52	SIMachineFunctionInfo.cpp	\
53	SIPropagateImmReads.cpp		\
54	SIRegisterInfo.cpp		\
55	MCTargetDesc/AMDILMCAsmInfo.cpp	\
56	MCTargetDesc/AMDILMCTargetDesc.cpp	\
57	TargetInfo/AMDILTargetInfo.cpp	\
58	radeon_llvm_emit.cpp
59
60C_SOURCES := \
61	radeon_setup_tgsi_llvm.c
62