SIInstrFormats.td revision a75c6163e605f35b14f26930dd9227e4f337ec9e 
1//===-- SIInstrFormats.td - TODO: Add brief description -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// TODO: Add full description
11//
12//===----------------------------------------------------------------------===//
13
14
15class VOP3_32 <bits<9> op, string opName, list<dag> pattern>
16  : VOP3 <op, (outs VReg_32:$dst), (ins AllReg_32:$src0, AllReg_32:$src1, AllReg_32:$src2, i32imm:$src3, i32imm:$src4, i32imm:$src5, i32imm:$src6), opName, pattern>;
17
18class VOP3_64 <bits<9> op, string opName, list<dag> pattern>
19  : VOP3 <op, (outs VReg_64:$dst), (ins AllReg_64:$src0, AllReg_64:$src1, AllReg_64:$src2, i32imm:$src3, i32imm:$src4, i32imm:$src5, i32imm:$src6), opName, pattern>;
20
21
22class SOP1_32 <bits<8> op, string opName, list<dag> pattern>
23  : SOP1 <op, (outs SReg_32:$dst), (ins SReg_32:$src0), opName, pattern>;
24
25class SOP1_64 <bits<8> op, string opName, list<dag> pattern>
26  : SOP1 <op, (outs SReg_64:$dst), (ins SReg_64:$src0), opName, pattern>;
27
28class SOP2_32 <bits<7> op, string opName, list<dag> pattern>
29  : SOP2 <op, (outs SReg_32:$dst), (ins SReg_32:$src0, SReg_32:$src1), opName, pattern>;
30
31class SOP2_64 <bits<7> op, string opName, list<dag> pattern>
32  : SOP2 <op, (outs SReg_64:$dst), (ins SReg_64:$src0, SReg_64:$src1), opName, pattern>;
33
34class VOP1_Helper <bits<8> op, RegisterClass vrc, RegisterClass arc,
35                   string opName, list<dag> pattern> : 
36  VOP1 <
37    op, (outs vrc:$dst), (ins arc:$src0), opName, pattern
38  >;
39
40multiclass VOP1_32 <bits<8> op, string opName, list<dag> pattern,
41                    bits<16> amdil = AMDILInst.NONE> {
42
43  let AMDILOp = amdil in {
44    def _e32: VOP1_Helper <op, VReg_32, AllReg_32, opName, pattern>;
45  }
46
47  def _e64 : VOP3_32 <
48    {1, 1, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
49    opName, []
50  >;
51}
52
53multiclass VOP1_64 <bits<8> op, string opName, list<dag> pattern> {
54
55  def _e32 : VOP1_Helper <op, VReg_64, AllReg_64, opName, pattern>;
56
57  def _e64 : VOP3_64 <
58    {1, 1, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
59    opName, []
60  >;
61}
62
63class VOP2_Helper <bits<6> op, RegisterClass vrc, RegisterClass arc,
64                   string opName, list<dag> pattern> :
65  VOP2 <
66    op, (outs vrc:$dst), (ins arc:$src0, vrc:$src1), opName, pattern
67  >;
68
69multiclass VOP2_32 <bits<6> op, string opName, list<dag> pattern,
70                    bits<16> amdil = AMDILInst.NONE> {
71
72  let AMDILOp = amdil in {
73    def _e32 : VOP2_Helper <op, VReg_32, AllReg_32, opName, pattern>;
74  }
75
76  def _e64 : VOP3_32 <
77    {1, 0, 0, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
78    opName, []
79  >;
80}
81
82multiclass VOP2_64 <bits<6> op, string opName, list<dag> pattern> {
83  def _e32: VOP2_Helper <op, VReg_64, AllReg_64, opName, pattern>;
84
85  def _e64 : VOP3_64 <
86    {1, 0, 0, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
87    opName, []
88  >;
89}
90
91class SOPK_32 <bits<5> op, string opName, list<dag> pattern>
92  : SOPK <op, (outs SReg_32:$dst), (ins i16imm:$src0), opName, pattern>;
93
94class SOPK_64 <bits<5> op, string opName, list<dag> pattern>
95  : SOPK <op, (outs SReg_64:$dst), (ins i16imm:$src0), opName, pattern>;
96
97class VOPC_Helper <bits<8> op, RegisterClass vrc, RegisterClass arc,
98                 string opName, list<dag> pattern> :
99  VOPC <
100    op, (outs), (ins arc:$src0, vrc:$src1), opName, pattern
101  >;
102
103multiclass VOPC_32 <bits<8> op, string opName, list<dag> pattern> {
104
105  def _e32 : VOPC_Helper <op, VReg_32, AllReg_32, opName, pattern>;
106
107  def _e64 : VOP3_32 <
108    {0, op{7}, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
109    opName, []
110  >;
111}
112
113multiclass VOPC_64 <bits<8> op, string opName, list<dag> pattern> {
114
115  def _e32 : VOPC_Helper <op, VReg_64, AllReg_64, opName, pattern>;
116
117  def _e64 : VOP3_64 <
118    {0, op{7}, op{6}, op{5}, op{4}, op{3}, op{2}, op{1}, op{0}},
119    opName, []
120  >;
121}
122
123class SOPC_32 <bits<7> op, string opName, list<dag> pattern>
124  : SOPC <op, (outs CCReg:$dst), (ins SReg_32:$src0, SReg_32:$src1), opName, pattern>;
125
126class SOPC_64 <bits<7> op, string opName, list<dag> pattern>
127  : SOPC <op, (outs CCReg:$dst), (ins SReg_64:$src0, SReg_64:$src1), opName, pattern>;
128
129