radeon_drm_winsys.c revision ce12f826927cf2d3ac3fd70d893abfb07adc23db
1/* 2 * Copyright © 2009 Corbin Simpson 3 * Copyright © 2011 Marek Olšák <maraeo@gmail.com> 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining 7 * a copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * The above copyright notice and this permission notice (including the 24 * next paragraph) shall be included in all copies or substantial portions 25 * of the Software. 26 */ 27/* 28 * Authors: 29 * Corbin Simpson <MostAwesomeDude@gmail.com> 30 * Joakim Sindholt <opensource@zhasha.com> 31 * Marek Olšák <maraeo@gmail.com> 32 */ 33 34#include "radeon_drm_bo.h" 35#include "radeon_drm_cs.h" 36#include "radeon_drm_public.h" 37 38#include "pipebuffer/pb_bufmgr.h" 39#include "util/u_memory.h" 40 41#include <xf86drm.h> 42#include <stdio.h> 43 44#ifndef RADEON_INFO_WANT_HYPERZ 45#define RADEON_INFO_WANT_HYPERZ 7 46#endif 47#ifndef RADEON_INFO_WANT_CMASK 48#define RADEON_INFO_WANT_CMASK 8 49#endif 50#ifndef RADEON_INFO_NUM_BACKENDS 51#define RADEON_INFO_NUM_BACKENDS 10 52#endif 53 54/* Enable/disable feature access for one command stream. 55 * If enable == TRUE, return TRUE on success. 56 * Otherwise, return FALSE. 57 * 58 * We basically do the same thing kernel does, because we have to deal 59 * with multiple contexts (here command streams) backed by one winsys. */ 60static boolean radeon_set_fd_access(struct radeon_drm_cs *applier, 61 struct radeon_drm_cs **owner, 62 pipe_mutex *mutex, 63 unsigned request, boolean enable) 64{ 65 struct drm_radeon_info info = {0}; 66 unsigned value = enable ? 1 : 0; 67 68 pipe_mutex_lock(*mutex); 69 70 /* Early exit if we are sure the request will fail. */ 71 if (enable) { 72 if (*owner) { 73 pipe_mutex_unlock(*mutex); 74 return FALSE; 75 } 76 } else { 77 if (*owner != applier) { 78 pipe_mutex_unlock(*mutex); 79 return FALSE; 80 } 81 } 82 83 /* Pass through the request to the kernel. */ 84 info.value = (unsigned long)&value; 85 info.request = request; 86 if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO, 87 &info, sizeof(info)) != 0) { 88 pipe_mutex_unlock(*mutex); 89 return FALSE; 90 } 91 92 /* Update the rights in the winsys. */ 93 if (enable) { 94 if (value) { 95 *owner = applier; 96 fprintf(stderr, "radeon: Acquired Hyper-Z.\n"); 97 pipe_mutex_unlock(*mutex); 98 return TRUE; 99 } 100 } else { 101 *owner = NULL; 102 fprintf(stderr, "radeon: Released Hyper-Z.\n"); 103 } 104 105 pipe_mutex_unlock(*mutex); 106 return FALSE; 107} 108 109static boolean radeon_get_drm_value(int fd, unsigned request, 110 const char *name, uint32_t *out) 111{ 112 struct drm_radeon_info info = {0}; 113 int retval; 114 115 info.value = (unsigned long)out; 116 info.request = request; 117 118 retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); 119 if (retval) { 120 fprintf(stderr, "%s: Failed to get %s, error number %d\n", 121 __func__, name, retval); 122 return FALSE; 123 } 124 return TRUE; 125} 126 127/* Helper function to do the ioctls needed for setup and init. */ 128static boolean do_winsys_init(struct radeon_drm_winsys *ws) 129{ 130 struct drm_radeon_gem_info gem_info = {0}; 131 int retval; 132 drmVersionPtr version; 133 134 /* We do things in a specific order here. 135 * 136 * DRM version first. We need to be sure we're running on a KMS chipset. 137 * This is also for some features. 138 * 139 * Then, the PCI ID. This is essential and should return usable numbers 140 * for all Radeons. If this fails, we probably got handed an FD for some 141 * non-Radeon card. 142 * 143 * The GEM info is actually bogus on the kernel side, as well as our side 144 * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because 145 * we don't actually use the info for anything yet. 146 * 147 * The GB and Z pipe requests should always succeed, but they might not 148 * return sensical values for all chipsets, but that's alright because 149 * the pipe drivers already know that. 150 */ 151 152 /* Get DRM version. */ 153 version = drmGetVersion(ws->fd); 154 if (version->version_major != 2 || 155 version->version_minor < 3) { 156 fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is " 157 "only compatible with 2.3.x (kernel 2.6.34) or later.\n", 158 __FUNCTION__, 159 version->version_major, 160 version->version_minor, 161 version->version_patchlevel); 162 drmFreeVersion(version); 163 return FALSE; 164 } 165 166 ws->info.drm_major = version->version_major; 167 ws->info.drm_minor = version->version_minor; 168 ws->info.drm_patchlevel = version->version_patchlevel; 169 drmFreeVersion(version); 170 171 /* Get PCI ID. */ 172 if (!radeon_get_drm_value(ws->fd, RADEON_INFO_DEVICE_ID, "PCI ID", 173 &ws->info.pci_id)) 174 return FALSE; 175 176 /* Check PCI ID. */ 177 switch (ws->info.pci_id) { 178#define CHIPSET(pci_id, name, family) case pci_id: 179#include "pci_ids/r300_pci_ids.h" 180#undef CHIPSET 181 ws->gen = R300; 182 break; 183 184#define CHIPSET(pci_id, name, family) case pci_id: 185#include "pci_ids/r600_pci_ids.h" 186#undef CHIPSET 187 ws->gen = R600; 188 break; 189 190 default: 191 fprintf(stderr, "radeon: Invalid PCI ID.\n"); 192 return FALSE; 193 } 194 195 /* Get GEM info. */ 196 retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO, 197 &gem_info, sizeof(gem_info)); 198 if (retval) { 199 fprintf(stderr, "%s: Failed to get MM info, error number %d\n", 200 __FUNCTION__, retval); 201 return FALSE; 202 } 203 ws->info.gart_size = gem_info.gart_size; 204 ws->info.vram_size = gem_info.vram_size; 205 206 ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN); 207 208 /* Generation-specific queries. */ 209 if (ws->gen == R300) { 210 if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_GB_PIPES, 211 "GB pipe count", 212 &ws->info.r300_num_gb_pipes)) 213 return FALSE; 214 215 if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_Z_PIPES, 216 "Z pipe count", 217 &ws->info.r300_num_z_pipes)) 218 return FALSE; 219 } 220 else if (ws->gen == R600) { 221 if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS, 222 "num backends", 223 &ws->info.r600_num_backends)) 224 return FALSE; 225 } 226 227 return TRUE; 228} 229 230static void radeon_winsys_destroy(struct radeon_winsys *rws) 231{ 232 struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; 233 234 pipe_mutex_destroy(ws->hyperz_owner_mutex); 235 pipe_mutex_destroy(ws->cmask_owner_mutex); 236 237 ws->cman->destroy(ws->cman); 238 ws->kman->destroy(ws->kman); 239 FREE(rws); 240} 241 242static void radeon_query_info(struct radeon_winsys *rws, 243 struct radeon_info *info) 244{ 245 *info = ((struct radeon_drm_winsys *)rws)->info; 246} 247 248static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs, 249 enum radeon_feature_id fid, 250 boolean enable) 251{ 252 struct radeon_drm_cs *cs = radeon_drm_cs(rcs); 253 254 switch (fid) { 255 case RADEON_FID_R300_HYPERZ_ACCESS: 256 if (debug_get_bool_option("RADEON_HYPERZ", FALSE)) { 257 return radeon_set_fd_access(cs, &cs->ws->hyperz_owner, 258 &cs->ws->hyperz_owner_mutex, 259 RADEON_INFO_WANT_HYPERZ, enable); 260 } else { 261 return FALSE; 262 } 263 264 case RADEON_FID_R300_CMASK_ACCESS: 265 if (debug_get_bool_option("RADEON_CMASK", FALSE)) { 266 return radeon_set_fd_access(cs, &cs->ws->cmask_owner, 267 &cs->ws->cmask_owner_mutex, 268 RADEON_INFO_WANT_CMASK, enable); 269 } else { 270 return FALSE; 271 } 272 } 273 return FALSE; 274} 275 276struct radeon_winsys *radeon_drm_winsys_create(int fd) 277{ 278 struct radeon_drm_winsys *ws = CALLOC_STRUCT(radeon_drm_winsys); 279 if (!ws) { 280 return NULL; 281 } 282 283 ws->fd = fd; 284 ws->info.fd = fd; 285 286 if (!do_winsys_init(ws)) 287 goto fail; 288 289 /* Create managers. */ 290 ws->kman = radeon_bomgr_create(ws); 291 if (!ws->kman) 292 goto fail; 293 ws->cman = pb_cache_manager_create(ws->kman, 1000000); 294 if (!ws->cman) 295 goto fail; 296 297 /* Set functions. */ 298 ws->base.destroy = radeon_winsys_destroy; 299 ws->base.query_info = radeon_query_info; 300 ws->base.cs_request_feature = radeon_cs_request_feature; 301 302 radeon_bomgr_init_functions(ws); 303 radeon_drm_cs_init_functions(ws); 304 305 pipe_mutex_init(ws->hyperz_owner_mutex); 306 pipe_mutex_init(ws->cmask_owner_mutex); 307 308 return &ws->base; 309 310fail: 311 if (ws->cman) 312 ws->cman->destroy(ws->cman); 313 if (ws->kman) 314 ws->kman->destroy(ws->kman); 315 FREE(ws); 316 return NULL; 317} 318