intel_context.c revision 4006c5e4526a1cdb910500764590e39d32750967
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include "main/glheader.h" 30#include "main/context.h" 31#include "main/extensions.h" 32//#include "main/matrix.h" 33//#include "main/simple_list.h" 34#include "main/framebuffer.h" 35#include "main/imports.h" 36#include "main/points.h" 37 38#include "swrast/swrast.h" 39#include "swrast_setup/swrast_setup.h" 40#include "tnl/tnl.h" 41 42//#include "tnl/t_pipeline.h" 43//#include "tnl/t_vertex.h" 44 45#include "drivers/common/driverfuncs.h" 46 47#include "intel_screen.h" 48 49#include "i830_dri.h" 50 51#include "intel_chipset.h" 52#include "intel_buffers.h" 53#include "intel_tex.h" 54#include "intel_batchbuffer.h" 55//#include "intel_blit.h" 56#include "intel_clear.h" 57#include "intel_extensions.h" 58#include "intel_pixel.h" 59#include "intel_regions.h" 60#include "intel_buffer_objects.h" 61#include "intel_fbo.h" 62#include "intel_decode.h" 63#include "intel_bufmgr.h" 64#include "intel_swapbuffers.h" 65 66#include "drirenderbuffer.h" 67#include "vblank.h" 68#include "utils.h" 69#include "xmlpool.h" /* for symbolic values of enum-type options */ 70 71 72#ifndef INTEL_DEBUG 73int INTEL_DEBUG = (0); 74#endif 75 76 77#define DRIVER_DATE "20090114" 78#define DRIVER_DATE_GEM "GEM " DRIVER_DATE 79 80 81static const GLubyte * 82intelGetString(GLcontext * ctx, GLenum name) 83{ 84 const struct intel_context *const intel = intel_context(ctx); 85 const char *chipset; 86 static char buffer[128]; 87 88 switch (name) { 89 case GL_VENDOR: 90 return (GLubyte *) "Tungsten Graphics, Inc"; 91 break; 92 93 case GL_RENDERER: 94 switch (intel->intelScreen->deviceID) { 95 case PCI_CHIP_845_G: 96 chipset = "Intel(R) 845G"; 97 break; 98 case PCI_CHIP_I830_M: 99 chipset = "Intel(R) 830M"; 100 break; 101 case PCI_CHIP_I855_GM: 102 chipset = "Intel(R) 852GM/855GM"; 103 break; 104 case PCI_CHIP_I865_G: 105 chipset = "Intel(R) 865G"; 106 break; 107 case PCI_CHIP_I915_G: 108 chipset = "Intel(R) 915G"; 109 break; 110 case PCI_CHIP_E7221_G: 111 chipset = "Intel (R) E7221G (i915)"; 112 break; 113 case PCI_CHIP_I915_GM: 114 chipset = "Intel(R) 915GM"; 115 break; 116 case PCI_CHIP_I945_G: 117 chipset = "Intel(R) 945G"; 118 break; 119 case PCI_CHIP_I945_GM: 120 chipset = "Intel(R) 945GM"; 121 break; 122 case PCI_CHIP_I945_GME: 123 chipset = "Intel(R) 945GME"; 124 break; 125 case PCI_CHIP_G33_G: 126 chipset = "Intel(R) G33"; 127 break; 128 case PCI_CHIP_Q35_G: 129 chipset = "Intel(R) Q35"; 130 break; 131 case PCI_CHIP_Q33_G: 132 chipset = "Intel(R) Q33"; 133 break; 134 case PCI_CHIP_I965_Q: 135 chipset = "Intel(R) 965Q"; 136 break; 137 case PCI_CHIP_I965_G: 138 case PCI_CHIP_I965_G_1: 139 chipset = "Intel(R) 965G"; 140 break; 141 case PCI_CHIP_I946_GZ: 142 chipset = "Intel(R) 946GZ"; 143 break; 144 case PCI_CHIP_I965_GM: 145 chipset = "Intel(R) 965GM"; 146 break; 147 case PCI_CHIP_I965_GME: 148 chipset = "Intel(R) 965GME/GLE"; 149 break; 150 case PCI_CHIP_GM45_GM: 151 chipset = "Mobile Intel® GM45 Express Chipset"; 152 break; 153 case PCI_CHIP_IGD_E_G: 154 chipset = "Intel(R) Integrated Graphics Device"; 155 break; 156 case PCI_CHIP_G45_G: 157 chipset = "Intel(R) G45/G43"; 158 break; 159 case PCI_CHIP_Q45_G: 160 chipset = "Intel(R) Q45/Q43"; 161 break; 162 case PCI_CHIP_G41_G: 163 chipset = "Intel(R) G41"; 164 break; 165 default: 166 chipset = "Unknown Intel Chipset"; 167 break; 168 } 169 170 (void) driGetRendererString(buffer, chipset, 171 (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE, 172 0); 173 return (GLubyte *) buffer; 174 175 default: 176 return NULL; 177 } 178} 179 180void 181intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 182{ 183 struct intel_framebuffer *intel_fb = drawable->driverPrivate; 184 struct intel_renderbuffer *rb; 185 struct intel_region *region, *depth_region; 186 struct intel_context *intel = context->driverPrivate; 187 __DRIbuffer *buffers; 188 __DRIscreen *screen; 189 int i, count; 190 unsigned int attachments[10]; 191 uint32_t name; 192 const char *region_name; 193 194 if (INTEL_DEBUG & DEBUG_DRI) 195 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 196 197 screen = intel->intelScreen->driScrnPriv; 198 199 i = 0; 200 if (intel_fb->color_rb[0]) 201 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 202 if (intel_fb->color_rb[1]) 203 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 204 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH)) 205 attachments[i++] = __DRI_BUFFER_DEPTH; 206 if (intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL)) 207 attachments[i++] = __DRI_BUFFER_STENCIL; 208 209 buffers = (*screen->dri2.loader->getBuffers)(drawable, 210 &drawable->w, 211 &drawable->h, 212 attachments, i, 213 &count, 214 drawable->loaderPrivate); 215 216 if (buffers == NULL) 217 return; 218 219 drawable->x = 0; 220 drawable->y = 0; 221 drawable->backX = 0; 222 drawable->backY = 0; 223 drawable->numClipRects = 1; 224 drawable->pClipRects[0].x1 = 0; 225 drawable->pClipRects[0].y1 = 0; 226 drawable->pClipRects[0].x2 = drawable->w; 227 drawable->pClipRects[0].y2 = drawable->h; 228 drawable->numBackClipRects = 1; 229 drawable->pBackClipRects[0].x1 = 0; 230 drawable->pBackClipRects[0].y1 = 0; 231 drawable->pBackClipRects[0].x2 = drawable->w; 232 drawable->pBackClipRects[0].y2 = drawable->h; 233 234 depth_region = NULL; 235 for (i = 0; i < count; i++) { 236 switch (buffers[i].attachment) { 237 case __DRI_BUFFER_FRONT_LEFT: 238 rb = intel_fb->color_rb[0]; 239 region_name = "dri2 front buffer"; 240 break; 241 242 case __DRI_BUFFER_BACK_LEFT: 243 rb = intel_fb->color_rb[1]; 244 region_name = "dri2 back buffer"; 245 break; 246 247 case __DRI_BUFFER_DEPTH: 248 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 249 region_name = "dri2 depth buffer"; 250 break; 251 252 case __DRI_BUFFER_STENCIL: 253 rb = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 254 region_name = "dri2 stencil buffer"; 255 break; 256 257 case __DRI_BUFFER_ACCUM: 258 default: 259 fprintf(stderr, 260 "unhandled buffer attach event, attacment type %d\n", 261 buffers[i].attachment); 262 return; 263 } 264 265 if (rb->region) { 266 dri_bo_flink(rb->region->buffer, &name); 267 if (name == buffers[i].name) 268 continue; 269 } 270 271 if (INTEL_DEBUG & DEBUG_DRI) 272 fprintf(stderr, 273 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 274 buffers[i].name, buffers[i].attachment, 275 buffers[i].cpp, buffers[i].pitch); 276 277 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_region) { 278 if (INTEL_DEBUG & DEBUG_DRI) 279 fprintf(stderr, "(reusing depth buffer as stencil)\n"); 280 intel_region_reference(®ion, depth_region); 281 } 282 else 283 region = intel_region_alloc_for_handle(intel, buffers[i].cpp, 284 drawable->w, 285 drawable->h, 286 buffers[i].pitch / buffers[i].cpp, 287 buffers[i].name, 288 region_name); 289 290 if (buffers[i].attachment == __DRI_BUFFER_DEPTH) 291 depth_region = region; 292 293 intel_renderbuffer_set_region(rb, region); 294 intel_region_release(®ion); 295 } 296 297 driUpdateFramebufferSize(&intel->ctx, drawable); 298} 299 300void 301intel_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h) 302{ 303 struct intel_context *intel = intel_context(ctx); 304 __DRIcontext *driContext = intel->driContext; 305 void (*old_viewport)(GLcontext *ctx, GLint x, GLint y, 306 GLsizei w, GLsizei h); 307 308 if (!driContext->driScreenPriv->dri2.enabled) 309 return; 310 311 intel_update_renderbuffers(driContext, driContext->driDrawablePriv); 312 if (driContext->driDrawablePriv != driContext->driReadablePriv) 313 intel_update_renderbuffers(driContext, driContext->driReadablePriv); 314 315 old_viewport = ctx->Driver.Viewport; 316 ctx->Driver.Viewport = NULL; 317 intel->driDrawable = driContext->driDrawablePriv; 318 intelWindowMoved(intel); 319 intel_draw_buffer(ctx, intel->ctx.DrawBuffer); 320 ctx->Driver.Viewport = old_viewport; 321} 322 323 324static const struct dri_debug_control debug_control[] = { 325 { "tex", DEBUG_TEXTURE}, 326 { "state", DEBUG_STATE}, 327 { "ioctl", DEBUG_IOCTL}, 328 { "blit", DEBUG_BLIT}, 329 { "mip", DEBUG_MIPTREE}, 330 { "fall", DEBUG_FALLBACKS}, 331 { "verb", DEBUG_VERBOSE}, 332 { "bat", DEBUG_BATCH}, 333 { "pix", DEBUG_PIXEL}, 334 { "buf", DEBUG_BUFMGR}, 335 { "reg", DEBUG_REGION}, 336 { "fbo", DEBUG_FBO}, 337 { "lock", DEBUG_LOCK}, 338 { "sync", DEBUG_SYNC}, 339 { "prim", DEBUG_PRIMS }, 340 { "vert", DEBUG_VERTS }, 341 { "dri", DEBUG_DRI }, 342 { "dma", DEBUG_DMA }, 343 { "san", DEBUG_SANITY }, 344 { "sleep", DEBUG_SLEEP }, 345 { "stats", DEBUG_STATS }, 346 { "tile", DEBUG_TILE }, 347 { "sing", DEBUG_SINGLE_THREAD }, 348 { "thre", DEBUG_SINGLE_THREAD }, 349 { "wm", DEBUG_WM }, 350 { "urb", DEBUG_URB }, 351 { "vs", DEBUG_VS }, 352 { NULL, 0 } 353}; 354 355 356static void 357intelInvalidateState(GLcontext * ctx, GLuint new_state) 358{ 359 struct intel_context *intel = intel_context(ctx); 360 361 _swrast_InvalidateState(ctx, new_state); 362 _swsetup_InvalidateState(ctx, new_state); 363 _vbo_InvalidateState(ctx, new_state); 364 _tnl_InvalidateState(ctx, new_state); 365 _tnl_invalidate_vertex_state(ctx, new_state); 366 367 intel->NewGLState |= new_state; 368 369 if (intel->vtbl.invalidate_state) 370 intel->vtbl.invalidate_state( intel, new_state ); 371} 372 373 374void 375intelFlush(GLcontext * ctx) 376{ 377 struct intel_context *intel = intel_context(ctx); 378 379 if (intel->Fallback) 380 _swrast_flush(ctx); 381 382 if (!IS_965(intel->intelScreen->deviceID)) 383 INTEL_FIREVERTICES(intel); 384 385 /* Emit a flush so that any frontbuffer rendering that might have occurred 386 * lands onscreen in a timely manner, even if the X Server doesn't trigger 387 * a flush for us. 388 */ 389 intel_batchbuffer_emit_mi_flush(intel->batch); 390 391 if (intel->batch->map != intel->batch->ptr) 392 intel_batchbuffer_flush(intel->batch); 393} 394 395void 396intelFinish(GLcontext * ctx) 397{ 398 struct gl_framebuffer *fb = ctx->DrawBuffer; 399 int i; 400 401 intelFlush(ctx); 402 403 for (i = 0; i < fb->_NumColorDrawBuffers; i++) { 404 struct intel_renderbuffer *irb; 405 406 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); 407 408 if (irb->region) 409 dri_bo_wait_rendering(irb->region->buffer); 410 } 411 if (fb->_DepthBuffer) { 412 /* XXX: Wait on buffer idle */ 413 } 414} 415 416void 417intelInitDriverFunctions(struct dd_function_table *functions) 418{ 419 _mesa_init_driver_functions(functions); 420 421 functions->Flush = intelFlush; 422 functions->Finish = intelFinish; 423 functions->GetString = intelGetString; 424 functions->UpdateState = intelInvalidateState; 425 426 functions->CopyColorTable = _swrast_CopyColorTable; 427 functions->CopyColorSubTable = _swrast_CopyColorSubTable; 428 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D; 429 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D; 430 431 intelInitTextureFuncs(functions); 432 intelInitStateFuncs(functions); 433 intelInitClearFuncs(functions); 434 intelInitBufferFuncs(functions); 435 intelInitPixelFuncs(functions); 436} 437 438 439GLboolean 440intelInitContext(struct intel_context *intel, 441 const __GLcontextModes * mesaVis, 442 __DRIcontextPrivate * driContextPriv, 443 void *sharedContextPrivate, 444 struct dd_function_table *functions) 445{ 446 GLcontext *ctx = &intel->ctx; 447 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate; 448 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; 449 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private; 450 int fthrottle_mode; 451 452 if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx, 453 functions, (void *) intel)) { 454 _mesa_printf("%s: failed to init mesa context\n", __FUNCTION__); 455 return GL_FALSE; 456 } 457 458 driContextPriv->driverPrivate = intel; 459 intel->intelScreen = intelScreen; 460 intel->driScreen = sPriv; 461 intel->sarea = intelScreen->sarea; 462 intel->driContext = driContextPriv; 463 464 /* Dri stuff */ 465 intel->hHWContext = driContextPriv->hHWContext; 466 intel->driFd = sPriv->fd; 467 intel->driHwLock = sPriv->lock; 468 469 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, 470 intel->driScreen->myNum, 471 IS_965(intelScreen->deviceID) ? "i965" : "i915"); 472 if (intelScreen->deviceID == PCI_CHIP_I865_G) 473 intel->maxBatchSize = 4096; 474 else 475 intel->maxBatchSize = BATCH_SZ; 476 477 intel->bufmgr = intelScreen->bufmgr; 478 intel->ttm = intelScreen->ttm; 479 if (intel->ttm) { 480 int bo_reuse_mode; 481 482 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); 483 switch (bo_reuse_mode) { 484 case DRI_CONF_BO_REUSE_DISABLED: 485 break; 486 case DRI_CONF_BO_REUSE_ALL: 487 intel_bufmgr_gem_enable_reuse(intel->bufmgr); 488 break; 489 } 490 } 491 492 ctx->Const.MaxTextureMaxAnisotropy = 2.0; 493 494 /* This doesn't yet catch all non-conformant rendering, but it's a 495 * start. 496 */ 497 if (getenv("INTEL_STRICT_CONFORMANCE")) { 498 intel->strict_conformance = 1; 499 } 500 501 if (intel->strict_conformance) { 502 ctx->Const.MinLineWidth = 1.0; 503 ctx->Const.MinLineWidthAA = 1.0; 504 ctx->Const.MaxLineWidth = 1.0; 505 ctx->Const.MaxLineWidthAA = 1.0; 506 ctx->Const.LineWidthGranularity = 1.0; 507 } 508 else { 509 ctx->Const.MinLineWidth = 1.0; 510 ctx->Const.MinLineWidthAA = 1.0; 511 ctx->Const.MaxLineWidth = 5.0; 512 ctx->Const.MaxLineWidthAA = 5.0; 513 ctx->Const.LineWidthGranularity = 0.5; 514 } 515 516 ctx->Const.MinPointSize = 1.0; 517 ctx->Const.MinPointSizeAA = 1.0; 518 ctx->Const.MaxPointSize = 255.0; 519 ctx->Const.MaxPointSizeAA = 3.0; 520 ctx->Const.PointSizeGranularity = 1.0; 521 522 /* reinitialize the context point state. 523 * It depend on constants in __GLcontextRec::Const 524 */ 525 _mesa_init_point(ctx); 526 527 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */ 528 529 /* Initialize the software rasterizer and helper modules. */ 530 _swrast_CreateContext(ctx); 531 _vbo_CreateContext(ctx); 532 _tnl_CreateContext(ctx); 533 _swsetup_CreateContext(ctx); 534 535 /* Configure swrast to match hardware characteristics: */ 536 _swrast_allow_pixel_fog(ctx, GL_FALSE); 537 _swrast_allow_vertex_fog(ctx, GL_TRUE); 538 539 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24; 540 intel->hw_stipple = 1; 541 542 /* XXX FBO: this doesn't seem to be used anywhere */ 543 switch (mesaVis->depthBits) { 544 case 0: /* what to do in this case? */ 545 case 16: 546 intel->polygon_offset_scale = 1.0; 547 break; 548 case 24: 549 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */ 550 break; 551 default: 552 assert(0); 553 break; 554 } 555 556 if (IS_965(intelScreen->deviceID)) 557 intel->polygon_offset_scale /= 0xffff; 558 559 intel->RenderIndex = ~0; 560 561 fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode"); 562 intel->irqsEmitted = 0; 563 564 intel->do_irqs = (intel->intelScreen->irq_active && 565 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS); 566 567 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); 568 569 _math_matrix_ctr(&intel->ViewportMatrix); 570 571 if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) { 572 _mesa_printf("IRQs not active. Exiting\n"); 573 exit(1); 574 } 575 576 intelInitExtensions(ctx, GL_FALSE); 577 578 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control); 579 if (INTEL_DEBUG & DEBUG_BUFMGR) 580 dri_bufmgr_set_debug(intel->bufmgr, GL_TRUE); 581 582 if (!sPriv->dri2.enabled) 583 intel_recreate_static_regions(intel); 584 585 intel->batch = intel_batchbuffer_alloc(intel); 586 587 intel_bufferobj_init(intel); 588 intel_fbo_init(intel); 589 590 if (intel->ctx.Mesa_DXTn) { 591 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); 592 _mesa_enable_extension(ctx, "GL_S3_s3tc"); 593 } 594 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) { 595 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc"); 596 } 597 598 intel->prim.primitive = ~0; 599 600 /* Force all software fallbacks */ 601 if (driQueryOptionb(&intel->optionCache, "no_rast")) { 602 fprintf(stderr, "disabling 3D rasterization\n"); 603 intel->no_rast = 1; 604 } 605 606 /* Disable all hardware rendering (skip emitting batches and fences/waits 607 * to the kernel) 608 */ 609 intel->no_hw = getenv("INTEL_NO_HW") != NULL; 610 611 return GL_TRUE; 612} 613 614void 615intelDestroyContext(__DRIcontextPrivate * driContextPriv) 616{ 617 struct intel_context *intel = 618 (struct intel_context *) driContextPriv->driverPrivate; 619 620 assert(intel); /* should never be null */ 621 if (intel) { 622 GLboolean release_texture_heaps; 623 624 INTEL_FIREVERTICES(intel); 625 626 intel->vtbl.destroy(intel); 627 628 release_texture_heaps = (intel->ctx.Shared->RefCount == 1); 629 _swsetup_DestroyContext(&intel->ctx); 630 _tnl_DestroyContext(&intel->ctx); 631 _vbo_DestroyContext(&intel->ctx); 632 633 _swrast_DestroyContext(&intel->ctx); 634 intel->Fallback = 0; /* don't call _swrast_Flush later */ 635 636 intel_batchbuffer_free(intel->batch); 637 intel->batch = NULL; 638 639 free(intel->prim.vb); 640 intel->prim.vb = NULL; 641 dri_bo_unreference(intel->prim.vb_bo); 642 intel->prim.vb_bo = NULL; 643 644 if (release_texture_heaps) { 645 /* This share group is about to go away, free our private 646 * texture object data. 647 */ 648 if (INTEL_DEBUG & DEBUG_TEXTURE) 649 fprintf(stderr, "do something to free texture heaps\n"); 650 } 651 652 intel_region_release(&intel->front_region); 653 intel_region_release(&intel->back_region); 654 intel_region_release(&intel->depth_region); 655 656 driDestroyOptionCache(&intel->optionCache); 657 658 /* free the Mesa context */ 659 _mesa_free_context_data(&intel->ctx); 660 } 661} 662 663GLboolean 664intelUnbindContext(__DRIcontextPrivate * driContextPriv) 665{ 666 return GL_TRUE; 667} 668 669GLboolean 670intelMakeCurrent(__DRIcontextPrivate * driContextPriv, 671 __DRIdrawablePrivate * driDrawPriv, 672 __DRIdrawablePrivate * driReadPriv) 673{ 674 __DRIscreenPrivate *psp = driDrawPriv->driScreenPriv; 675 676 if (driContextPriv) { 677 struct intel_context *intel = 678 (struct intel_context *) driContextPriv->driverPrivate; 679 struct intel_framebuffer *intel_fb = 680 (struct intel_framebuffer *) driDrawPriv->driverPrivate; 681 GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate; 682 683 if (driContextPriv->driScreenPriv->dri2.enabled) { 684 intel_update_renderbuffers(driContextPriv, driDrawPriv); 685 if (driDrawPriv != driReadPriv) 686 intel_update_renderbuffers(driContextPriv, driReadPriv); 687 } else { 688 /* XXX FBO temporary fix-ups! */ 689 /* if the renderbuffers don't have regions, init them from the context */ 690 struct intel_renderbuffer *irbDepth 691 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH); 692 struct intel_renderbuffer *irbStencil 693 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL); 694 695 if (intel_fb->color_rb[0]) { 696 intel_renderbuffer_set_region(intel_fb->color_rb[0], 697 intel->front_region); 698 } 699 if (intel_fb->color_rb[1]) { 700 intel_renderbuffer_set_region(intel_fb->color_rb[1], 701 intel->back_region); 702 } 703 704 if (irbDepth) { 705 intel_renderbuffer_set_region(irbDepth, intel->depth_region); 706 } 707 if (irbStencil) { 708 intel_renderbuffer_set_region(irbStencil, intel->depth_region); 709 } 710 } 711 712 /* set GLframebuffer size to match window, if needed */ 713 driUpdateFramebufferSize(&intel->ctx, driDrawPriv); 714 715 if (driReadPriv != driDrawPriv) { 716 driUpdateFramebufferSize(&intel->ctx, driReadPriv); 717 } 718 719 _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb); 720 721 /* The drawbuffer won't always be updated by _mesa_make_current: 722 */ 723 if (intel->ctx.DrawBuffer == &intel_fb->Base) { 724 725 if (intel->driReadDrawable != driReadPriv) 726 intel->driReadDrawable = driReadPriv; 727 728 if (intel->driDrawable != driDrawPriv) { 729 if (driDrawPriv->swap_interval == (unsigned)-1) { 730 int i; 731 732 driDrawPriv->vblFlags = (intel->intelScreen->irq_active != 0) 733 ? driGetDefaultVBlankFlags(&intel->optionCache) 734 : VBLANK_FLAG_NO_IRQ; 735 736 /* Prevent error printf if one crtc is disabled, this will 737 * be properly calculated in intelWindowMoved() next. 738 */ 739 driDrawPriv->vblFlags = intelFixupVblank(intel, driDrawPriv); 740 741 (*psp->systemTime->getUST) (&intel_fb->swap_ust); 742 driDrawableInitVBlank(driDrawPriv); 743 intel_fb->vbl_waited = driDrawPriv->vblSeq; 744 745 for (i = 0; i < 2; i++) { 746 if (intel_fb->color_rb[i]) 747 intel_fb->color_rb[i]->vbl_pending = driDrawPriv->vblSeq; 748 } 749 } 750 intel->driDrawable = driDrawPriv; 751 intelWindowMoved(intel); 752 } 753 754 intel_draw_buffer(&intel->ctx, &intel_fb->Base); 755 } 756 } 757 else { 758 _mesa_make_current(NULL, NULL, NULL); 759 } 760 761 return GL_TRUE; 762} 763 764static void 765intelContendedLock(struct intel_context *intel, GLuint flags) 766{ 767 __DRIdrawablePrivate *dPriv = intel->driDrawable; 768 __DRIscreenPrivate *sPriv = intel->driScreen; 769 volatile drm_i915_sarea_t *sarea = intel->sarea; 770 int me = intel->hHWContext; 771 772 drmGetLock(intel->driFd, intel->hHWContext, flags); 773 intel->locked = 1; 774 775 if (INTEL_DEBUG & DEBUG_LOCK) 776 _mesa_printf("%s - got contended lock\n", __progname); 777 778 /* If the window moved, may need to set a new cliprect now. 779 * 780 * NOTE: This releases and regains the hw lock, so all state 781 * checking must be done *after* this call: 782 */ 783 if (dPriv) 784 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv); 785 786 if (sarea && sarea->ctxOwner != me) { 787 if (INTEL_DEBUG & DEBUG_BUFMGR) { 788 fprintf(stderr, "Lost Context: sarea->ctxOwner %x me %x\n", 789 sarea->ctxOwner, me); 790 } 791 sarea->ctxOwner = me; 792 } 793 794 /* If the last consumer of the texture memory wasn't us, notify the fake 795 * bufmgr and record the new owner. We should have the memory shared 796 * between contexts of a single fake bufmgr, but this will at least make 797 * things correct for now. 798 */ 799 if (!intel->ttm && sarea->texAge != intel->hHWContext) { 800 sarea->texAge = intel->hHWContext; 801 intel_bufmgr_fake_contended_lock_take(intel->bufmgr); 802 if (INTEL_DEBUG & DEBUG_BATCH) 803 intel_decode_context_reset(); 804 if (INTEL_DEBUG & DEBUG_BUFMGR) 805 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n", 806 sarea->ctxOwner, intel->hHWContext); 807 } 808 809 /* Drawable changed? 810 */ 811 if (dPriv && intel->lastStamp != dPriv->lastStamp) { 812 intelWindowMoved(intel); 813 intel->lastStamp = dPriv->lastStamp; 814 } 815} 816 817 818_glthread_DECLARE_STATIC_MUTEX(lockMutex); 819 820/* Lock the hardware and validate our state. 821 */ 822void LOCK_HARDWARE( struct intel_context *intel ) 823{ 824 __DRIdrawable *dPriv = intel->driDrawable; 825 __DRIscreen *sPriv = intel->driScreen; 826 char __ret = 0; 827 struct intel_framebuffer *intel_fb = NULL; 828 struct intel_renderbuffer *intel_rb = NULL; 829 830 _glthread_LOCK_MUTEX(lockMutex); 831 assert(!intel->locked); 832 intel->locked = 1; 833 834 if (intel->driDrawable) { 835 intel_fb = intel->driDrawable->driverPrivate; 836 837 if (intel_fb) 838 intel_rb = 839 intel_get_renderbuffer(&intel_fb->Base, 840 intel_fb->Base._ColorDrawBufferIndexes[0]); 841 } 842 843 if (intel_rb && dPriv->vblFlags && 844 !(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) && 845 (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) { 846 drmVBlank vbl; 847 848 vbl.request.type = DRM_VBLANK_ABSOLUTE; 849 850 if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) { 851 vbl.request.type |= DRM_VBLANK_SECONDARY; 852 } 853 854 vbl.request.sequence = intel_rb->vbl_pending; 855 drmWaitVBlank(intel->driFd, &vbl); 856 intel_fb->vbl_waited = vbl.reply.sequence; 857 } 858 859 if (!sPriv->dri2.enabled) { 860 DRM_CAS(intel->driHwLock, intel->hHWContext, 861 (DRM_LOCK_HELD|intel->hHWContext), __ret); 862 863 if (__ret) 864 intelContendedLock( intel, 0 ); 865 } 866 867 868 if (INTEL_DEBUG & DEBUG_LOCK) 869 _mesa_printf("%s - locked\n", __progname); 870} 871 872 873/* Unlock the hardware using the global current context 874 */ 875void UNLOCK_HARDWARE( struct intel_context *intel ) 876{ 877 __DRIscreen *sPriv = intel->driScreen; 878 879 intel->vtbl.note_unlock( intel ); 880 intel->locked = 0; 881 882 if (!sPriv->dri2.enabled) 883 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext); 884 885 _glthread_UNLOCK_MUTEX(lockMutex); 886 887 if (INTEL_DEBUG & DEBUG_LOCK) 888 _mesa_printf("%s - unlocked\n", __progname); 889 890 /** 891 * Nothing should be left in batch outside of LOCK/UNLOCK which references 892 * cliprects. 893 */ 894 if (intel->batch->cliprect_mode == REFERENCES_CLIPRECTS) 895 intel_batchbuffer_flush(intel->batch); 896} 897 898