intel_context.c revision 9f8ed9d66298e2dc5dff508e3ea723469fe06d93
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include "main/glheader.h" 30#include "main/context.h" 31#include "main/extensions.h" 32#include "main/fbobject.h" 33#include "main/framebuffer.h" 34#include "main/imports.h" 35#include "main/points.h" 36#include "main/renderbuffer.h" 37 38#include "swrast/swrast.h" 39#include "swrast_setup/swrast_setup.h" 40#include "tnl/tnl.h" 41#include "drivers/common/driverfuncs.h" 42#include "drivers/common/meta.h" 43 44#include "intel_chipset.h" 45#include "intel_buffers.h" 46#include "intel_tex.h" 47#include "intel_batchbuffer.h" 48#include "intel_clear.h" 49#include "intel_extensions.h" 50#include "intel_pixel.h" 51#include "intel_regions.h" 52#include "intel_buffer_objects.h" 53#include "intel_fbo.h" 54#include "intel_bufmgr.h" 55#include "intel_screen.h" 56#include "intel_mipmap_tree.h" 57 58#include "utils.h" 59#include "../glsl/ralloc.h" 60 61#ifndef INTEL_DEBUG 62int INTEL_DEBUG = (0); 63#endif 64 65 66static const GLubyte * 67intelGetString(struct gl_context * ctx, GLenum name) 68{ 69 const struct intel_context *const intel = intel_context(ctx); 70 const char *chipset; 71 static char buffer[128]; 72 73 switch (name) { 74 case GL_VENDOR: 75 return (GLubyte *) "Tungsten Graphics, Inc"; 76 break; 77 78 case GL_RENDERER: 79 switch (intel->intelScreen->deviceID) { 80 case PCI_CHIP_845_G: 81 chipset = "Intel(R) 845G"; 82 break; 83 case PCI_CHIP_I830_M: 84 chipset = "Intel(R) 830M"; 85 break; 86 case PCI_CHIP_I855_GM: 87 chipset = "Intel(R) 852GM/855GM"; 88 break; 89 case PCI_CHIP_I865_G: 90 chipset = "Intel(R) 865G"; 91 break; 92 case PCI_CHIP_I915_G: 93 chipset = "Intel(R) 915G"; 94 break; 95 case PCI_CHIP_E7221_G: 96 chipset = "Intel (R) E7221G (i915)"; 97 break; 98 case PCI_CHIP_I915_GM: 99 chipset = "Intel(R) 915GM"; 100 break; 101 case PCI_CHIP_I945_G: 102 chipset = "Intel(R) 945G"; 103 break; 104 case PCI_CHIP_I945_GM: 105 chipset = "Intel(R) 945GM"; 106 break; 107 case PCI_CHIP_I945_GME: 108 chipset = "Intel(R) 945GME"; 109 break; 110 case PCI_CHIP_G33_G: 111 chipset = "Intel(R) G33"; 112 break; 113 case PCI_CHIP_Q35_G: 114 chipset = "Intel(R) Q35"; 115 break; 116 case PCI_CHIP_Q33_G: 117 chipset = "Intel(R) Q33"; 118 break; 119 case PCI_CHIP_IGD_GM: 120 case PCI_CHIP_IGD_G: 121 chipset = "Intel(R) IGD"; 122 break; 123 case PCI_CHIP_I965_Q: 124 chipset = "Intel(R) 965Q"; 125 break; 126 case PCI_CHIP_I965_G: 127 case PCI_CHIP_I965_G_1: 128 chipset = "Intel(R) 965G"; 129 break; 130 case PCI_CHIP_I946_GZ: 131 chipset = "Intel(R) 946GZ"; 132 break; 133 case PCI_CHIP_I965_GM: 134 chipset = "Intel(R) 965GM"; 135 break; 136 case PCI_CHIP_I965_GME: 137 chipset = "Intel(R) 965GME/GLE"; 138 break; 139 case PCI_CHIP_GM45_GM: 140 chipset = "Mobile Intel® GM45 Express Chipset"; 141 break; 142 case PCI_CHIP_IGD_E_G: 143 chipset = "Intel(R) Integrated Graphics Device"; 144 break; 145 case PCI_CHIP_G45_G: 146 chipset = "Intel(R) G45/G43"; 147 break; 148 case PCI_CHIP_Q45_G: 149 chipset = "Intel(R) Q45/Q43"; 150 break; 151 case PCI_CHIP_G41_G: 152 chipset = "Intel(R) G41"; 153 break; 154 case PCI_CHIP_B43_G: 155 case PCI_CHIP_B43_G1: 156 chipset = "Intel(R) B43"; 157 break; 158 case PCI_CHIP_ILD_G: 159 chipset = "Intel(R) Ironlake Desktop"; 160 break; 161 case PCI_CHIP_ILM_G: 162 chipset = "Intel(R) Ironlake Mobile"; 163 break; 164 case PCI_CHIP_SANDYBRIDGE_GT1: 165 case PCI_CHIP_SANDYBRIDGE_GT2: 166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS: 167 chipset = "Intel(R) Sandybridge Desktop"; 168 break; 169 case PCI_CHIP_SANDYBRIDGE_M_GT1: 170 case PCI_CHIP_SANDYBRIDGE_M_GT2: 171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS: 172 chipset = "Intel(R) Sandybridge Mobile"; 173 break; 174 case PCI_CHIP_SANDYBRIDGE_S: 175 chipset = "Intel(R) Sandybridge Server"; 176 break; 177 case PCI_CHIP_IVYBRIDGE_GT1: 178 case PCI_CHIP_IVYBRIDGE_GT2: 179 chipset = "Intel(R) Ivybridge Desktop"; 180 break; 181 case PCI_CHIP_IVYBRIDGE_M_GT1: 182 case PCI_CHIP_IVYBRIDGE_M_GT2: 183 chipset = "Intel(R) Ivybridge Mobile"; 184 break; 185 case PCI_CHIP_IVYBRIDGE_S_GT1: 186 chipset = "Intel(R) Ivybridge Server"; 187 break; 188 default: 189 chipset = "Unknown Intel Chipset"; 190 break; 191 } 192 193 (void) driGetRendererString(buffer, chipset, 0); 194 return (GLubyte *) buffer; 195 196 default: 197 return NULL; 198 } 199} 200 201static void 202intel_flush_front(struct gl_context *ctx) 203{ 204 struct intel_context *intel = intel_context(ctx); 205 __DRIcontext *driContext = intel->driContext; 206 __DRIscreen *const screen = intel->intelScreen->driScrnPriv; 207 208 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) { 209 if (screen->dri2.loader && 210 (screen->dri2.loader->base.version >= 2) 211 && (screen->dri2.loader->flushFrontBuffer != NULL) && 212 driContext->driDrawablePriv && 213 driContext->driDrawablePriv->loaderPrivate) { 214 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv, 215 driContext->driDrawablePriv->loaderPrivate); 216 217 /* We set the dirty bit in intel_prepare_render() if we're 218 * front buffer rendering once we get there. 219 */ 220 intel->front_buffer_dirty = false; 221 } 222 } 223} 224 225static unsigned 226intel_bits_per_pixel(const struct intel_renderbuffer *rb) 227{ 228 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; 229} 230 231static void 232intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel, 233 __DRIdrawable *drawable, 234 __DRIbuffer **buffers, 235 int *count); 236 237static void 238intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel, 239 __DRIdrawable *drawable, 240 __DRIbuffer *buffer, 241 struct intel_renderbuffer *rb, 242 const char *buffer_name); 243 244static void 245intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel, 246 __DRIdrawable *drawable, 247 __DRIbuffer **buffers, 248 unsigned **attachments, 249 int *count); 250 251static void 252intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel, 253 __DRIdrawable *drawable, 254 __DRIbuffer *buffer, 255 struct intel_renderbuffer *rb, 256 const char *buffer_name); 257static void 258intel_verify_dri2_has_hiz(struct intel_context *intel, 259 __DRIdrawable *drawable, 260 __DRIbuffer **buffers, 261 unsigned **attachments, 262 int *count); 263 264void 265intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 266{ 267 struct gl_framebuffer *fb = drawable->driverPrivate; 268 struct intel_renderbuffer *rb; 269 struct intel_context *intel = context->driverPrivate; 270 __DRIbuffer *buffers = NULL; 271 unsigned *attachments = NULL; 272 int i, count; 273 const char *region_name; 274 275 bool try_separate_stencil = 276 intel->has_separate_stencil && 277 intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE && 278 intel->intelScreen->driScrnPriv->dri2.loader != NULL && 279 intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 && 280 intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL; 281 282 assert(!intel->must_use_separate_stencil || try_separate_stencil); 283 284 /* If we're rendering to the fake front buffer, make sure all the 285 * pending drawing has landed on the real front buffer. Otherwise 286 * when we eventually get to DRI2GetBuffersWithFormat the stale 287 * real front buffer contents will get copied to the new fake front 288 * buffer. 289 */ 290 if (intel->is_front_buffer_rendering) { 291 intel_flush(&intel->ctx); 292 intel_flush_front(&intel->ctx); 293 } 294 295 /* Set this up front, so that in case our buffers get invalidated 296 * while we're getting new buffers, we don't clobber the stamp and 297 * thus ignore the invalidate. */ 298 drawable->lastStamp = drawable->dri2.stamp; 299 300 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 301 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 302 303 if (try_separate_stencil) { 304 intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers, 305 &attachments, &count); 306 } else { 307 intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers, 308 &count); 309 } 310 311 if (buffers == NULL) 312 return; 313 314 for (i = 0; i < count; i++) { 315 switch (buffers[i].attachment) { 316 case __DRI_BUFFER_FRONT_LEFT: 317 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 318 region_name = "dri2 front buffer"; 319 break; 320 321 case __DRI_BUFFER_FAKE_FRONT_LEFT: 322 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 323 region_name = "dri2 fake front buffer"; 324 break; 325 326 case __DRI_BUFFER_BACK_LEFT: 327 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 328 region_name = "dri2 back buffer"; 329 break; 330 331 case __DRI_BUFFER_DEPTH: 332 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 333 region_name = "dri2 depth buffer"; 334 break; 335 336 case __DRI_BUFFER_HIZ: 337 /* The hiz region resides in the depth renderbuffer. */ 338 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 339 region_name = "dri2 hiz buffer"; 340 break; 341 342 case __DRI_BUFFER_DEPTH_STENCIL: 343 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 344 region_name = "dri2 depth / stencil buffer"; 345 break; 346 347 case __DRI_BUFFER_STENCIL: 348 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 349 region_name = "dri2 stencil buffer"; 350 break; 351 352 case __DRI_BUFFER_ACCUM: 353 default: 354 fprintf(stderr, 355 "unhandled buffer attach event, attachment type %d\n", 356 buffers[i].attachment); 357 return; 358 } 359 360 if (try_separate_stencil) { 361 intel_process_dri2_buffer_with_separate_stencil(intel, drawable, 362 &buffers[i], rb, 363 region_name); 364 } else { 365 intel_process_dri2_buffer_no_separate_stencil(intel, drawable, 366 &buffers[i], rb, 367 region_name); 368 } 369 } 370 371 if (try_separate_stencil 372 && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) { 373 intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments, 374 &count); 375 } 376 377 if (attachments) 378 free(attachments); 379 380 driUpdateFramebufferSize(&intel->ctx, drawable); 381} 382 383/** 384 * intel_prepare_render should be called anywhere that curent read/drawbuffer 385 * state is required. 386 */ 387void 388intel_prepare_render(struct intel_context *intel) 389{ 390 __DRIcontext *driContext = intel->driContext; 391 __DRIdrawable *drawable; 392 393 drawable = driContext->driDrawablePriv; 394 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) { 395 if (drawable->lastStamp != drawable->dri2.stamp) 396 intel_update_renderbuffers(driContext, drawable); 397 intel_draw_buffer(&intel->ctx); 398 driContext->dri2.draw_stamp = drawable->dri2.stamp; 399 } 400 401 drawable = driContext->driReadablePriv; 402 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) { 403 if (drawable->lastStamp != drawable->dri2.stamp) 404 intel_update_renderbuffers(driContext, drawable); 405 driContext->dri2.read_stamp = drawable->dri2.stamp; 406 } 407 408 /* If we're currently rendering to the front buffer, the rendering 409 * that will happen next will probably dirty the front buffer. So 410 * mark it as dirty here. 411 */ 412 if (intel->is_front_buffer_rendering) 413 intel->front_buffer_dirty = true; 414 415 /* Wait for the swapbuffers before the one we just emitted, so we 416 * don't get too many swaps outstanding for apps that are GPU-heavy 417 * but not CPU-heavy. 418 * 419 * We're using intelDRI2Flush (called from the loader before 420 * swapbuffer) and glFlush (for front buffer rendering) as the 421 * indicator that a frame is done and then throttle when we get 422 * here as we prepare to render the next frame. At this point for 423 * round trips for swap/copy and getting new buffers are done and 424 * we'll spend less time waiting on the GPU. 425 * 426 * Unfortunately, we don't have a handle to the batch containing 427 * the swap, and getting our hands on that doesn't seem worth it, 428 * so we just us the first batch we emitted after the last swap. 429 */ 430 if (intel->need_throttle && intel->first_post_swapbuffers_batch) { 431 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch); 432 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch); 433 intel->first_post_swapbuffers_batch = NULL; 434 intel->need_throttle = false; 435 } 436} 437 438static void 439intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h) 440{ 441 struct intel_context *intel = intel_context(ctx); 442 __DRIcontext *driContext = intel->driContext; 443 444 if (intel->saved_viewport) 445 intel->saved_viewport(ctx, x, y, w, h); 446 447 if (ctx->DrawBuffer->Name == 0) { 448 dri2InvalidateDrawable(driContext->driDrawablePriv); 449 dri2InvalidateDrawable(driContext->driReadablePriv); 450 } 451} 452 453static const struct dri_debug_control debug_control[] = { 454 { "tex", DEBUG_TEXTURE}, 455 { "state", DEBUG_STATE}, 456 { "ioctl", DEBUG_IOCTL}, 457 { "blit", DEBUG_BLIT}, 458 { "mip", DEBUG_MIPTREE}, 459 { "fall", DEBUG_FALLBACKS}, 460 { "verb", DEBUG_VERBOSE}, 461 { "bat", DEBUG_BATCH}, 462 { "pix", DEBUG_PIXEL}, 463 { "buf", DEBUG_BUFMGR}, 464 { "reg", DEBUG_REGION}, 465 { "fbo", DEBUG_FBO}, 466 { "gs", DEBUG_GS}, 467 { "sync", DEBUG_SYNC}, 468 { "prim", DEBUG_PRIMS }, 469 { "vert", DEBUG_VERTS }, 470 { "dri", DEBUG_DRI }, 471 { "sf", DEBUG_SF }, 472 { "san", DEBUG_SANITY }, 473 { "sleep", DEBUG_SLEEP }, 474 { "stats", DEBUG_STATS }, 475 { "tile", DEBUG_TILE }, 476 { "wm", DEBUG_WM }, 477 { "urb", DEBUG_URB }, 478 { "vs", DEBUG_VS }, 479 { "clip", DEBUG_CLIP }, 480 { NULL, 0 } 481}; 482 483 484static void 485intelInvalidateState(struct gl_context * ctx, GLuint new_state) 486{ 487 struct intel_context *intel = intel_context(ctx); 488 489 _swrast_InvalidateState(ctx, new_state); 490 _vbo_InvalidateState(ctx, new_state); 491 492 intel->NewGLState |= new_state; 493 494 if (intel->vtbl.invalidate_state) 495 intel->vtbl.invalidate_state( intel, new_state ); 496} 497 498void 499intel_flush_rendering_to_batch(struct gl_context *ctx) 500{ 501 struct intel_context *intel = intel_context(ctx); 502 503 if (intel->Fallback) 504 _swrast_flush(ctx); 505 506 if (intel->gen < 4) 507 INTEL_FIREVERTICES(intel); 508} 509 510void 511_intel_flush(struct gl_context *ctx, const char *file, int line) 512{ 513 struct intel_context *intel = intel_context(ctx); 514 515 intel_flush_rendering_to_batch(ctx); 516 517 if (intel->batch.used) 518 _intel_batchbuffer_flush(intel, file, line); 519} 520 521static void 522intel_glFlush(struct gl_context *ctx) 523{ 524 struct intel_context *intel = intel_context(ctx); 525 526 intel_flush(ctx); 527 intel_flush_front(ctx); 528 if (intel->is_front_buffer_rendering) 529 intel->need_throttle = true; 530} 531 532void 533intelFinish(struct gl_context * ctx) 534{ 535 struct intel_context *intel = intel_context(ctx); 536 537 intel_flush(ctx); 538 intel_flush_front(ctx); 539 540 if (intel->batch.last_bo) 541 drm_intel_bo_wait_rendering(intel->batch.last_bo); 542} 543 544void 545intelInitDriverFunctions(struct dd_function_table *functions) 546{ 547 _mesa_init_driver_functions(functions); 548 549 functions->Flush = intel_glFlush; 550 functions->Finish = intelFinish; 551 functions->GetString = intelGetString; 552 functions->UpdateState = intelInvalidateState; 553 554 intelInitTextureFuncs(functions); 555 intelInitTextureImageFuncs(functions); 556 intelInitTextureSubImageFuncs(functions); 557 intelInitTextureCopyImageFuncs(functions); 558 intelInitStateFuncs(functions); 559 intelInitClearFuncs(functions); 560 intelInitBufferFuncs(functions); 561 intelInitPixelFuncs(functions); 562 intelInitBufferObjectFuncs(functions); 563 intel_init_syncobj_functions(functions); 564} 565 566bool 567intelInitContext(struct intel_context *intel, 568 int api, 569 const struct gl_config * mesaVis, 570 __DRIcontext * driContextPriv, 571 void *sharedContextPrivate, 572 struct dd_function_table *functions) 573{ 574 struct gl_context *ctx = &intel->ctx; 575 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; 576 __DRIscreen *sPriv = driContextPriv->driScreenPriv; 577 struct intel_screen *intelScreen = sPriv->driverPrivate; 578 int bo_reuse_mode; 579 struct gl_config visual; 580 581 /* we can't do anything without a connection to the device */ 582 if (intelScreen->bufmgr == NULL) 583 return false; 584 585 /* Can't rely on invalidate events, fall back to glViewport hack */ 586 if (!driContextPriv->driScreenPriv->dri2.useInvalidate) { 587 intel->saved_viewport = functions->Viewport; 588 functions->Viewport = intel_viewport; 589 } 590 591 if (mesaVis == NULL) { 592 memset(&visual, 0, sizeof visual); 593 mesaVis = &visual; 594 } 595 596 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx, 597 functions, (void *) intel)) { 598 printf("%s: failed to init mesa context\n", __FUNCTION__); 599 return false; 600 } 601 602 driContextPriv->driverPrivate = intel; 603 intel->intelScreen = intelScreen; 604 intel->driContext = driContextPriv; 605 intel->driFd = sPriv->fd; 606 607 intel->gen = intelScreen->gen; 608 609 const int devID = intelScreen->deviceID; 610 611 if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID)) 612 intel->gt = 1; 613 else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID)) 614 intel->gt = 2; 615 else 616 intel->gt = 0; 617 618 if (IS_G4X(devID)) { 619 intel->is_g4x = true; 620 } else if (IS_945(devID)) { 621 intel->is_945 = true; 622 } 623 624 if (intel->gen >= 5) { 625 intel->needs_ff_sync = true; 626 } 627 628 intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil; 629 intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil; 630 intel->has_hiz = intel->intelScreen->hw_has_hiz; 631 632 memset(&ctx->TextureFormatSupported, 633 0, sizeof(ctx->TextureFormatSupported)); 634 635 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, 636 sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915"); 637 if (intel->gen < 4) 638 intel->maxBatchSize = 4096; 639 else 640 intel->maxBatchSize = sizeof(intel->batch.map); 641 642 intel->bufmgr = intelScreen->bufmgr; 643 644 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); 645 switch (bo_reuse_mode) { 646 case DRI_CONF_BO_REUSE_DISABLED: 647 break; 648 case DRI_CONF_BO_REUSE_ALL: 649 intel_bufmgr_gem_enable_reuse(intel->bufmgr); 650 break; 651 } 652 653 /* This doesn't yet catch all non-conformant rendering, but it's a 654 * start. 655 */ 656 if (getenv("INTEL_STRICT_CONFORMANCE")) { 657 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE")); 658 if (value > 0) { 659 intel->conformance_mode = value; 660 } 661 else { 662 intel->conformance_mode = 1; 663 } 664 } 665 666 if (intel->conformance_mode > 0) { 667 ctx->Const.MinLineWidth = 1.0; 668 ctx->Const.MinLineWidthAA = 1.0; 669 ctx->Const.MaxLineWidth = 1.0; 670 ctx->Const.MaxLineWidthAA = 1.0; 671 ctx->Const.LineWidthGranularity = 1.0; 672 } 673 else { 674 ctx->Const.MinLineWidth = 1.0; 675 ctx->Const.MinLineWidthAA = 1.0; 676 ctx->Const.MaxLineWidth = 5.0; 677 ctx->Const.MaxLineWidthAA = 5.0; 678 ctx->Const.LineWidthGranularity = 0.5; 679 } 680 681 ctx->Const.MinPointSize = 1.0; 682 ctx->Const.MinPointSizeAA = 1.0; 683 ctx->Const.MaxPointSize = 255.0; 684 ctx->Const.MaxPointSizeAA = 3.0; 685 ctx->Const.PointSizeGranularity = 1.0; 686 687 ctx->Const.MaxSamples = 1.0; 688 689 if (intel->gen >= 6) 690 ctx->Const.MaxClipPlanes = 8; 691 692 ctx->Const.StripTextureBorder = GL_TRUE; 693 694 /* reinitialize the context point state. 695 * It depend on constants in __struct gl_contextRec::Const 696 */ 697 _mesa_init_point(ctx); 698 699 if (intel->gen >= 4) { 700 ctx->Const.sRGBCapable = true; 701 if (MAX_WIDTH > 8192) 702 ctx->Const.MaxRenderbufferSize = 8192; 703 } else { 704 if (MAX_WIDTH > 2048) 705 ctx->Const.MaxRenderbufferSize = 2048; 706 } 707 708 /* Initialize the software rasterizer and helper modules. */ 709 _swrast_CreateContext(ctx); 710 _vbo_CreateContext(ctx); 711 _tnl_CreateContext(ctx); 712 _swsetup_CreateContext(ctx); 713 714 /* Configure swrast to match hardware characteristics: */ 715 _swrast_allow_pixel_fog(ctx, false); 716 _swrast_allow_vertex_fog(ctx, true); 717 718 _mesa_meta_init(ctx); 719 720 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24; 721 intel->hw_stipple = 1; 722 723 /* XXX FBO: this doesn't seem to be used anywhere */ 724 switch (mesaVis->depthBits) { 725 case 0: /* what to do in this case? */ 726 case 16: 727 intel->polygon_offset_scale = 1.0; 728 break; 729 case 24: 730 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */ 731 break; 732 default: 733 assert(0); 734 break; 735 } 736 737 if (intel->gen >= 4) 738 intel->polygon_offset_scale /= 0xffff; 739 740 intel->RenderIndex = ~0; 741 742 switch (ctx->API) { 743 case API_OPENGL: 744 intelInitExtensions(ctx); 745 break; 746 case API_OPENGLES: 747 intelInitExtensionsES1(ctx); 748 break; 749 case API_OPENGLES2: 750 intelInitExtensionsES2(ctx); 751 break; 752 } 753 754 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control); 755 if (INTEL_DEBUG & DEBUG_BUFMGR) 756 dri_bufmgr_set_debug(intel->bufmgr, true); 757 758 intel_batchbuffer_init(intel); 759 760 intel_fbo_init(intel); 761 762 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache, 763 "texture_tiling"); 764 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z"); 765 766 intel->prim.primitive = ~0; 767 768 /* Force all software fallbacks */ 769 if (driQueryOptionb(&intel->optionCache, "no_rast")) { 770 fprintf(stderr, "disabling 3D rasterization\n"); 771 intel->no_rast = 1; 772 } 773 774 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) { 775 fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); 776 intel->always_flush_batch = 1; 777 } 778 779 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) { 780 fprintf(stderr, "flushing GPU caches before/after each draw call\n"); 781 intel->always_flush_cache = 1; 782 } 783 784 return true; 785} 786 787void 788intelDestroyContext(__DRIcontext * driContextPriv) 789{ 790 struct intel_context *intel = 791 (struct intel_context *) driContextPriv->driverPrivate; 792 793 assert(intel); /* should never be null */ 794 if (intel) { 795 INTEL_FIREVERTICES(intel); 796 797 _mesa_meta_free(&intel->ctx); 798 799 intel->vtbl.destroy(intel); 800 801 _swsetup_DestroyContext(&intel->ctx); 802 _tnl_DestroyContext(&intel->ctx); 803 _vbo_DestroyContext(&intel->ctx); 804 805 _swrast_DestroyContext(&intel->ctx); 806 intel->Fallback = 0x0; /* don't call _swrast_Flush later */ 807 808 intel_batchbuffer_free(intel); 809 810 free(intel->prim.vb); 811 intel->prim.vb = NULL; 812 drm_intel_bo_unreference(intel->prim.vb_bo); 813 intel->prim.vb_bo = NULL; 814 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch); 815 intel->first_post_swapbuffers_batch = NULL; 816 817 driDestroyOptionCache(&intel->optionCache); 818 819 /* free the Mesa context */ 820 _mesa_free_context_data(&intel->ctx); 821 822 _math_matrix_dtr(&intel->ViewportMatrix); 823 824 ralloc_free(intel); 825 driContextPriv->driverPrivate = NULL; 826 } 827} 828 829GLboolean 830intelUnbindContext(__DRIcontext * driContextPriv) 831{ 832 /* Unset current context and dispath table */ 833 _mesa_make_current(NULL, NULL, NULL); 834 835 return true; 836} 837 838GLboolean 839intelMakeCurrent(__DRIcontext * driContextPriv, 840 __DRIdrawable * driDrawPriv, 841 __DRIdrawable * driReadPriv) 842{ 843 struct intel_context *intel; 844 GET_CURRENT_CONTEXT(curCtx); 845 846 if (driContextPriv) 847 intel = (struct intel_context *) driContextPriv->driverPrivate; 848 else 849 intel = NULL; 850 851 /* According to the glXMakeCurrent() man page: "Pending commands to 852 * the previous context, if any, are flushed before it is released." 853 * But only flush if we're actually changing contexts. 854 */ 855 if (intel_context(curCtx) && intel_context(curCtx) != intel) { 856 _mesa_flush(curCtx); 857 } 858 859 if (driContextPriv) { 860 struct gl_framebuffer *fb, *readFb; 861 862 if (driDrawPriv == NULL && driReadPriv == NULL) { 863 fb = _mesa_get_incomplete_framebuffer(); 864 readFb = _mesa_get_incomplete_framebuffer(); 865 } else { 866 fb = driDrawPriv->driverPrivate; 867 readFb = driReadPriv->driverPrivate; 868 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1; 869 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1; 870 } 871 872 intel_prepare_render(intel); 873 _mesa_make_current(&intel->ctx, fb, readFb); 874 875 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer 876 * is NULL at that point. We can't call _mesa_makecurrent() 877 * first, since we need the buffer size for the initial 878 * viewport. So just call intel_draw_buffer() again here. */ 879 intel_draw_buffer(&intel->ctx); 880 } 881 else { 882 _mesa_make_current(NULL, NULL, NULL); 883 } 884 885 return true; 886} 887 888/** 889 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 890 * 891 * To determine which DRI buffers to request, examine the renderbuffers 892 * attached to the drawable's framebuffer. Then request the buffers with 893 * DRI2GetBuffers() or DRI2GetBuffersWithFormat(). 894 * 895 * This is called from intel_update_renderbuffers(). It is used only if either 896 * the hardware or the X driver lacks separate stencil support. 897 * 898 * \param drawable Drawable whose buffers are queried. 899 * \param buffers [out] List of buffers returned by DRI2 query. 900 * \param buffer_count [out] Number of buffers returned. 901 * 902 * \see intel_update_renderbuffers() 903 * \see DRI2GetBuffers() 904 * \see DRI2GetBuffersWithFormat() 905 */ 906static void 907intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel, 908 __DRIdrawable *drawable, 909 __DRIbuffer **buffers, 910 int *buffer_count) 911{ 912 assert(!intel->must_use_separate_stencil); 913 914 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 915 struct gl_framebuffer *fb = drawable->driverPrivate; 916 917 if (screen->dri2.loader 918 && screen->dri2.loader->base.version > 2 919 && screen->dri2.loader->getBuffersWithFormat != NULL) { 920 921 int i = 0; 922 const int max_attachments = 4; 923 unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned)); 924 925 struct intel_renderbuffer *front_rb; 926 struct intel_renderbuffer *back_rb; 927 struct intel_renderbuffer *depth_rb; 928 struct intel_renderbuffer *stencil_rb; 929 930 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 931 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 932 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 933 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 934 935 if ((intel->is_front_buffer_rendering || 936 intel->is_front_buffer_reading || 937 !back_rb) && front_rb) { 938 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 939 attachments[i++] = intel_bits_per_pixel(front_rb); 940 } 941 942 if (back_rb) { 943 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 944 attachments[i++] = intel_bits_per_pixel(back_rb); 945 } 946 947 if (depth_rb && stencil_rb) { 948 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL; 949 attachments[i++] = intel_bits_per_pixel(depth_rb); 950 } else if (depth_rb) { 951 attachments[i++] = __DRI_BUFFER_DEPTH; 952 attachments[i++] = intel_bits_per_pixel(depth_rb); 953 } else if (stencil_rb) { 954 attachments[i++] = __DRI_BUFFER_STENCIL; 955 attachments[i++] = intel_bits_per_pixel(stencil_rb); 956 } 957 958 assert(i <= 2 * max_attachments); 959 960 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 961 &drawable->w, 962 &drawable->h, 963 attachments, i / 2, 964 buffer_count, 965 drawable->loaderPrivate); 966 free(attachments); 967 968 } else if (screen->dri2.loader) { 969 970 int i = 0; 971 const int max_attachments = 4; 972 unsigned *attachments = calloc(max_attachments, sizeof(unsigned)); 973 974 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT)) 975 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 976 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT)) 977 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 978 if (intel_get_renderbuffer(fb, BUFFER_DEPTH)) 979 attachments[i++] = __DRI_BUFFER_DEPTH; 980 if (intel_get_renderbuffer(fb, BUFFER_STENCIL)) 981 attachments[i++] = __DRI_BUFFER_STENCIL; 982 983 assert(i <= max_attachments); 984 985 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 986 &drawable->w, 987 &drawable->h, 988 attachments, i, 989 buffer_count, 990 drawable->loaderPrivate); 991 free(attachments); 992 993 } else { 994 *buffers = NULL; 995 *buffer_count = 0; 996 } 997} 998 999/** 1000 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1001 * 1002 * This is called from intel_update_renderbuffers(). It is used only if 1003 * either the hardware or the X driver lacks separate stencil support. 1004 * 1005 * \par Note: 1006 * DRI buffers whose attachment point is DRI2BufferStencil or 1007 * DRI2BufferDepthStencil are handled as special cases. 1008 * 1009 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1010 * that is passed to intel_region_alloc_for_handle(). 1011 * 1012 * \see intel_update_renderbuffers() 1013 * \see intel_region_alloc_for_handle() 1014 */ 1015static void 1016intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel, 1017 __DRIdrawable *drawable, 1018 __DRIbuffer *buffer, 1019 struct intel_renderbuffer *rb, 1020 const char *buffer_name) 1021{ 1022 assert(!intel->must_use_separate_stencil); 1023 1024 struct gl_framebuffer *fb = drawable->driverPrivate; 1025 struct intel_renderbuffer *depth_rb = NULL; 1026 1027 if (!rb) 1028 return; 1029 1030 if (rb->mt && 1031 rb->mt->region && 1032 rb->mt->region->name == buffer->name) 1033 return; 1034 1035 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1036 fprintf(stderr, 1037 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1038 buffer->name, buffer->attachment, 1039 buffer->cpp, buffer->pitch); 1040 } 1041 1042 bool identify_depth_and_stencil = false; 1043 if (buffer->attachment == __DRI_BUFFER_STENCIL) { 1044 struct intel_renderbuffer *depth_rb = 1045 intel_get_renderbuffer(fb, BUFFER_DEPTH); 1046 identify_depth_and_stencil = depth_rb && depth_rb->mt; 1047 } 1048 1049 if (identify_depth_and_stencil) { 1050 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1051 fprintf(stderr, "(reusing depth buffer as stencil)\n"); 1052 } 1053 intel_miptree_reference(&rb->mt, depth_rb->mt); 1054 } else { 1055 intel_miptree_release(&rb->mt); 1056 struct intel_region *region = 1057 intel_region_alloc_for_handle(intel->intelScreen, 1058 buffer->cpp, 1059 drawable->w, 1060 drawable->h, 1061 buffer->pitch / buffer->cpp, 1062 buffer->name, 1063 buffer_name); 1064 if (!region) 1065 return; 1066 1067 rb->mt = intel_miptree_create_for_region(intel, 1068 GL_TEXTURE_2D, 1069 intel_rb_format(rb), 1070 region); 1071 intel_region_release(®ion); 1072 if (!rb->mt) 1073 return; 1074 } 1075 1076 if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) { 1077 struct intel_renderbuffer *stencil_rb = 1078 intel_get_renderbuffer(fb, BUFFER_STENCIL); 1079 1080 if (!stencil_rb) 1081 return; 1082 1083 /* The rb passed in is the BUFFER_DEPTH attachment, and we need 1084 * to associate this region to BUFFER_STENCIL as well. 1085 */ 1086 intel_miptree_reference(&stencil_rb->mt, rb->mt); 1087 } 1088} 1089 1090/** 1091 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 1092 * 1093 * To determine which DRI buffers to request, examine the renderbuffers 1094 * attached to the drawable's framebuffer. Then request the buffers with 1095 * DRI2GetBuffersWithFormat(). 1096 * 1097 * This is called from intel_update_renderbuffers(). It is used when 1) the 1098 * hardware supports separate stencil and 2) the X driver's separate stencil 1099 * support has been verified to work or is still unknown. 1100 * 1101 * \param drawable Drawable whose buffers are queried. 1102 * \param buffers [out] List of buffers returned by DRI2 query. 1103 * \param buffer_count [out] Number of buffers returned. 1104 * \param attachments [out] List of pairs (attachment_point, bits_per_pixel) 1105 * that were submitted in the DRI2 query. Number of pairs 1106 * is same as buffer_count. 1107 * 1108 * \see intel_update_renderbuffers() 1109 * \see DRI2GetBuffersWithFormat() 1110 * \see enum intel_dri2_has_hiz 1111 */ 1112static void 1113intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel, 1114 __DRIdrawable *drawable, 1115 __DRIbuffer **buffers, 1116 unsigned **attachments, 1117 int *count) 1118{ 1119 assert(intel->has_separate_stencil); 1120 1121 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 1122 struct gl_framebuffer *fb = drawable->driverPrivate; 1123 1124 const int max_attachments = 5; 1125 int i = 0; 1126 1127 *attachments = calloc(2 * max_attachments, sizeof(unsigned)); 1128 if (!*attachments) { 1129 *buffers = NULL; 1130 *count = 0; 1131 return; 1132 } 1133 1134 struct intel_renderbuffer *front_rb; 1135 struct intel_renderbuffer *back_rb; 1136 struct intel_renderbuffer *depth_rb; 1137 struct intel_renderbuffer *stencil_rb; 1138 1139 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1140 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1141 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 1142 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 1143 1144 if ((intel->is_front_buffer_rendering || 1145 intel->is_front_buffer_reading || 1146 !back_rb) && front_rb) { 1147 (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT; 1148 (*attachments)[i++] = intel_bits_per_pixel(front_rb); 1149 } 1150 1151 if (back_rb) { 1152 (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT; 1153 (*attachments)[i++] = intel_bits_per_pixel(back_rb); 1154 } 1155 1156 /* 1157 * We request a separate stencil buffer, and perhaps a hiz buffer too, even 1158 * if we do not yet know if the X driver supports it. See the comments for 1159 * 'enum intel_dri2_has_hiz'. 1160 */ 1161 1162 if (depth_rb) { 1163 (*attachments)[i++] = __DRI_BUFFER_DEPTH; 1164 (*attachments)[i++] = intel_bits_per_pixel(depth_rb); 1165 1166 if (intel->vtbl.is_hiz_depth_format(intel, intel_rb_format(depth_rb))) { 1167 /* Depth and hiz buffer have same bpp. */ 1168 (*attachments)[i++] = __DRI_BUFFER_HIZ; 1169 (*attachments)[i++] = intel_bits_per_pixel(depth_rb); 1170 } 1171 } 1172 1173 if (stencil_rb) { 1174 assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8); 1175 (*attachments)[i++] = __DRI_BUFFER_STENCIL; 1176 (*attachments)[i++] = intel_bits_per_pixel(stencil_rb); 1177 } 1178 1179 assert(i <= 2 * max_attachments); 1180 1181 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1182 &drawable->w, 1183 &drawable->h, 1184 *attachments, i / 2, 1185 count, 1186 drawable->loaderPrivate); 1187 1188 if (!*buffers) { 1189 free(*attachments); 1190 *attachments = NULL; 1191 *count = 0; 1192 } 1193} 1194 1195/** 1196 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1197 * 1198 * This is called from intel_update_renderbuffers(). It is used when 1) the 1199 * hardware supports separate stencil and 2) the X driver's separate stencil 1200 * support has been verified to work or is still unknown. 1201 * 1202 * \par Note: 1203 * DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz 1204 * are handled as special cases. 1205 * 1206 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1207 * that is passed to intel_region_alloc_for_handle(). 1208 * 1209 * \see intel_update_renderbuffers() 1210 * \see intel_region_alloc_for_handle() 1211 * \see enum intel_dri2_has_hiz 1212 */ 1213static void 1214intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel, 1215 __DRIdrawable *drawable, 1216 __DRIbuffer *buffer, 1217 struct intel_renderbuffer *rb, 1218 const char *buffer_name) 1219{ 1220 assert(intel->has_separate_stencil); 1221 assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL); 1222 1223 if (!rb) 1224 return; 1225 1226 /* If the renderbuffer's and DRIbuffer's regions match, then continue. */ 1227 if ((buffer->attachment != __DRI_BUFFER_HIZ && 1228 rb->mt && 1229 rb->mt->region && 1230 rb->mt->region->name == buffer->name) || 1231 (buffer->attachment == __DRI_BUFFER_HIZ && 1232 rb->mt && 1233 rb->mt->hiz_mt && 1234 rb->mt->hiz_mt->region->name == buffer->name)) { 1235 return; 1236 } 1237 1238 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1239 fprintf(stderr, 1240 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1241 buffer->name, buffer->attachment, 1242 buffer->cpp, buffer->pitch); 1243 } 1244 1245 int buffer_width; 1246 int buffer_height; 1247 if (buffer->attachment == __DRI_BUFFER_STENCIL) { 1248 /* The stencil buffer has quirky pitch requirements. From Section 1249 * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch": 1250 * The pitch must be set to 2x the value computed based on width, as 1251 * the stencil buffer is stored with two rows interleaved. 1252 * 1253 * To satisfy the pitch requirement, the X driver allocated the region 1254 * with the following dimensions. 1255 */ 1256 buffer_width = ALIGN(drawable->w, 64); 1257 buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64); 1258 } else { 1259 buffer_width = drawable->w; 1260 buffer_height = drawable->h; 1261 } 1262 1263 /* Release the buffer storage now in case we have to return early 1264 * due to failure to allocate new storage. 1265 */ 1266 if (buffer->attachment == __DRI_BUFFER_HIZ) { 1267 intel_miptree_release(&rb->mt->hiz_mt); 1268 } else { 1269 intel_miptree_release(&rb->mt); 1270 } 1271 1272 struct intel_region *region = 1273 intel_region_alloc_for_handle(intel->intelScreen, 1274 buffer->cpp, 1275 buffer_width, 1276 buffer_height, 1277 buffer->pitch / buffer->cpp, 1278 buffer->name, 1279 buffer_name); 1280 if (!region) 1281 return; 1282 1283 struct intel_mipmap_tree *mt = 1284 intel_miptree_create_for_region(intel, 1285 GL_TEXTURE_2D, 1286 intel_rb_format(rb), 1287 region); 1288 intel_region_release(®ion); 1289 1290 /* Associate buffer with new storage. */ 1291 if (buffer->attachment == __DRI_BUFFER_HIZ) { 1292 rb->mt->hiz_mt = mt; 1293 } else { 1294 rb->mt = mt; 1295 } 1296} 1297 1298/** 1299 * \brief Verify that the X driver supports hiz and separate stencil. 1300 * 1301 * This implements the cleanup stage of the handshake described in the 1302 * comments for 'enum intel_dri2_has_hiz'. 1303 * 1304 * This should be called from intel_update_renderbuffers() after 1) the 1305 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat() 1306 * and 2) the DRM region of each returned DRIbuffer has been assigned to the 1307 * appropriate intel_renderbuffer. Furthermore, this should be called *only* 1308 * when 1) intel_update_renderbuffers() tried to used the X driver's separate 1309 * stencil functionality and 2) it has not yet been determined if the X driver 1310 * supports separate stencil. 1311 * 1312 * If we determine that the X driver does have support, then we set 1313 * intel_screen.dri2_has_hiz to true and return. 1314 * 1315 * If we determine that the X driver lacks support, and we requested 1316 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by 1317 * taking the following actions: 1318 * 1. Discard the framebuffer's stencil and depth renderbuffers. 1319 * 2. Create a combined depth/stencil renderbuffer and attach 1320 * it to the framebuffer's depth and stencil attachment points. 1321 * 3. Query the drawable for a new set of buffers, which consists of the 1322 * originally requested set plus DRI2BufferDepthStencil. 1323 * 4. Assign the DRI2BufferDepthStencil's DRM region to the new 1324 * depth/stencil renderbuffer. 1325 * 1326 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN 1327 * 1328 * \param drawable Drawable whose buffers were queried. 1329 * 1330 * \param buffers [in/out] As input, the buffer list returned by the 1331 * original DRI2 query. As output, the current buffer 1332 * list, which may have been altered by a new DRI2 query. 1333 * 1334 * \param attachments [in/out] As input, the attachment list submitted 1335 * in the original DRI2 query. As output, the attachment 1336 * list that was submitted in the DRI2 query that 1337 * obtained the current buffer list, as returned in the 1338 * output parameter \c buffers. (Note: If no new query 1339 * was made, then the list remains unaltered). 1340 * 1341 * \param count [out] Number of buffers in the current buffer list, as 1342 * returned in the output parameter \c buffers. 1343 * 1344 * \see enum intel_dri2_has_hiz 1345 * \see struct intel_screen::dri2_has_hiz 1346 * \see intel_update_renderbuffers 1347 */ 1348static void 1349intel_verify_dri2_has_hiz(struct intel_context *intel, 1350 __DRIdrawable *drawable, 1351 __DRIbuffer **buffers, 1352 unsigned **attachments, 1353 int *count) 1354{ 1355 assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN); 1356 1357 struct gl_framebuffer *fb = drawable->driverPrivate; 1358 struct intel_renderbuffer *stencil_rb = 1359 intel_get_renderbuffer(fb, BUFFER_STENCIL); 1360 1361 if (stencil_rb) { 1362 /* 1363 * We requested a DRI2BufferStencil without knowing if the X driver 1364 * supports it. Now, check if X handled the request correctly and clean 1365 * up if it did not. (See comments for 'enum intel_dri2_has_hiz'). 1366 */ 1367 struct intel_renderbuffer *depth_rb = 1368 intel_get_renderbuffer(fb, BUFFER_DEPTH); 1369 assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8); 1370 assert(depth_rb && intel_rb_format(depth_rb) == MESA_FORMAT_X8_Z24); 1371 1372 if (stencil_rb->mt->region->tiling == I915_TILING_NONE) { 1373 /* 1374 * The stencil buffer is actually W tiled. The region's tiling is 1375 * I915_TILING_NONE, however, because the GTT is incapable of W 1376 * fencing. 1377 */ 1378 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE; 1379 return; 1380 } else { 1381 /* 1382 * Oops... the screen doesn't support separate stencil. Discard the 1383 * separate depth and stencil buffers and replace them with 1384 * a combined depth/stencil buffer. Discard the hiz buffer too. 1385 */ 1386 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE; 1387 if (intel->must_use_separate_stencil) { 1388 _mesa_problem(&intel->ctx, 1389 "intel_context requires separate stencil, but the " 1390 "DRIscreen does not support it. You may need to " 1391 "upgrade the Intel X driver to 2.16.0"); 1392 abort(); 1393 } 1394 1395 /* 1. Discard depth and stencil renderbuffers. */ 1396 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH); 1397 depth_rb = NULL; 1398 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL); 1399 stencil_rb = NULL; 1400 1401 /* 2. Create new depth/stencil renderbuffer. */ 1402 struct intel_renderbuffer *depth_stencil_rb = 1403 intel_create_renderbuffer(MESA_FORMAT_S8_Z24); 1404 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base.Base); 1405 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base.Base); 1406 1407 /* 3. Append DRI2BufferDepthStencil to attachment list. */ 1408 int old_count = *count; 1409 unsigned int *old_attachments = *attachments; 1410 *count = old_count + 1; 1411 *attachments = malloc(2 * (*count) * sizeof(unsigned)); 1412 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned)); 1413 free(old_attachments); 1414 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL; 1415 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb); 1416 1417 /* 4. Request new set of DRI2 attachments. */ 1418 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 1419 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1420 &drawable->w, 1421 &drawable->h, 1422 *attachments, 1423 *count, 1424 count, 1425 drawable->loaderPrivate); 1426 if (!*buffers) 1427 return; 1428 1429 /* 1430 * I don't know how to recover from the failure assertion below. 1431 * Rather than fail gradually and unexpectedly, we should just die 1432 * now. 1433 */ 1434 assert(*count == old_count + 1); 1435 1436 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */ 1437 __DRIbuffer *depth_stencil_buffer = NULL; 1438 for (int i = 0; i < *count; ++i) { 1439 if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) { 1440 depth_stencil_buffer = &(*buffers)[i]; 1441 break; 1442 } 1443 } 1444 struct intel_region *region = 1445 intel_region_alloc_for_handle(intel->intelScreen, 1446 depth_stencil_buffer->cpp, 1447 drawable->w, 1448 drawable->h, 1449 depth_stencil_buffer->pitch 1450 / depth_stencil_buffer->cpp, 1451 depth_stencil_buffer->name, 1452 "dri2 depth / stencil buffer"); 1453 if (!region) 1454 return; 1455 1456 struct intel_mipmap_tree *mt = 1457 intel_miptree_create_for_region(intel, 1458 GL_TEXTURE_2D, 1459 intel_rb_format(depth_stencil_rb), 1460 region); 1461 intel_region_release(®ion); 1462 if (!mt) 1463 return; 1464 1465 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->mt, mt); 1466 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->mt, mt); 1467 intel_miptree_release(&mt); 1468 } 1469 } 1470 1471 if (intel_framebuffer_has_hiz(fb)) { 1472 /* 1473 * In the future, the driver may advertise a GL config with hiz 1474 * compatible depth bits and 0 stencil bits (for example, when the 1475 * driver gains support for float32 depth buffers). When that day comes, 1476 * here we need to verify that the X driver does in fact support hiz and 1477 * clean up if it doesn't. 1478 * 1479 * Presently, however, no verification or clean up is necessary, and 1480 * execution should not reach here. If the framebuffer still has a hiz 1481 * region, then we have already set dri2_has_hiz to true after 1482 * confirming above that the stencil buffer is W tiled. 1483 */ 1484 assert(0); 1485 } 1486} 1487