intel_context.c revision f172eae8b23d0612865895c52af745021ae20a4c
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include "main/glheader.h" 30#include "main/context.h" 31#include "main/extensions.h" 32#include "main/fbobject.h" 33#include "main/framebuffer.h" 34#include "main/imports.h" 35#include "main/points.h" 36#include "main/renderbuffer.h" 37 38#include "swrast/swrast.h" 39#include "swrast_setup/swrast_setup.h" 40#include "tnl/tnl.h" 41#include "drivers/common/driverfuncs.h" 42#include "drivers/common/meta.h" 43 44#include "intel_chipset.h" 45#include "intel_buffers.h" 46#include "intel_tex.h" 47#include "intel_batchbuffer.h" 48#include "intel_clear.h" 49#include "intel_extensions.h" 50#include "intel_pixel.h" 51#include "intel_regions.h" 52#include "intel_buffer_objects.h" 53#include "intel_fbo.h" 54#include "intel_bufmgr.h" 55#include "intel_screen.h" 56#include "intel_mipmap_tree.h" 57 58#include "utils.h" 59#include "../glsl/ralloc.h" 60 61#ifndef INTEL_DEBUG 62int INTEL_DEBUG = (0); 63#endif 64 65 66static const GLubyte * 67intelGetString(struct gl_context * ctx, GLenum name) 68{ 69 const struct intel_context *const intel = intel_context(ctx); 70 const char *chipset; 71 static char buffer[128]; 72 73 switch (name) { 74 case GL_VENDOR: 75 return (GLubyte *) "Tungsten Graphics, Inc"; 76 break; 77 78 case GL_RENDERER: 79 switch (intel->intelScreen->deviceID) { 80 case PCI_CHIP_845_G: 81 chipset = "Intel(R) 845G"; 82 break; 83 case PCI_CHIP_I830_M: 84 chipset = "Intel(R) 830M"; 85 break; 86 case PCI_CHIP_I855_GM: 87 chipset = "Intel(R) 852GM/855GM"; 88 break; 89 case PCI_CHIP_I865_G: 90 chipset = "Intel(R) 865G"; 91 break; 92 case PCI_CHIP_I915_G: 93 chipset = "Intel(R) 915G"; 94 break; 95 case PCI_CHIP_E7221_G: 96 chipset = "Intel (R) E7221G (i915)"; 97 break; 98 case PCI_CHIP_I915_GM: 99 chipset = "Intel(R) 915GM"; 100 break; 101 case PCI_CHIP_I945_G: 102 chipset = "Intel(R) 945G"; 103 break; 104 case PCI_CHIP_I945_GM: 105 chipset = "Intel(R) 945GM"; 106 break; 107 case PCI_CHIP_I945_GME: 108 chipset = "Intel(R) 945GME"; 109 break; 110 case PCI_CHIP_G33_G: 111 chipset = "Intel(R) G33"; 112 break; 113 case PCI_CHIP_Q35_G: 114 chipset = "Intel(R) Q35"; 115 break; 116 case PCI_CHIP_Q33_G: 117 chipset = "Intel(R) Q33"; 118 break; 119 case PCI_CHIP_IGD_GM: 120 case PCI_CHIP_IGD_G: 121 chipset = "Intel(R) IGD"; 122 break; 123 case PCI_CHIP_I965_Q: 124 chipset = "Intel(R) 965Q"; 125 break; 126 case PCI_CHIP_I965_G: 127 case PCI_CHIP_I965_G_1: 128 chipset = "Intel(R) 965G"; 129 break; 130 case PCI_CHIP_I946_GZ: 131 chipset = "Intel(R) 946GZ"; 132 break; 133 case PCI_CHIP_I965_GM: 134 chipset = "Intel(R) 965GM"; 135 break; 136 case PCI_CHIP_I965_GME: 137 chipset = "Intel(R) 965GME/GLE"; 138 break; 139 case PCI_CHIP_GM45_GM: 140 chipset = "Mobile Intel® GM45 Express Chipset"; 141 break; 142 case PCI_CHIP_IGD_E_G: 143 chipset = "Intel(R) Integrated Graphics Device"; 144 break; 145 case PCI_CHIP_G45_G: 146 chipset = "Intel(R) G45/G43"; 147 break; 148 case PCI_CHIP_Q45_G: 149 chipset = "Intel(R) Q45/Q43"; 150 break; 151 case PCI_CHIP_G41_G: 152 chipset = "Intel(R) G41"; 153 break; 154 case PCI_CHIP_B43_G: 155 case PCI_CHIP_B43_G1: 156 chipset = "Intel(R) B43"; 157 break; 158 case PCI_CHIP_ILD_G: 159 chipset = "Intel(R) Ironlake Desktop"; 160 break; 161 case PCI_CHIP_ILM_G: 162 chipset = "Intel(R) Ironlake Mobile"; 163 break; 164 case PCI_CHIP_SANDYBRIDGE_GT1: 165 case PCI_CHIP_SANDYBRIDGE_GT2: 166 case PCI_CHIP_SANDYBRIDGE_GT2_PLUS: 167 chipset = "Intel(R) Sandybridge Desktop"; 168 break; 169 case PCI_CHIP_SANDYBRIDGE_M_GT1: 170 case PCI_CHIP_SANDYBRIDGE_M_GT2: 171 case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS: 172 chipset = "Intel(R) Sandybridge Mobile"; 173 break; 174 case PCI_CHIP_SANDYBRIDGE_S: 175 chipset = "Intel(R) Sandybridge Server"; 176 break; 177 case PCI_CHIP_IVYBRIDGE_GT1: 178 case PCI_CHIP_IVYBRIDGE_GT2: 179 chipset = "Intel(R) Ivybridge Desktop"; 180 break; 181 case PCI_CHIP_IVYBRIDGE_M_GT1: 182 case PCI_CHIP_IVYBRIDGE_M_GT2: 183 chipset = "Intel(R) Ivybridge Mobile"; 184 break; 185 case PCI_CHIP_IVYBRIDGE_S_GT1: 186 chipset = "Intel(R) Ivybridge Server"; 187 break; 188 default: 189 chipset = "Unknown Intel Chipset"; 190 break; 191 } 192 193 (void) driGetRendererString(buffer, chipset, 0); 194 return (GLubyte *) buffer; 195 196 default: 197 return NULL; 198 } 199} 200 201static void 202intel_flush_front(struct gl_context *ctx) 203{ 204 struct intel_context *intel = intel_context(ctx); 205 __DRIcontext *driContext = intel->driContext; 206 __DRIscreen *const screen = intel->intelScreen->driScrnPriv; 207 208 if ((ctx->DrawBuffer->Name == 0) && intel->front_buffer_dirty) { 209 if (screen->dri2.loader && 210 (screen->dri2.loader->base.version >= 2) 211 && (screen->dri2.loader->flushFrontBuffer != NULL) && 212 driContext->driDrawablePriv && 213 driContext->driDrawablePriv->loaderPrivate) { 214 (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv, 215 driContext->driDrawablePriv->loaderPrivate); 216 217 /* We set the dirty bit in intel_prepare_render() if we're 218 * front buffer rendering once we get there. 219 */ 220 intel->front_buffer_dirty = false; 221 } 222 } 223} 224 225static unsigned 226intel_bits_per_pixel(const struct intel_renderbuffer *rb) 227{ 228 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; 229} 230 231static void 232intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel, 233 __DRIdrawable *drawable, 234 __DRIbuffer **buffers, 235 int *count); 236 237static void 238intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel, 239 __DRIdrawable *drawable, 240 __DRIbuffer *buffer, 241 struct intel_renderbuffer *rb, 242 const char *buffer_name); 243 244static void 245intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel, 246 __DRIdrawable *drawable, 247 __DRIbuffer **buffers, 248 unsigned **attachments, 249 int *count); 250 251static void 252intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel, 253 __DRIdrawable *drawable, 254 __DRIbuffer *buffer, 255 struct intel_renderbuffer *rb, 256 const char *buffer_name); 257static void 258intel_verify_dri2_has_hiz(struct intel_context *intel, 259 __DRIdrawable *drawable, 260 __DRIbuffer **buffers, 261 unsigned **attachments, 262 int *count); 263 264void 265intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) 266{ 267 struct gl_framebuffer *fb = drawable->driverPrivate; 268 struct intel_renderbuffer *rb; 269 struct intel_context *intel = context->driverPrivate; 270 __DRIbuffer *buffers = NULL; 271 unsigned *attachments = NULL; 272 int i, count; 273 const char *region_name; 274 275 bool try_separate_stencil = 276 intel->has_separate_stencil && 277 intel->intelScreen->dri2_has_hiz != INTEL_DRI2_HAS_HIZ_FALSE && 278 intel->intelScreen->driScrnPriv->dri2.loader != NULL && 279 intel->intelScreen->driScrnPriv->dri2.loader->base.version > 2 && 280 intel->intelScreen->driScrnPriv->dri2.loader->getBuffersWithFormat != NULL; 281 282 assert(!intel->must_use_separate_stencil || try_separate_stencil); 283 284 /* If we're rendering to the fake front buffer, make sure all the 285 * pending drawing has landed on the real front buffer. Otherwise 286 * when we eventually get to DRI2GetBuffersWithFormat the stale 287 * real front buffer contents will get copied to the new fake front 288 * buffer. 289 */ 290 if (intel->is_front_buffer_rendering) { 291 intel_flush(&intel->ctx); 292 intel_flush_front(&intel->ctx); 293 } 294 295 /* Set this up front, so that in case our buffers get invalidated 296 * while we're getting new buffers, we don't clobber the stamp and 297 * thus ignore the invalidate. */ 298 drawable->lastStamp = drawable->dri2.stamp; 299 300 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) 301 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); 302 303 if (try_separate_stencil) { 304 intel_query_dri2_buffers_with_separate_stencil(intel, drawable, &buffers, 305 &attachments, &count); 306 } else { 307 intel_query_dri2_buffers_no_separate_stencil(intel, drawable, &buffers, 308 &count); 309 } 310 311 if (buffers == NULL) 312 return; 313 314 for (i = 0; i < count; i++) { 315 switch (buffers[i].attachment) { 316 case __DRI_BUFFER_FRONT_LEFT: 317 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 318 region_name = "dri2 front buffer"; 319 break; 320 321 case __DRI_BUFFER_FAKE_FRONT_LEFT: 322 rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 323 region_name = "dri2 fake front buffer"; 324 break; 325 326 case __DRI_BUFFER_BACK_LEFT: 327 rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 328 region_name = "dri2 back buffer"; 329 break; 330 331 case __DRI_BUFFER_DEPTH: 332 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 333 region_name = "dri2 depth buffer"; 334 break; 335 336 case __DRI_BUFFER_HIZ: 337 /* The hiz region resides in the depth renderbuffer. */ 338 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 339 region_name = "dri2 hiz buffer"; 340 break; 341 342 case __DRI_BUFFER_DEPTH_STENCIL: 343 rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 344 region_name = "dri2 depth / stencil buffer"; 345 break; 346 347 case __DRI_BUFFER_STENCIL: 348 rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 349 region_name = "dri2 stencil buffer"; 350 break; 351 352 case __DRI_BUFFER_ACCUM: 353 default: 354 fprintf(stderr, 355 "unhandled buffer attach event, attachment type %d\n", 356 buffers[i].attachment); 357 return; 358 } 359 360 if (try_separate_stencil) { 361 intel_process_dri2_buffer_with_separate_stencil(intel, drawable, 362 &buffers[i], rb, 363 region_name); 364 } else { 365 intel_process_dri2_buffer_no_separate_stencil(intel, drawable, 366 &buffers[i], rb, 367 region_name); 368 } 369 } 370 371 if (try_separate_stencil 372 && intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN) { 373 intel_verify_dri2_has_hiz(intel, drawable, &buffers, &attachments, 374 &count); 375 } 376 377 if (attachments) 378 free(attachments); 379 380 driUpdateFramebufferSize(&intel->ctx, drawable); 381} 382 383/** 384 * intel_prepare_render should be called anywhere that curent read/drawbuffer 385 * state is required. 386 */ 387void 388intel_prepare_render(struct intel_context *intel) 389{ 390 __DRIcontext *driContext = intel->driContext; 391 __DRIdrawable *drawable; 392 393 drawable = driContext->driDrawablePriv; 394 if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) { 395 if (drawable->lastStamp != drawable->dri2.stamp) 396 intel_update_renderbuffers(driContext, drawable); 397 intel_draw_buffer(&intel->ctx); 398 driContext->dri2.draw_stamp = drawable->dri2.stamp; 399 } 400 401 drawable = driContext->driReadablePriv; 402 if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) { 403 if (drawable->lastStamp != drawable->dri2.stamp) 404 intel_update_renderbuffers(driContext, drawable); 405 driContext->dri2.read_stamp = drawable->dri2.stamp; 406 } 407 408 /* If we're currently rendering to the front buffer, the rendering 409 * that will happen next will probably dirty the front buffer. So 410 * mark it as dirty here. 411 */ 412 if (intel->is_front_buffer_rendering) 413 intel->front_buffer_dirty = true; 414 415 /* Wait for the swapbuffers before the one we just emitted, so we 416 * don't get too many swaps outstanding for apps that are GPU-heavy 417 * but not CPU-heavy. 418 * 419 * We're using intelDRI2Flush (called from the loader before 420 * swapbuffer) and glFlush (for front buffer rendering) as the 421 * indicator that a frame is done and then throttle when we get 422 * here as we prepare to render the next frame. At this point for 423 * round trips for swap/copy and getting new buffers are done and 424 * we'll spend less time waiting on the GPU. 425 * 426 * Unfortunately, we don't have a handle to the batch containing 427 * the swap, and getting our hands on that doesn't seem worth it, 428 * so we just us the first batch we emitted after the last swap. 429 */ 430 if (intel->need_throttle && intel->first_post_swapbuffers_batch) { 431 drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch); 432 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch); 433 intel->first_post_swapbuffers_batch = NULL; 434 intel->need_throttle = false; 435 } 436} 437 438static void 439intel_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei w, GLsizei h) 440{ 441 struct intel_context *intel = intel_context(ctx); 442 __DRIcontext *driContext = intel->driContext; 443 444 if (intel->saved_viewport) 445 intel->saved_viewport(ctx, x, y, w, h); 446 447 if (ctx->DrawBuffer->Name == 0) { 448 dri2InvalidateDrawable(driContext->driDrawablePriv); 449 dri2InvalidateDrawable(driContext->driReadablePriv); 450 } 451} 452 453static const struct dri_debug_control debug_control[] = { 454 { "tex", DEBUG_TEXTURE}, 455 { "state", DEBUG_STATE}, 456 { "ioctl", DEBUG_IOCTL}, 457 { "blit", DEBUG_BLIT}, 458 { "mip", DEBUG_MIPTREE}, 459 { "fall", DEBUG_FALLBACKS}, 460 { "verb", DEBUG_VERBOSE}, 461 { "bat", DEBUG_BATCH}, 462 { "pix", DEBUG_PIXEL}, 463 { "buf", DEBUG_BUFMGR}, 464 { "reg", DEBUG_REGION}, 465 { "fbo", DEBUG_FBO}, 466 { "gs", DEBUG_GS}, 467 { "sync", DEBUG_SYNC}, 468 { "prim", DEBUG_PRIMS }, 469 { "vert", DEBUG_VERTS }, 470 { "dri", DEBUG_DRI }, 471 { "sf", DEBUG_SF }, 472 { "san", DEBUG_SANITY }, 473 { "sleep", DEBUG_SLEEP }, 474 { "stats", DEBUG_STATS }, 475 { "tile", DEBUG_TILE }, 476 { "wm", DEBUG_WM }, 477 { "urb", DEBUG_URB }, 478 { "vs", DEBUG_VS }, 479 { "clip", DEBUG_CLIP }, 480 { NULL, 0 } 481}; 482 483 484static void 485intelInvalidateState(struct gl_context * ctx, GLuint new_state) 486{ 487 struct intel_context *intel = intel_context(ctx); 488 489 _swrast_InvalidateState(ctx, new_state); 490 _vbo_InvalidateState(ctx, new_state); 491 492 intel->NewGLState |= new_state; 493 494 if (intel->vtbl.invalidate_state) 495 intel->vtbl.invalidate_state( intel, new_state ); 496} 497 498void 499intel_flush_rendering_to_batch(struct gl_context *ctx) 500{ 501 struct intel_context *intel = intel_context(ctx); 502 503 if (intel->Fallback) 504 _swrast_flush(ctx); 505 506 if (intel->gen < 4) 507 INTEL_FIREVERTICES(intel); 508} 509 510void 511_intel_flush(struct gl_context *ctx, const char *file, int line) 512{ 513 struct intel_context *intel = intel_context(ctx); 514 515 intel_flush_rendering_to_batch(ctx); 516 517 if (intel->batch.used) 518 _intel_batchbuffer_flush(intel, file, line); 519} 520 521static void 522intel_glFlush(struct gl_context *ctx) 523{ 524 struct intel_context *intel = intel_context(ctx); 525 526 intel_flush(ctx); 527 intel_flush_front(ctx); 528 if (intel->is_front_buffer_rendering) 529 intel->need_throttle = true; 530} 531 532void 533intelFinish(struct gl_context * ctx) 534{ 535 struct intel_context *intel = intel_context(ctx); 536 537 intel_flush(ctx); 538 intel_flush_front(ctx); 539 540 if (intel->batch.last_bo) 541 drm_intel_bo_wait_rendering(intel->batch.last_bo); 542} 543 544void 545intelInitDriverFunctions(struct dd_function_table *functions) 546{ 547 _mesa_init_driver_functions(functions); 548 549 functions->Flush = intel_glFlush; 550 functions->Finish = intelFinish; 551 functions->GetString = intelGetString; 552 functions->UpdateState = intelInvalidateState; 553 554 intelInitTextureFuncs(functions); 555 intelInitTextureImageFuncs(functions); 556 intelInitTextureSubImageFuncs(functions); 557 intelInitTextureCopyImageFuncs(functions); 558 intelInitStateFuncs(functions); 559 intelInitClearFuncs(functions); 560 intelInitBufferFuncs(functions); 561 intelInitPixelFuncs(functions); 562 intelInitBufferObjectFuncs(functions); 563 intel_init_syncobj_functions(functions); 564} 565 566bool 567intelInitContext(struct intel_context *intel, 568 int api, 569 const struct gl_config * mesaVis, 570 __DRIcontext * driContextPriv, 571 void *sharedContextPrivate, 572 struct dd_function_table *functions) 573{ 574 struct gl_context *ctx = &intel->ctx; 575 struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; 576 __DRIscreen *sPriv = driContextPriv->driScreenPriv; 577 struct intel_screen *intelScreen = sPriv->driverPrivate; 578 int bo_reuse_mode; 579 struct gl_config visual; 580 581 /* we can't do anything without a connection to the device */ 582 if (intelScreen->bufmgr == NULL) 583 return false; 584 585 /* Can't rely on invalidate events, fall back to glViewport hack */ 586 if (!driContextPriv->driScreenPriv->dri2.useInvalidate) { 587 intel->saved_viewport = functions->Viewport; 588 functions->Viewport = intel_viewport; 589 } 590 591 if (mesaVis == NULL) { 592 memset(&visual, 0, sizeof visual); 593 mesaVis = &visual; 594 } 595 596 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx, 597 functions, (void *) intel)) { 598 printf("%s: failed to init mesa context\n", __FUNCTION__); 599 return false; 600 } 601 602 driContextPriv->driverPrivate = intel; 603 intel->intelScreen = intelScreen; 604 intel->driContext = driContextPriv; 605 intel->driFd = sPriv->fd; 606 607 intel->gen = intelScreen->gen; 608 609 const int devID = intelScreen->deviceID; 610 611 if (IS_SNB_GT1(devID) || IS_IVB_GT1(devID)) 612 intel->gt = 1; 613 else if (IS_SNB_GT2(devID) || IS_IVB_GT2(devID)) 614 intel->gt = 2; 615 else 616 intel->gt = 0; 617 618 if (IS_G4X(devID)) { 619 intel->is_g4x = true; 620 } else if (IS_945(devID)) { 621 intel->is_945 = true; 622 } 623 624 if (intel->gen >= 5) { 625 intel->needs_ff_sync = true; 626 } 627 628 intel->has_separate_stencil = intel->intelScreen->hw_has_separate_stencil; 629 intel->must_use_separate_stencil = intel->intelScreen->hw_must_use_separate_stencil; 630 intel->has_hiz = intel->intelScreen->hw_has_hiz; 631 intel->has_llc = intel->intelScreen->hw_has_llc; 632 intel->has_swizzling = intel->intelScreen->hw_has_swizzling; 633 634 memset(&ctx->TextureFormatSupported, 635 0, sizeof(ctx->TextureFormatSupported)); 636 637 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache, 638 sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915"); 639 if (intel->gen < 4) 640 intel->maxBatchSize = 4096; 641 else 642 intel->maxBatchSize = sizeof(intel->batch.map); 643 644 intel->bufmgr = intelScreen->bufmgr; 645 646 bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); 647 switch (bo_reuse_mode) { 648 case DRI_CONF_BO_REUSE_DISABLED: 649 break; 650 case DRI_CONF_BO_REUSE_ALL: 651 intel_bufmgr_gem_enable_reuse(intel->bufmgr); 652 break; 653 } 654 655 /* This doesn't yet catch all non-conformant rendering, but it's a 656 * start. 657 */ 658 if (getenv("INTEL_STRICT_CONFORMANCE")) { 659 unsigned int value = atoi(getenv("INTEL_STRICT_CONFORMANCE")); 660 if (value > 0) { 661 intel->conformance_mode = value; 662 } 663 else { 664 intel->conformance_mode = 1; 665 } 666 } 667 668 if (intel->conformance_mode > 0) { 669 ctx->Const.MinLineWidth = 1.0; 670 ctx->Const.MinLineWidthAA = 1.0; 671 ctx->Const.MaxLineWidth = 1.0; 672 ctx->Const.MaxLineWidthAA = 1.0; 673 ctx->Const.LineWidthGranularity = 1.0; 674 } 675 else { 676 ctx->Const.MinLineWidth = 1.0; 677 ctx->Const.MinLineWidthAA = 1.0; 678 ctx->Const.MaxLineWidth = 5.0; 679 ctx->Const.MaxLineWidthAA = 5.0; 680 ctx->Const.LineWidthGranularity = 0.5; 681 } 682 683 ctx->Const.MinPointSize = 1.0; 684 ctx->Const.MinPointSizeAA = 1.0; 685 ctx->Const.MaxPointSize = 255.0; 686 ctx->Const.MaxPointSizeAA = 3.0; 687 ctx->Const.PointSizeGranularity = 1.0; 688 689 ctx->Const.MaxSamples = 1.0; 690 691 if (intel->gen >= 6) 692 ctx->Const.MaxClipPlanes = 8; 693 694 ctx->Const.StripTextureBorder = GL_TRUE; 695 696 /* reinitialize the context point state. 697 * It depend on constants in __struct gl_contextRec::Const 698 */ 699 _mesa_init_point(ctx); 700 701 if (intel->gen >= 4) { 702 ctx->Const.MaxRenderbufferSize = 8192; 703 } else { 704 ctx->Const.MaxRenderbufferSize = 2048; 705 } 706 707 /* Initialize the software rasterizer and helper modules. */ 708 _swrast_CreateContext(ctx); 709 _vbo_CreateContext(ctx); 710 _tnl_CreateContext(ctx); 711 _swsetup_CreateContext(ctx); 712 713 /* Configure swrast to match hardware characteristics: */ 714 _swrast_allow_pixel_fog(ctx, false); 715 _swrast_allow_vertex_fog(ctx, true); 716 717 _mesa_meta_init(ctx); 718 719 intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24; 720 intel->hw_stipple = 1; 721 722 /* XXX FBO: this doesn't seem to be used anywhere */ 723 switch (mesaVis->depthBits) { 724 case 0: /* what to do in this case? */ 725 case 16: 726 intel->polygon_offset_scale = 1.0; 727 break; 728 case 24: 729 intel->polygon_offset_scale = 2.0; /* req'd to pass glean */ 730 break; 731 default: 732 assert(0); 733 break; 734 } 735 736 if (intel->gen >= 4) 737 intel->polygon_offset_scale /= 0xffff; 738 739 intel->RenderIndex = ~0; 740 741 switch (ctx->API) { 742 case API_OPENGL: 743 intelInitExtensions(ctx); 744 break; 745 case API_OPENGLES: 746 intelInitExtensionsES1(ctx); 747 break; 748 case API_OPENGLES2: 749 intelInitExtensionsES2(ctx); 750 break; 751 } 752 753 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control); 754 if (INTEL_DEBUG & DEBUG_BUFMGR) 755 dri_bufmgr_set_debug(intel->bufmgr, true); 756 757 intel_batchbuffer_init(intel); 758 759 intel_fbo_init(intel); 760 761 intel->use_texture_tiling = driQueryOptionb(&intel->optionCache, 762 "texture_tiling"); 763 intel->use_early_z = driQueryOptionb(&intel->optionCache, "early_z"); 764 765 intel->prim.primitive = ~0; 766 767 /* Force all software fallbacks */ 768 if (driQueryOptionb(&intel->optionCache, "no_rast")) { 769 fprintf(stderr, "disabling 3D rasterization\n"); 770 intel->no_rast = 1; 771 } 772 773 if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) { 774 fprintf(stderr, "flushing batchbuffer before/after each draw call\n"); 775 intel->always_flush_batch = 1; 776 } 777 778 if (driQueryOptionb(&intel->optionCache, "always_flush_cache")) { 779 fprintf(stderr, "flushing GPU caches before/after each draw call\n"); 780 intel->always_flush_cache = 1; 781 } 782 783 return true; 784} 785 786void 787intelDestroyContext(__DRIcontext * driContextPriv) 788{ 789 struct intel_context *intel = 790 (struct intel_context *) driContextPriv->driverPrivate; 791 792 assert(intel); /* should never be null */ 793 if (intel) { 794 INTEL_FIREVERTICES(intel); 795 796 _mesa_meta_free(&intel->ctx); 797 798 intel->vtbl.destroy(intel); 799 800 _swsetup_DestroyContext(&intel->ctx); 801 _tnl_DestroyContext(&intel->ctx); 802 _vbo_DestroyContext(&intel->ctx); 803 804 _swrast_DestroyContext(&intel->ctx); 805 intel->Fallback = 0x0; /* don't call _swrast_Flush later */ 806 807 intel_batchbuffer_free(intel); 808 809 free(intel->prim.vb); 810 intel->prim.vb = NULL; 811 drm_intel_bo_unreference(intel->prim.vb_bo); 812 intel->prim.vb_bo = NULL; 813 drm_intel_bo_unreference(intel->first_post_swapbuffers_batch); 814 intel->first_post_swapbuffers_batch = NULL; 815 816 driDestroyOptionCache(&intel->optionCache); 817 818 /* free the Mesa context */ 819 _mesa_free_context_data(&intel->ctx); 820 821 _math_matrix_dtr(&intel->ViewportMatrix); 822 823 ralloc_free(intel); 824 driContextPriv->driverPrivate = NULL; 825 } 826} 827 828GLboolean 829intelUnbindContext(__DRIcontext * driContextPriv) 830{ 831 /* Unset current context and dispath table */ 832 _mesa_make_current(NULL, NULL, NULL); 833 834 return true; 835} 836 837GLboolean 838intelMakeCurrent(__DRIcontext * driContextPriv, 839 __DRIdrawable * driDrawPriv, 840 __DRIdrawable * driReadPriv) 841{ 842 struct intel_context *intel; 843 GET_CURRENT_CONTEXT(curCtx); 844 845 if (driContextPriv) 846 intel = (struct intel_context *) driContextPriv->driverPrivate; 847 else 848 intel = NULL; 849 850 /* According to the glXMakeCurrent() man page: "Pending commands to 851 * the previous context, if any, are flushed before it is released." 852 * But only flush if we're actually changing contexts. 853 */ 854 if (intel_context(curCtx) && intel_context(curCtx) != intel) { 855 _mesa_flush(curCtx); 856 } 857 858 if (driContextPriv) { 859 struct gl_framebuffer *fb, *readFb; 860 861 if (driDrawPriv == NULL && driReadPriv == NULL) { 862 fb = _mesa_get_incomplete_framebuffer(); 863 readFb = _mesa_get_incomplete_framebuffer(); 864 } else { 865 fb = driDrawPriv->driverPrivate; 866 readFb = driReadPriv->driverPrivate; 867 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1; 868 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1; 869 } 870 871 intel_prepare_render(intel); 872 _mesa_make_current(&intel->ctx, fb, readFb); 873 874 /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer 875 * is NULL at that point. We can't call _mesa_makecurrent() 876 * first, since we need the buffer size for the initial 877 * viewport. So just call intel_draw_buffer() again here. */ 878 intel_draw_buffer(&intel->ctx); 879 } 880 else { 881 _mesa_make_current(NULL, NULL, NULL); 882 } 883 884 return true; 885} 886 887/** 888 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 889 * 890 * To determine which DRI buffers to request, examine the renderbuffers 891 * attached to the drawable's framebuffer. Then request the buffers with 892 * DRI2GetBuffers() or DRI2GetBuffersWithFormat(). 893 * 894 * This is called from intel_update_renderbuffers(). It is used only if either 895 * the hardware or the X driver lacks separate stencil support. 896 * 897 * \param drawable Drawable whose buffers are queried. 898 * \param buffers [out] List of buffers returned by DRI2 query. 899 * \param buffer_count [out] Number of buffers returned. 900 * 901 * \see intel_update_renderbuffers() 902 * \see DRI2GetBuffers() 903 * \see DRI2GetBuffersWithFormat() 904 */ 905static void 906intel_query_dri2_buffers_no_separate_stencil(struct intel_context *intel, 907 __DRIdrawable *drawable, 908 __DRIbuffer **buffers, 909 int *buffer_count) 910{ 911 assert(!intel->must_use_separate_stencil); 912 913 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 914 struct gl_framebuffer *fb = drawable->driverPrivate; 915 916 if (screen->dri2.loader 917 && screen->dri2.loader->base.version > 2 918 && screen->dri2.loader->getBuffersWithFormat != NULL) { 919 920 int i = 0; 921 const int max_attachments = 4; 922 unsigned *attachments = calloc(2 * max_attachments, sizeof(unsigned)); 923 924 struct intel_renderbuffer *front_rb; 925 struct intel_renderbuffer *back_rb; 926 struct intel_renderbuffer *depth_rb; 927 struct intel_renderbuffer *stencil_rb; 928 929 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 930 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 931 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 932 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 933 934 if ((intel->is_front_buffer_rendering || 935 intel->is_front_buffer_reading || 936 !back_rb) && front_rb) { 937 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 938 attachments[i++] = intel_bits_per_pixel(front_rb); 939 } 940 941 if (back_rb) { 942 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 943 attachments[i++] = intel_bits_per_pixel(back_rb); 944 } 945 946 if (depth_rb && stencil_rb) { 947 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL; 948 attachments[i++] = intel_bits_per_pixel(depth_rb); 949 } else if (depth_rb) { 950 attachments[i++] = __DRI_BUFFER_DEPTH; 951 attachments[i++] = intel_bits_per_pixel(depth_rb); 952 } else if (stencil_rb) { 953 attachments[i++] = __DRI_BUFFER_STENCIL; 954 attachments[i++] = intel_bits_per_pixel(stencil_rb); 955 } 956 957 assert(i <= 2 * max_attachments); 958 959 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 960 &drawable->w, 961 &drawable->h, 962 attachments, i / 2, 963 buffer_count, 964 drawable->loaderPrivate); 965 free(attachments); 966 967 } else if (screen->dri2.loader) { 968 969 int i = 0; 970 const int max_attachments = 4; 971 unsigned *attachments = calloc(max_attachments, sizeof(unsigned)); 972 973 if (intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT)) 974 attachments[i++] = __DRI_BUFFER_FRONT_LEFT; 975 if (intel_get_renderbuffer(fb, BUFFER_BACK_LEFT)) 976 attachments[i++] = __DRI_BUFFER_BACK_LEFT; 977 if (intel_get_renderbuffer(fb, BUFFER_DEPTH)) 978 attachments[i++] = __DRI_BUFFER_DEPTH; 979 if (intel_get_renderbuffer(fb, BUFFER_STENCIL)) 980 attachments[i++] = __DRI_BUFFER_STENCIL; 981 982 assert(i <= max_attachments); 983 984 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 985 &drawable->w, 986 &drawable->h, 987 attachments, i, 988 buffer_count, 989 drawable->loaderPrivate); 990 free(attachments); 991 992 } else { 993 *buffers = NULL; 994 *buffer_count = 0; 995 } 996} 997 998/** 999 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1000 * 1001 * This is called from intel_update_renderbuffers(). It is used only if 1002 * either the hardware or the X driver lacks separate stencil support. 1003 * 1004 * \par Note: 1005 * DRI buffers whose attachment point is DRI2BufferStencil or 1006 * DRI2BufferDepthStencil are handled as special cases. 1007 * 1008 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1009 * that is passed to intel_region_alloc_for_handle(). 1010 * 1011 * \see intel_update_renderbuffers() 1012 * \see intel_region_alloc_for_handle() 1013 */ 1014static void 1015intel_process_dri2_buffer_no_separate_stencil(struct intel_context *intel, 1016 __DRIdrawable *drawable, 1017 __DRIbuffer *buffer, 1018 struct intel_renderbuffer *rb, 1019 const char *buffer_name) 1020{ 1021 assert(!intel->must_use_separate_stencil); 1022 1023 struct gl_framebuffer *fb = drawable->driverPrivate; 1024 struct intel_renderbuffer *depth_rb = NULL; 1025 1026 if (!rb) 1027 return; 1028 1029 if (rb->mt && 1030 rb->mt->region && 1031 rb->mt->region->name == buffer->name) 1032 return; 1033 1034 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1035 fprintf(stderr, 1036 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1037 buffer->name, buffer->attachment, 1038 buffer->cpp, buffer->pitch); 1039 } 1040 1041 bool identify_depth_and_stencil = false; 1042 if (buffer->attachment == __DRI_BUFFER_STENCIL) { 1043 struct intel_renderbuffer *depth_rb = 1044 intel_get_renderbuffer(fb, BUFFER_DEPTH); 1045 identify_depth_and_stencil = depth_rb && depth_rb->mt; 1046 } 1047 1048 if (identify_depth_and_stencil) { 1049 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1050 fprintf(stderr, "(reusing depth buffer as stencil)\n"); 1051 } 1052 intel_miptree_reference(&rb->mt, depth_rb->mt); 1053 } else { 1054 intel_miptree_release(&rb->mt); 1055 struct intel_region *region = 1056 intel_region_alloc_for_handle(intel->intelScreen, 1057 buffer->cpp, 1058 drawable->w, 1059 drawable->h, 1060 buffer->pitch / buffer->cpp, 1061 buffer->name, 1062 buffer_name); 1063 if (!region) 1064 return; 1065 1066 rb->mt = intel_miptree_create_for_region(intel, 1067 GL_TEXTURE_2D, 1068 intel_rb_format(rb), 1069 region); 1070 intel_region_release(®ion); 1071 if (!rb->mt) 1072 return; 1073 } 1074 1075 if (buffer->attachment == __DRI_BUFFER_DEPTH_STENCIL) { 1076 struct intel_renderbuffer *stencil_rb = 1077 intel_get_renderbuffer(fb, BUFFER_STENCIL); 1078 1079 if (!stencil_rb) 1080 return; 1081 1082 /* The rb passed in is the BUFFER_DEPTH attachment, and we need 1083 * to associate this region to BUFFER_STENCIL as well. 1084 */ 1085 intel_miptree_reference(&stencil_rb->mt, rb->mt); 1086 } 1087} 1088 1089/** 1090 * \brief Query DRI2 to obtain a DRIdrawable's buffers. 1091 * 1092 * To determine which DRI buffers to request, examine the renderbuffers 1093 * attached to the drawable's framebuffer. Then request the buffers with 1094 * DRI2GetBuffersWithFormat(). 1095 * 1096 * This is called from intel_update_renderbuffers(). It is used when 1) the 1097 * hardware supports separate stencil and 2) the X driver's separate stencil 1098 * support has been verified to work or is still unknown. 1099 * 1100 * \param drawable Drawable whose buffers are queried. 1101 * \param buffers [out] List of buffers returned by DRI2 query. 1102 * \param buffer_count [out] Number of buffers returned. 1103 * \param attachments [out] List of pairs (attachment_point, bits_per_pixel) 1104 * that were submitted in the DRI2 query. Number of pairs 1105 * is same as buffer_count. 1106 * 1107 * \see intel_update_renderbuffers() 1108 * \see DRI2GetBuffersWithFormat() 1109 * \see enum intel_dri2_has_hiz 1110 */ 1111static void 1112intel_query_dri2_buffers_with_separate_stencil(struct intel_context *intel, 1113 __DRIdrawable *drawable, 1114 __DRIbuffer **buffers, 1115 unsigned **attachments, 1116 int *count) 1117{ 1118 assert(intel->has_separate_stencil); 1119 1120 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 1121 struct gl_framebuffer *fb = drawable->driverPrivate; 1122 1123 const int max_attachments = 5; 1124 int i = 0; 1125 1126 *attachments = calloc(2 * max_attachments, sizeof(unsigned)); 1127 if (!*attachments) { 1128 *buffers = NULL; 1129 *count = 0; 1130 return; 1131 } 1132 1133 struct intel_renderbuffer *front_rb; 1134 struct intel_renderbuffer *back_rb; 1135 struct intel_renderbuffer *depth_rb; 1136 struct intel_renderbuffer *stencil_rb; 1137 1138 front_rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT); 1139 back_rb = intel_get_renderbuffer(fb, BUFFER_BACK_LEFT); 1140 depth_rb = intel_get_renderbuffer(fb, BUFFER_DEPTH); 1141 stencil_rb = intel_get_renderbuffer(fb, BUFFER_STENCIL); 1142 1143 if ((intel->is_front_buffer_rendering || 1144 intel->is_front_buffer_reading || 1145 !back_rb) && front_rb) { 1146 (*attachments)[i++] = __DRI_BUFFER_FRONT_LEFT; 1147 (*attachments)[i++] = intel_bits_per_pixel(front_rb); 1148 } 1149 1150 if (back_rb) { 1151 (*attachments)[i++] = __DRI_BUFFER_BACK_LEFT; 1152 (*attachments)[i++] = intel_bits_per_pixel(back_rb); 1153 } 1154 1155 /* 1156 * We request a separate stencil buffer, and perhaps a hiz buffer too, even 1157 * if we do not yet know if the X driver supports it. See the comments for 1158 * 'enum intel_dri2_has_hiz'. 1159 */ 1160 1161 if (depth_rb) { 1162 (*attachments)[i++] = __DRI_BUFFER_DEPTH; 1163 (*attachments)[i++] = intel_bits_per_pixel(depth_rb); 1164 1165 if (intel->vtbl.is_hiz_depth_format(intel, intel_rb_format(depth_rb))) { 1166 /* Depth and hiz buffer have same bpp. */ 1167 (*attachments)[i++] = __DRI_BUFFER_HIZ; 1168 (*attachments)[i++] = intel_bits_per_pixel(depth_rb); 1169 } 1170 } 1171 1172 if (stencil_rb) { 1173 assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8); 1174 (*attachments)[i++] = __DRI_BUFFER_STENCIL; 1175 (*attachments)[i++] = intel_bits_per_pixel(stencil_rb); 1176 } 1177 1178 assert(i <= 2 * max_attachments); 1179 1180 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1181 &drawable->w, 1182 &drawable->h, 1183 *attachments, i / 2, 1184 count, 1185 drawable->loaderPrivate); 1186 1187 if (!*buffers) { 1188 free(*attachments); 1189 *attachments = NULL; 1190 *count = 0; 1191 } 1192} 1193 1194/** 1195 * \brief Assign a DRI buffer's DRM region to a renderbuffer. 1196 * 1197 * This is called from intel_update_renderbuffers(). It is used when 1) the 1198 * hardware supports separate stencil and 2) the X driver's separate stencil 1199 * support has been verified to work or is still unknown. 1200 * 1201 * \par Note: 1202 * DRI buffers whose attachment point is DRI2BufferStencil or DRI2BufferHiz 1203 * are handled as special cases. 1204 * 1205 * \param buffer_name is a human readable name, such as "dri2 front buffer", 1206 * that is passed to intel_region_alloc_for_handle(). 1207 * 1208 * \see intel_update_renderbuffers() 1209 * \see intel_region_alloc_for_handle() 1210 * \see enum intel_dri2_has_hiz 1211 */ 1212static void 1213intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel, 1214 __DRIdrawable *drawable, 1215 __DRIbuffer *buffer, 1216 struct intel_renderbuffer *rb, 1217 const char *buffer_name) 1218{ 1219 assert(intel->has_separate_stencil); 1220 assert(buffer->attachment != __DRI_BUFFER_DEPTH_STENCIL); 1221 1222 if (!rb) 1223 return; 1224 1225 /* If the renderbuffer's and DRIbuffer's regions match, then continue. */ 1226 if ((buffer->attachment != __DRI_BUFFER_HIZ && 1227 rb->mt && 1228 rb->mt->region && 1229 rb->mt->region->name == buffer->name) || 1230 (buffer->attachment == __DRI_BUFFER_HIZ && 1231 rb->mt && 1232 rb->mt->hiz_mt && 1233 rb->mt->hiz_mt->region->name == buffer->name)) { 1234 return; 1235 } 1236 1237 if (unlikely(INTEL_DEBUG & DEBUG_DRI)) { 1238 fprintf(stderr, 1239 "attaching buffer %d, at %d, cpp %d, pitch %d\n", 1240 buffer->name, buffer->attachment, 1241 buffer->cpp, buffer->pitch); 1242 } 1243 1244 int buffer_width; 1245 int buffer_height; 1246 if (buffer->attachment == __DRI_BUFFER_STENCIL) { 1247 /* The stencil buffer has quirky pitch requirements. From Section 1248 * 2.11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface Pitch": 1249 * The pitch must be set to 2x the value computed based on width, as 1250 * the stencil buffer is stored with two rows interleaved. 1251 * 1252 * To satisfy the pitch requirement, the X driver allocated the region 1253 * with the following dimensions. 1254 */ 1255 buffer_width = ALIGN(drawable->w, 64); 1256 buffer_height = ALIGN(ALIGN(drawable->h, 2) / 2, 64); 1257 } else { 1258 buffer_width = drawable->w; 1259 buffer_height = drawable->h; 1260 } 1261 1262 /* Release the buffer storage now in case we have to return early 1263 * due to failure to allocate new storage. 1264 */ 1265 if (buffer->attachment == __DRI_BUFFER_HIZ) { 1266 intel_miptree_release(&rb->mt->hiz_mt); 1267 } else { 1268 intel_miptree_release(&rb->mt); 1269 } 1270 1271 struct intel_region *region = 1272 intel_region_alloc_for_handle(intel->intelScreen, 1273 buffer->cpp, 1274 buffer_width, 1275 buffer_height, 1276 buffer->pitch / buffer->cpp, 1277 buffer->name, 1278 buffer_name); 1279 if (!region) 1280 return; 1281 1282 struct intel_mipmap_tree *mt = 1283 intel_miptree_create_for_region(intel, 1284 GL_TEXTURE_2D, 1285 intel_rb_format(rb), 1286 region); 1287 intel_region_release(®ion); 1288 1289 /* Associate buffer with new storage. */ 1290 if (buffer->attachment == __DRI_BUFFER_HIZ) { 1291 rb->mt->hiz_mt = mt; 1292 } else { 1293 rb->mt = mt; 1294 } 1295} 1296 1297/** 1298 * \brief Verify that the X driver supports hiz and separate stencil. 1299 * 1300 * This implements the cleanup stage of the handshake described in the 1301 * comments for 'enum intel_dri2_has_hiz'. 1302 * 1303 * This should be called from intel_update_renderbuffers() after 1) the 1304 * DRIdrawable has been queried for its buffers via DRI2GetBuffersWithFormat() 1305 * and 2) the DRM region of each returned DRIbuffer has been assigned to the 1306 * appropriate intel_renderbuffer. Furthermore, this should be called *only* 1307 * when 1) intel_update_renderbuffers() tried to used the X driver's separate 1308 * stencil functionality and 2) it has not yet been determined if the X driver 1309 * supports separate stencil. 1310 * 1311 * If we determine that the X driver does have support, then we set 1312 * intel_screen.dri2_has_hiz to true and return. 1313 * 1314 * If we determine that the X driver lacks support, and we requested 1315 * a DRI2BufferDepth and DRI2BufferStencil, then we must remedy the mistake by 1316 * taking the following actions: 1317 * 1. Discard the framebuffer's stencil and depth renderbuffers. 1318 * 2. Create a combined depth/stencil renderbuffer and attach 1319 * it to the framebuffer's depth and stencil attachment points. 1320 * 3. Query the drawable for a new set of buffers, which consists of the 1321 * originally requested set plus DRI2BufferDepthStencil. 1322 * 4. Assign the DRI2BufferDepthStencil's DRM region to the new 1323 * depth/stencil renderbuffer. 1324 * 1325 * \pre intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN 1326 * 1327 * \param drawable Drawable whose buffers were queried. 1328 * 1329 * \param buffers [in/out] As input, the buffer list returned by the 1330 * original DRI2 query. As output, the current buffer 1331 * list, which may have been altered by a new DRI2 query. 1332 * 1333 * \param attachments [in/out] As input, the attachment list submitted 1334 * in the original DRI2 query. As output, the attachment 1335 * list that was submitted in the DRI2 query that 1336 * obtained the current buffer list, as returned in the 1337 * output parameter \c buffers. (Note: If no new query 1338 * was made, then the list remains unaltered). 1339 * 1340 * \param count [out] Number of buffers in the current buffer list, as 1341 * returned in the output parameter \c buffers. 1342 * 1343 * \see enum intel_dri2_has_hiz 1344 * \see struct intel_screen::dri2_has_hiz 1345 * \see intel_update_renderbuffers 1346 */ 1347static void 1348intel_verify_dri2_has_hiz(struct intel_context *intel, 1349 __DRIdrawable *drawable, 1350 __DRIbuffer **buffers, 1351 unsigned **attachments, 1352 int *count) 1353{ 1354 assert(intel->intelScreen->dri2_has_hiz == INTEL_DRI2_HAS_HIZ_UNKNOWN); 1355 1356 struct gl_framebuffer *fb = drawable->driverPrivate; 1357 struct intel_renderbuffer *stencil_rb = 1358 intel_get_renderbuffer(fb, BUFFER_STENCIL); 1359 1360 if (stencil_rb) { 1361 /* 1362 * We requested a DRI2BufferStencil without knowing if the X driver 1363 * supports it. Now, check if X handled the request correctly and clean 1364 * up if it did not. (See comments for 'enum intel_dri2_has_hiz'). 1365 */ 1366 struct intel_renderbuffer *depth_rb = 1367 intel_get_renderbuffer(fb, BUFFER_DEPTH); 1368 assert(intel_rb_format(stencil_rb) == MESA_FORMAT_S8); 1369 assert(depth_rb && intel_rb_format(depth_rb) == MESA_FORMAT_X8_Z24); 1370 1371 if (stencil_rb->mt->region->tiling == I915_TILING_NONE) { 1372 /* 1373 * The stencil buffer is actually W tiled. The region's tiling is 1374 * I915_TILING_NONE, however, because the GTT is incapable of W 1375 * fencing. 1376 */ 1377 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_TRUE; 1378 return; 1379 } else { 1380 /* 1381 * Oops... the screen doesn't support separate stencil. Discard the 1382 * separate depth and stencil buffers and replace them with 1383 * a combined depth/stencil buffer. Discard the hiz buffer too. 1384 */ 1385 intel->intelScreen->dri2_has_hiz = INTEL_DRI2_HAS_HIZ_FALSE; 1386 if (intel->must_use_separate_stencil) { 1387 _mesa_problem(&intel->ctx, 1388 "intel_context requires separate stencil, but the " 1389 "DRIscreen does not support it. You may need to " 1390 "upgrade the Intel X driver to 2.16.0"); 1391 abort(); 1392 } 1393 1394 /* 1. Discard depth and stencil renderbuffers. */ 1395 _mesa_remove_renderbuffer(fb, BUFFER_DEPTH); 1396 depth_rb = NULL; 1397 _mesa_remove_renderbuffer(fb, BUFFER_STENCIL); 1398 stencil_rb = NULL; 1399 1400 /* 2. Create new depth/stencil renderbuffer. */ 1401 struct intel_renderbuffer *depth_stencil_rb = 1402 intel_create_renderbuffer(MESA_FORMAT_S8_Z24); 1403 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depth_stencil_rb->Base.Base); 1404 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depth_stencil_rb->Base.Base); 1405 1406 /* 3. Append DRI2BufferDepthStencil to attachment list. */ 1407 int old_count = *count; 1408 unsigned int *old_attachments = *attachments; 1409 *count = old_count + 1; 1410 *attachments = malloc(2 * (*count) * sizeof(unsigned)); 1411 memcpy(*attachments, old_attachments, 2 * old_count * sizeof(unsigned)); 1412 free(old_attachments); 1413 (*attachments)[2 * old_count + 0] = __DRI_BUFFER_DEPTH_STENCIL; 1414 (*attachments)[2 * old_count + 1] = intel_bits_per_pixel(depth_stencil_rb); 1415 1416 /* 4. Request new set of DRI2 attachments. */ 1417 __DRIscreen *screen = intel->intelScreen->driScrnPriv; 1418 *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, 1419 &drawable->w, 1420 &drawable->h, 1421 *attachments, 1422 *count, 1423 count, 1424 drawable->loaderPrivate); 1425 if (!*buffers) 1426 return; 1427 1428 /* 1429 * I don't know how to recover from the failure assertion below. 1430 * Rather than fail gradually and unexpectedly, we should just die 1431 * now. 1432 */ 1433 assert(*count == old_count + 1); 1434 1435 /* 5. Assign the DRI buffer's DRM region to the its renderbuffers. */ 1436 __DRIbuffer *depth_stencil_buffer = NULL; 1437 for (int i = 0; i < *count; ++i) { 1438 if ((*buffers)[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) { 1439 depth_stencil_buffer = &(*buffers)[i]; 1440 break; 1441 } 1442 } 1443 struct intel_region *region = 1444 intel_region_alloc_for_handle(intel->intelScreen, 1445 depth_stencil_buffer->cpp, 1446 drawable->w, 1447 drawable->h, 1448 depth_stencil_buffer->pitch 1449 / depth_stencil_buffer->cpp, 1450 depth_stencil_buffer->name, 1451 "dri2 depth / stencil buffer"); 1452 if (!region) 1453 return; 1454 1455 struct intel_mipmap_tree *mt = 1456 intel_miptree_create_for_region(intel, 1457 GL_TEXTURE_2D, 1458 intel_rb_format(depth_stencil_rb), 1459 region); 1460 intel_region_release(®ion); 1461 if (!mt) 1462 return; 1463 1464 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_DEPTH)->mt, mt); 1465 intel_miptree_reference(&intel_get_renderbuffer(fb, BUFFER_STENCIL)->mt, mt); 1466 intel_miptree_release(&mt); 1467 } 1468 } 1469 1470 if (intel_framebuffer_has_hiz(fb)) { 1471 /* 1472 * In the future, the driver may advertise a GL config with hiz 1473 * compatible depth bits and 0 stencil bits (for example, when the 1474 * driver gains support for float32 depth buffers). When that day comes, 1475 * here we need to verify that the X driver does in fact support hiz and 1476 * clean up if it doesn't. 1477 * 1478 * Presently, however, no verification or clean up is necessary, and 1479 * execution should not reach here. If the framebuffer still has a hiz 1480 * region, then we have already set dri2_has_hiz to true after 1481 * confirming above that the stencil buffer is W tiled. 1482 */ 1483 assert(0); 1484 } 1485} 1486