brw_blorp.h revision 127dc6d136db64fcf9448d66cb4c86db3bb11226 
1/*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#pragma once
25
26#include <stdint.h>
27
28#include "brw_context.h"
29#include "intel_mipmap_tree.h"
30
31struct brw_context;
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
37void
38brw_blorp_blit_miptrees(struct intel_context *intel,
39                        struct intel_mipmap_tree *src_mt,
40                        struct intel_mipmap_tree *dst_mt,
41                        int src_x0, int src_y0,
42                        int dst_x0, int dst_y0,
43                        int dst_x1, int dst_y1,
44                        bool mirror_x, bool mirror_y);
45
46#ifdef __cplusplus
47} /* end extern "C" */
48
49/**
50 * Binding table indices used by BLORP.
51 */
52enum {
53   BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
54   BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
55   BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
56};
57
58
59class brw_blorp_mip_info
60{
61public:
62   brw_blorp_mip_info();
63
64   void set(struct intel_mipmap_tree *mt,
65            unsigned int level, unsigned int layer);
66
67   struct intel_mipmap_tree *mt;
68
69   /**
70    * Width of the miplevel to be used.  For surfaces using
71    * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
72    */
73   uint32_t width;
74
75   /**
76    * Height of the miplevel to be used.  For surfaces using
77    * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
78    */
79   uint32_t height;
80
81   /**
82    * X offset within the surface to texture from (or render to).  For
83    * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
84    * pixels.
85    */
86   uint32_t x_offset;
87
88   /**
89    * Y offset within the surface to texture from (or render to).  For
90    * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
91    * pixels.
92    */
93   uint32_t y_offset;
94};
95
96class brw_blorp_surface_info : public brw_blorp_mip_info
97{
98public:
99   brw_blorp_surface_info();
100
101void set(struct brw_context *brw,
102         struct intel_mipmap_tree *mt,
103            unsigned int level, unsigned int layer);
104
105   /* Setting this flag indicates that the buffer's contents are W-tiled
106    * stencil data, but the surface state should be set up for Y tiled
107    * MESA_FORMAT_R8 data (this is necessary because surface states don't
108    * support W tiling).
109    *
110    * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
111    * MESA_FORMAT_R8 data are 128 pixels wide by 32 pixels high, the width and
112    * pitch stored in the surface state will be multiplied by 2, and the
113    * height will be halved.  Also, since W and Y tiles store their data in a
114    * different order, the width and height will be rounded up to a multiple
115    * of the tile size, to ensure that the WM program can access the full
116    * width and height of the buffer.
117    */
118   bool map_stencil_as_y_tiled;
119
120   unsigned num_samples;
121
122   /* Setting this flag indicates that the surface should be set up in
123    * ARYSPC_LOD0 mode.  Ignored prior to Gen7.
124    */
125   bool array_spacing_lod0;
126
127   /**
128    * Format that should be used when setting up the surface state for this
129    * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
130    */
131   uint32_t brw_surfaceformat;
132
133   /**
134    * For MSAA surfaces, MSAA layout that should be used when setting up the
135    * surface state for this surface.
136    */
137   intel_msaa_layout msaa_layout;
138};
139
140
141struct brw_blorp_coord_transform_params
142{
143   void setup(GLuint src0, GLuint dst0, GLuint dst1,
144              bool mirror);
145
146   int16_t multiplier;
147   int16_t offset;
148};
149
150
151struct brw_blorp_wm_push_constants
152{
153   uint16_t dst_x0;
154   uint16_t dst_x1;
155   uint16_t dst_y0;
156   uint16_t dst_y1;
157   brw_blorp_coord_transform_params x_transform;
158   brw_blorp_coord_transform_params y_transform;
159
160   /* Pad out to an integral number of registers */
161   uint16_t pad[8];
162};
163
164/* Every 32 bytes of push constant data constitutes one GEN register. */
165const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
166   sizeof(brw_blorp_wm_push_constants) / 32;
167
168struct brw_blorp_prog_data
169{
170   unsigned int first_curbe_grf;
171
172   /**
173    * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
174    * than one sample per pixel.
175    */
176   bool persample_msaa_dispatch;
177};
178
179class brw_blorp_params
180{
181public:
182   brw_blorp_params();
183
184   virtual uint32_t get_wm_prog(struct brw_context *brw,
185                                brw_blorp_prog_data **prog_data) const = 0;
186
187   uint32_t x0;
188   uint32_t y0;
189   uint32_t x1;
190   uint32_t y1;
191   brw_blorp_mip_info depth;
192   uint32_t depth_format;
193   brw_blorp_surface_info src;
194   brw_blorp_surface_info dst;
195   enum gen6_hiz_op hiz_op;
196   unsigned num_samples;
197   bool use_wm_prog;
198   brw_blorp_wm_push_constants wm_push_consts;
199};
200
201
202void
203brw_blorp_exec(struct intel_context *intel, const brw_blorp_params *params);
204
205
206/**
207 * Parameters for a HiZ or depth resolve operation.
208 *
209 * For an overview of HiZ ops, see the following sections of the Sandy Bridge
210 * PRM, Volume 1, Part 2:
211 *   - 7.5.3.1 Depth Buffer Clear
212 *   - 7.5.3.2 Depth Buffer Resolve
213 *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
214 */
215class brw_hiz_op_params : public brw_blorp_params
216{
217public:
218   brw_hiz_op_params(struct intel_mipmap_tree *mt,
219                     unsigned int level, unsigned int layer,
220                     gen6_hiz_op op);
221
222   virtual uint32_t get_wm_prog(struct brw_context *brw,
223                                brw_blorp_prog_data **prog_data) const;
224};
225
226struct brw_blorp_blit_prog_key
227{
228   /* Number of samples per pixel that have been configured in the surface
229    * state for texturing from.
230    */
231   unsigned tex_samples;
232
233   /* MSAA layout that has been configured in the surface state for texturing
234    * from.
235    */
236   intel_msaa_layout tex_layout;
237
238   /* Actual number of samples per pixel in the source image. */
239   unsigned src_samples;
240
241   /* Actual MSAA layout used by the source image. */
242   intel_msaa_layout src_layout;
243
244   /* Number of samples per pixel that have been configured in the render
245    * target.
246    */
247   unsigned rt_samples;
248
249   /* MSAA layout that has been configured in the render target. */
250   intel_msaa_layout rt_layout;
251
252   /* Actual number of samples per pixel in the destination image. */
253   unsigned dst_samples;
254
255   /* Actual MSAA layout used by the destination image. */
256   intel_msaa_layout dst_layout;
257
258   /* Type of the data to be read from the texture (one of
259    * BRW_REGISTER_TYPE_{UD,D,F}).
260    */
261   unsigned texture_data_type;
262
263   /* True if the source image is W tiled.  If true, the surface state for the
264    * source image must be configured as Y tiled, and tex_samples must be 0.
265    */
266   bool src_tiled_w;
267
268   /* True if the destination image is W tiled.  If true, the surface state
269    * for the render target must be configured as Y tiled, and rt_samples must
270    * be 0.
271    */
272   bool dst_tiled_w;
273
274   /* True if all source samples should be blended together to produce each
275    * destination pixel.  If true, src_tiled_w must be false, tex_samples must
276    * equal src_samples, and tex_samples must be nonzero.
277    */
278   bool blend;
279
280   /* True if the rectangle being sent through the rendering pipeline might be
281    * larger than the destination rectangle, so the WM program should kill any
282    * pixels that are outside the destination rectangle.
283    */
284   bool use_kill;
285
286   /**
287    * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
288    * than one sample per pixel.
289    */
290   bool persample_msaa_dispatch;
291};
292
293class brw_blorp_blit_params : public brw_blorp_params
294{
295public:
296   brw_blorp_blit_params(struct brw_context *brw,
297                         struct intel_mipmap_tree *src_mt,
298                         struct intel_mipmap_tree *dst_mt,
299                         GLuint src_x0, GLuint src_y0,
300                         GLuint dst_x0, GLuint dst_y0,
301                         GLuint width, GLuint height,
302                         bool mirror_x, bool mirror_y);
303
304   virtual uint32_t get_wm_prog(struct brw_context *brw,
305                                brw_blorp_prog_data **prog_data) const;
306
307private:
308   brw_blorp_blit_prog_key wm_prog_key;
309};
310
311/**
312 * \name BLORP internals
313 * \{
314 *
315 * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
316 */
317
318void
319gen6_blorp_init(struct brw_context *brw);
320
321void
322gen6_blorp_compute_tile_masks(const brw_blorp_params *params,
323                              uint32_t *tile_mask_x, uint32_t *tile_mask_y);
324
325void
326gen6_blorp_emit_batch_head(struct brw_context *brw,
327                           const brw_blorp_params *params);
328
329void
330gen6_blorp_emit_state_base_address(struct brw_context *brw,
331                                   const brw_blorp_params *params);
332
333void
334gen6_blorp_emit_vertices(struct brw_context *brw,
335                         const brw_blorp_params *params);
336
337uint32_t
338gen6_blorp_emit_blend_state(struct brw_context *brw,
339                            const brw_blorp_params *params);
340
341uint32_t
342gen6_blorp_emit_cc_state(struct brw_context *brw,
343                         const brw_blorp_params *params);
344
345uint32_t
346gen6_blorp_emit_wm_constants(struct brw_context *brw,
347                             const brw_blorp_params *params);
348
349void
350gen6_blorp_emit_vs_disable(struct brw_context *brw,
351                           const brw_blorp_params *params);
352
353uint32_t
354gen6_blorp_emit_binding_table(struct brw_context *brw,
355                              const brw_blorp_params *params,
356                              uint32_t wm_surf_offset_renderbuffer,
357                              uint32_t wm_surf_offset_texture);
358
359uint32_t
360gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
361                                    const brw_blorp_params *params);
362
363void
364gen6_blorp_emit_gs_disable(struct brw_context *brw,
365                           const brw_blorp_params *params);
366
367void
368gen6_blorp_emit_clip_disable(struct brw_context *brw,
369                             const brw_blorp_params *params);
370
371void
372gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
373                                  const brw_blorp_params *params);
374/** \} */
375
376#endif /* __cplusplus */
377