brw_clear.c revision b4da272a6ea58a7c81c71477d65d82651555709a 
1/**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * Copyright 2009, 2012 Intel Corporation.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29#include "main/glheader.h"
30#include "main/mtypes.h"
31#include "main/condrender.h"
32#include "swrast/swrast.h"
33#include "drivers/common/meta.h"
34
35#include "intel_batchbuffer.h"
36#include "intel_context.h"
37#include "intel_blit.h"
38#include "intel_clear.h"
39#include "intel_fbo.h"
40#include "intel_mipmap_tree.h"
41#include "intel_regions.h"
42
43#define FILE_DEBUG_FLAG DEBUG_BLIT
44
45static const char *buffer_names[] = {
46   [BUFFER_FRONT_LEFT] = "front",
47   [BUFFER_BACK_LEFT] = "back",
48   [BUFFER_FRONT_RIGHT] = "front right",
49   [BUFFER_BACK_RIGHT] = "back right",
50   [BUFFER_DEPTH] = "depth",
51   [BUFFER_STENCIL] = "stencil",
52   [BUFFER_ACCUM] = "accum",
53   [BUFFER_AUX0] = "aux0",
54   [BUFFER_COLOR0] = "color0",
55   [BUFFER_COLOR1] = "color1",
56   [BUFFER_COLOR2] = "color2",
57   [BUFFER_COLOR3] = "color3",
58   [BUFFER_COLOR4] = "color4",
59   [BUFFER_COLOR5] = "color5",
60   [BUFFER_COLOR6] = "color6",
61   [BUFFER_COLOR7] = "color7",
62};
63
64static void
65debug_mask(const char *name, GLbitfield mask)
66{
67   GLuint i;
68
69   if (unlikely(INTEL_DEBUG & DEBUG_BLIT)) {
70      DBG("%s clear:", name);
71      for (i = 0; i < BUFFER_COUNT; i++) {
72	 if (mask & (1 << i))
73	    DBG(" %s", buffer_names[i]);
74      }
75      DBG("\n");
76   }
77}
78
79/**
80 * Implements fast depth clears on gen6+.
81 *
82 * Fast clears basically work by setting a flag in each of the subspans
83 * represented in the HiZ buffer that says "When you need the depth values for
84 * this subspan, it's the hardware's current clear value."  Then later rendering
85 * can just use the static clear value instead of referencing memory.
86 *
87 * The tricky part of the implementation is that you have to have the clear
88 * value that was used on the depth buffer in place for all further rendering,
89 * at least until a resolve to the real depth buffer happens.
90 */
91static bool
92brw_fast_clear_depth(struct gl_context *ctx)
93{
94   struct intel_context *intel = intel_context(ctx);
95   struct gl_framebuffer *fb = ctx->DrawBuffer;
96   struct intel_renderbuffer *depth_irb =
97      intel_get_renderbuffer(fb, BUFFER_DEPTH);
98   struct intel_mipmap_tree *mt = depth_irb->mt;
99
100   if (intel->gen < 6)
101      return false;
102
103   if (!mt->hiz_mt)
104      return false;
105
106   /* We only handle full buffer clears -- otherwise you'd have to track whether
107    * a previous clear had happened at a different clear value and resolve it
108    * first.
109    */
110   if (ctx->Scissor.Enabled) {
111      perf_debug("Failed to fast clear depth due to scissor being enabled.  "
112                 "Possible 5%% performance win if avoided.\n");
113      return false;
114   }
115
116   /* The rendered area has to be 8x4 samples, not resolved pixels, so we look
117    * at the miptree slice dimensions instead of renderbuffer size.
118    */
119   if (mt->level[depth_irb->mt_level].width % 8 != 0 ||
120       mt->level[depth_irb->mt_level].height % 4 != 0) {
121      perf_debug("Failed to fast clear depth due to width/height %d,%d not "
122                 "being aligned to 8,4.  Possible 5%% performance win if "
123                 "avoided\n",
124                 mt->level[depth_irb->mt_level].width,
125                 mt->level[depth_irb->mt_level].height);
126      return false;
127   }
128
129   uint32_t depth_clear_value;
130   switch (mt->format) {
131   case MESA_FORMAT_Z32_FLOAT_X24S8:
132   case MESA_FORMAT_S8_Z24:
133      /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
134       *
135       *     "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be
136       *      enabled (the legacy method of clearing must be performed):
137       *
138       *      - If the depth buffer format is D32_FLOAT_S8X24_UINT or
139       *        D24_UNORM_S8_UINT.
140       */
141      return false;
142
143   case MESA_FORMAT_Z32_FLOAT:
144      depth_clear_value = float_as_int(ctx->Depth.Clear);
145      break;
146
147   case MESA_FORMAT_Z16:
148      /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
149       *
150       *     "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be
151       *      enabled (the legacy method of clearing must be performed):
152       *
153       *      - DevSNB{W/A}]: When depth buffer format is D16_UNORM and the
154       *        width of the map (LOD0) is not multiple of 16, fast clear
155       *        optimization must be disabled.
156       */
157      if (intel->gen == 6 && (mt->level[depth_irb->mt_level].width % 16) != 0)
158	 return false;
159      /* FALLTHROUGH */
160
161   default:
162      depth_clear_value = fb->_DepthMax * ctx->Depth.Clear;
163      break;
164   }
165
166   /* If we're clearing to a new clear value, then we need to resolve any clear
167    * flags out of the HiZ buffer into the real depth buffer.
168    */
169   if (mt->depth_clear_value != depth_clear_value) {
170      intel_miptree_all_slices_resolve_depth(intel, mt);
171      mt->depth_clear_value = depth_clear_value;
172   }
173
174   /* From the Sandy Bridge PRM, volume 2 part 1, page 313:
175    *
176    *     "If other rendering operations have preceded this clear, a
177    *      PIPE_CONTROL with write cache flush enabled and Z-inhibit disabled
178    *      must be issued before the rectangle primitive used for the depth
179    *      buffer clear operation.
180    */
181   intel_batchbuffer_emit_mi_flush(intel);
182
183   intel_hiz_exec(intel, mt, depth_irb->mt_level, depth_irb->mt_layer,
184		  GEN6_HIZ_OP_DEPTH_CLEAR);
185
186   if (intel->gen == 6) {
187      /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
188       *
189       *     "DevSNB, DevSNB-B{W/A}]: Depth buffer clear pass must be followed
190       *      by a PIPE_CONTROL command with DEPTH_STALL bit set and Then
191       *      followed by Depth FLUSH'
192      */
193      intel_batchbuffer_emit_mi_flush(intel);
194   }
195
196   /* Now, the entire HiZ buffer contains data that needs to be resolved to the
197    * entire depth buffer (so any previous resolve records should get tossed
198    * out).
199    */
200   intel_resolve_map_clear(&mt->hiz_map);
201   intel_renderbuffer_set_needs_depth_resolve(depth_irb);
202
203   return true;
204}
205
206/**
207 * Called by ctx->Driver.Clear.
208 */
209static void
210brw_clear(struct gl_context *ctx, GLbitfield mask)
211{
212   struct intel_context *intel = intel_context(ctx);
213
214   if (!_mesa_check_conditional_render(ctx))
215      return;
216
217   if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
218      intel->front_buffer_dirty = true;
219   }
220
221   intel_prepare_render(intel);
222
223   if (mask & BUFFER_BIT_DEPTH) {
224      if (brw_fast_clear_depth(ctx)) {
225	 DBG("fast clear: depth\n");
226	 mask &= ~BUFFER_BIT_DEPTH;
227      }
228   }
229
230   GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR |
231				 BUFFER_BIT_STENCIL |
232				 BUFFER_BIT_DEPTH);
233
234   if (tri_mask) {
235      debug_mask("tri", tri_mask);
236      mask &= ~tri_mask;
237
238      if (ctx->API == API_OPENGLES) {
239         _mesa_meta_Clear(&intel->ctx, tri_mask);
240      } else {
241         _mesa_meta_glsl_Clear(&intel->ctx, tri_mask);
242      }
243   }
244
245   /* Any strange buffers get passed off to swrast */
246   if (mask) {
247      debug_mask("swrast", mask);
248      _swrast_Clear(ctx, mask);
249   }
250}
251
252
253void
254intelInitClearFuncs(struct dd_function_table *functions)
255{
256   functions->Clear = brw_clear;
257}
258