brw_wm.h revision e592f7df0361eb8b5c75944f0151c4e6b3f839dd
144d362409d5469aed47d19e7908d19bd194493aThomas Graf/* 244d362409d5469aed47d19e7908d19bd194493aThomas Graf Copyright (C) Intel Corp. 2006. All Rights Reserved. 344d362409d5469aed47d19e7908d19bd194493aThomas Graf Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to 444d362409d5469aed47d19e7908d19bd194493aThomas Graf develop this 3D driver. 544d362409d5469aed47d19e7908d19bd194493aThomas Graf 644d362409d5469aed47d19e7908d19bd194493aThomas Graf Permission is hereby granted, free of charge, to any person obtaining 744d362409d5469aed47d19e7908d19bd194493aThomas Graf a copy of this software and associated documentation files (the 844d362409d5469aed47d19e7908d19bd194493aThomas Graf "Software"), to deal in the Software without restriction, including 944d362409d5469aed47d19e7908d19bd194493aThomas Graf without limitation the rights to use, copy, modify, merge, publish, 1044d362409d5469aed47d19e7908d19bd194493aThomas Graf distribute, sublicense, and/or sell copies of the Software, and to 1144d362409d5469aed47d19e7908d19bd194493aThomas Graf permit persons to whom the Software is furnished to do so, subject to 1244d362409d5469aed47d19e7908d19bd194493aThomas Graf the following conditions: 1344d362409d5469aed47d19e7908d19bd194493aThomas Graf 1444d362409d5469aed47d19e7908d19bd194493aThomas Graf The above copyright notice and this permission notice (including the 1544d362409d5469aed47d19e7908d19bd194493aThomas Graf next paragraph) shall be included in all copies or substantial 1644d362409d5469aed47d19e7908d19bd194493aThomas Graf portions of the Software. 1744d362409d5469aed47d19e7908d19bd194493aThomas Graf 1844d362409d5469aed47d19e7908d19bd194493aThomas Graf THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 1944d362409d5469aed47d19e7908d19bd194493aThomas Graf EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 2044d362409d5469aed47d19e7908d19bd194493aThomas Graf MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 2144d362409d5469aed47d19e7908d19bd194493aThomas Graf IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 2244d362409d5469aed47d19e7908d19bd194493aThomas Graf LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 2344d362409d5469aed47d19e7908d19bd194493aThomas Graf OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 2444d362409d5469aed47d19e7908d19bd194493aThomas Graf WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 2544d362409d5469aed47d19e7908d19bd194493aThomas Graf 2644d362409d5469aed47d19e7908d19bd194493aThomas Graf **********************************************************************/ 2744d362409d5469aed47d19e7908d19bd194493aThomas Graf /* 2844d362409d5469aed47d19e7908d19bd194493aThomas Graf * Authors: 2944d362409d5469aed47d19e7908d19bd194493aThomas Graf * Keith Whitwell <keith@tungstengraphics.com> 3044d362409d5469aed47d19e7908d19bd194493aThomas Graf */ 3144d362409d5469aed47d19e7908d19bd194493aThomas Graf 3244d362409d5469aed47d19e7908d19bd194493aThomas Graf 3344d362409d5469aed47d19e7908d19bd194493aThomas Graf#ifndef BRW_WM_H 3444d362409d5469aed47d19e7908d19bd194493aThomas Graf#define BRW_WM_H 3544d362409d5469aed47d19e7908d19bd194493aThomas Graf 3644d362409d5469aed47d19e7908d19bd194493aThomas Graf#include <stdbool.h> 3744d362409d5469aed47d19e7908d19bd194493aThomas Graf 3844d362409d5469aed47d19e7908d19bd194493aThomas Graf#include "program/prog_instruction.h" 3944d362409d5469aed47d19e7908d19bd194493aThomas Graf#include "brw_context.h" 4044d362409d5469aed47d19e7908d19bd194493aThomas Graf#include "brw_eu.h" 4144d362409d5469aed47d19e7908d19bd194493aThomas Graf#include "brw_program.h" 4244d362409d5469aed47d19e7908d19bd194493aThomas Graf 4344d362409d5469aed47d19e7908d19bd194493aThomas Graf#define SATURATE (1<<5) 4444d362409d5469aed47d19e7908d19bd194493aThomas Graf 4544d362409d5469aed47d19e7908d19bd194493aThomas Graf/* A big lookup table is used to figure out which and how many 4644d362409d5469aed47d19e7908d19bd194493aThomas Graf * additional regs will inserted before the main payload in the WM 4744d362409d5469aed47d19e7908d19bd194493aThomas Graf * program execution. These mainly relate to depth and stencil 4844d362409d5469aed47d19e7908d19bd194493aThomas Graf * processing and the early-depth-test optimization. 4944d362409d5469aed47d19e7908d19bd194493aThomas Graf */ 5044d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_PS_KILL_ALPHATEST_BIT 0x1 5144d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_PS_COMPUTES_DEPTH_BIT 0x2 5244d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_DEPTH_WRITE_ENABLE_BIT 0x4 5344d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_DEPTH_TEST_ENABLE_BIT 0x8 5444d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_STENCIL_WRITE_ENABLE_BIT 0x10 5544d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_STENCIL_TEST_ENABLE_BIT 0x20 5644d362409d5469aed47d19e7908d19bd194493aThomas Graf#define IZ_BIT_MAX 0x40 5744d362409d5469aed47d19e7908d19bd194493aThomas Graf 5844d362409d5469aed47d19e7908d19bd194493aThomas Graf#define AA_NEVER 0 5944d362409d5469aed47d19e7908d19bd194493aThomas Graf#define AA_SOMETIMES 1 6044d362409d5469aed47d19e7908d19bd194493aThomas Graf#define AA_ALWAYS 2 6144d362409d5469aed47d19e7908d19bd194493aThomas Graf 6244d362409d5469aed47d19e7908d19bd194493aThomas Grafstruct brw_wm_prog_key { 6344d362409d5469aed47d19e7908d19bd194493aThomas Graf uint8_t iz_lookup; 6444d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint stats_wm:1; 6544d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint flat_shade:1; 6644d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint nr_color_regions:5; 6744d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint sample_alpha_to_coverage:1; /* _NEW_MULTISAMPLE */ 6844d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint render_to_fbo:1; 6944d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint clamp_fragment_color:1; 7044d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint line_aa:2; 7144d362409d5469aed47d19e7908d19bd194493aThomas Graf 7244d362409d5469aed47d19e7908d19bd194493aThomas Graf GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */ 7344d362409d5469aed47d19e7908d19bd194493aThomas Graf 7444d362409d5469aed47d19e7908d19bd194493aThomas Graf GLushort drawable_height; 7544d362409d5469aed47d19e7908d19bd194493aThomas Graf GLbitfield64 vp_outputs_written; 7644d362409d5469aed47d19e7908d19bd194493aThomas Graf GLuint program_string_id:32; 7744d362409d5469aed47d19e7908d19bd194493aThomas Graf 7844d362409d5469aed47d19e7908d19bd194493aThomas Graf struct brw_sampler_prog_key_data tex; 7944d362409d5469aed47d19e7908d19bd194493aThomas Graf}; 8044d362409d5469aed47d19e7908d19bd194493aThomas Graf 8144d362409d5469aed47d19e7908d19bd194493aThomas Graf 8244d362409d5469aed47d19e7908d19bd194493aThomas Graf/* A bit of a glossary: 8344d362409d5469aed47d19e7908d19bd194493aThomas Graf * 8444d362409d5469aed47d19e7908d19bd194493aThomas Graf * brw_wm_value: A computed value or program input. Values are 8544d362409d5469aed47d19e7908d19bd194493aThomas Graf * constant, they are created once and are never modified. When a 8644d362409d5469aed47d19e7908d19bd194493aThomas Graf * fragment program register is written or overwritten, new values are 8744d362409d5469aed47d19e7908d19bd194493aThomas Graf * created fresh, preserving the rule that values are constant. 8844d362409d5469aed47d19e7908d19bd194493aThomas Graf * 8944d362409d5469aed47d19e7908d19bd194493aThomas Graf * brw_wm_ref: A reference to a value. Wherever a value used is by an 9044d362409d5469aed47d19e7908d19bd194493aThomas Graf * instruction or as a program output, that is tracked with an 9144d362409d5469aed47d19e7908d19bd194493aThomas Graf * instance of this struct. All references to a value occur after it 9244d362409d5469aed47d19e7908d19bd194493aThomas Graf * is created. After the last reference, a value is dead and can be 9344d362409d5469aed47d19e7908d19bd194493aThomas Graf * discarded. 9444d362409d5469aed47d19e7908d19bd194493aThomas Graf * 9544d362409d5469aed47d19e7908d19bd194493aThomas Graf * brw_wm_grf: Represents a physical hardware register. May be either 9644d362409d5469aed47d19e7908d19bd194493aThomas Graf * empty or hold a value. Register allocation is the process of 9744d362409d5469aed47d19e7908d19bd194493aThomas Graf * assigning values to grf registers. This occurs in pass2 and the 9844d362409d5469aed47d19e7908d19bd194493aThomas Graf * brw_wm_grf struct is not used before that. 9944d362409d5469aed47d19e7908d19bd194493aThomas Graf * 10044d362409d5469aed47d19e7908d19bd194493aThomas Graf * Fragment program registers: These are time-varying constructs that 10144d362409d5469aed47d19e7908d19bd194493aThomas Graf * are hard to reason about and which we translate away in pass0. A 10244d362409d5469aed47d19e7908d19bd194493aThomas Graf * single fragment program register element (eg. temp[0].x) will be 10344d362409d5469aed47d19e7908d19bd194493aThomas Graf * translated to one or more brw_wm_value structs, one for each time 10444d362409d5469aed47d19e7908d19bd194493aThomas Graf * that temp[0].x is written to during the program. 10544d362409d5469aed47d19e7908d19bd194493aThomas Graf */ 106 107 108 109/* Used in pass2 to track register allocation. 110 */ 111struct brw_wm_grf { 112 struct brw_wm_value *value; 113 GLuint nextuse; 114}; 115 116struct brw_wm_value { 117 struct brw_reg hw_reg; /* emitted to this reg, may not always be there */ 118 struct brw_wm_ref *lastuse; 119 struct brw_wm_grf *resident; 120 GLuint contributes_to_output:1; 121 GLuint spill_slot:16; /* if non-zero, spill immediately after calculation */ 122}; 123 124struct brw_wm_ref { 125 struct brw_reg hw_reg; /* nr filled in in pass2, everything else, pass0 */ 126 struct brw_wm_value *value; 127 struct brw_wm_ref *prevuse; 128 GLuint unspill_reg:7; /* unspill to reg */ 129 GLuint emitted:1; 130 GLuint insn:24; 131}; 132 133struct brw_wm_constref { 134 const struct brw_wm_ref *ref; 135 GLfloat constval; 136}; 137 138 139struct brw_wm_instruction { 140 struct brw_wm_value *dst[4]; 141 struct brw_wm_ref *src[3][4]; 142 GLuint opcode:8; 143 GLuint saturate:1; 144 GLuint writemask:4; 145 GLuint tex_unit:4; /* texture unit for TEX, TXD, TXP instructions */ 146 GLuint tex_idx:4; /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */ 147 GLuint tex_shadow:1; /* do shadow comparison? */ 148 GLuint eot:1; /* End of thread indicator for FB_WRITE*/ 149 GLuint target:10; /* target binding table index for FB_WRITE*/ 150}; 151 152 153#define BRW_WM_MAX_INSN (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3) 154#define BRW_WM_MAX_GRF 128 /* hardware limit */ 155#define BRW_WM_MAX_VREG (BRW_WM_MAX_INSN * 4) 156#define BRW_WM_MAX_REF (BRW_WM_MAX_INSN * 12) 157#define BRW_WM_MAX_PARAM 256 158#define BRW_WM_MAX_CONST 256 159#define BRW_WM_MAX_SUBROUTINE 16 160 161/* used in masks next to WRITEMASK_*. */ 162#define SATURATE (1<<5) 163 164 165/* New opcodes to track internal operations required for WM unit. 166 * These are added early so that the registers used can be tracked, 167 * freed and reused like those of other instructions. 168 */ 169#define WM_PIXELXY (MAX_OPCODE) 170#define WM_DELTAXY (MAX_OPCODE + 1) 171#define WM_PIXELW (MAX_OPCODE + 2) 172#define WM_LINTERP (MAX_OPCODE + 3) 173#define WM_PINTERP (MAX_OPCODE + 4) 174#define WM_CINTERP (MAX_OPCODE + 5) 175#define WM_WPOSXY (MAX_OPCODE + 6) 176#define WM_FB_WRITE (MAX_OPCODE + 7) 177#define WM_FRONTFACING (MAX_OPCODE + 8) 178#define MAX_WM_OPCODE (MAX_OPCODE + 9) 179 180#define PROGRAM_PAYLOAD (PROGRAM_FILE_MAX) 181#define NUM_FILES (PROGRAM_PAYLOAD + 1) 182 183#define PAYLOAD_DEPTH (FRAG_ATTRIB_MAX) 184#define PAYLOAD_W (FRAG_ATTRIB_MAX + 1) 185#define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2) 186 187struct brw_wm_compile { 188 struct brw_compile func; 189 struct brw_wm_prog_key key; 190 struct brw_wm_prog_data prog_data; 191 192 struct brw_fragment_program *fp; 193 194 GLfloat (*env_param)[4]; 195 196 enum { 197 START, 198 PASS2_DONE 199 } state; 200 201 uint8_t source_depth_reg; 202 uint8_t source_w_reg; 203 uint8_t aa_dest_stencil_reg; 204 uint8_t dest_depth_reg; 205 uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; 206 uint8_t nr_payload_regs; 207 GLuint computes_depth:1; /* could be derived from program string */ 208 GLuint source_depth_to_render_target:1; 209 GLuint runtime_check_aads_emit:1; 210 211 /* Initial pass - translate fp instructions to fp instructions, 212 * simplifying and adding instructions for interpolation and 213 * framebuffer writes. 214 */ 215 struct prog_instruction *prog_instructions; 216 GLuint nr_fp_insns; 217 GLuint fp_temp; 218 GLuint fp_interp_emitted; 219 220 struct prog_src_register pixel_xy; 221 struct prog_src_register delta_xy; 222 struct prog_src_register pixel_w; 223 224 225 struct brw_wm_value *vreg; 226 GLuint nr_vreg; 227 228 struct brw_wm_value creg[BRW_WM_MAX_PARAM]; 229 GLuint nr_creg; 230 231 struct { 232 struct brw_wm_value depth[4]; /* includes r0/r1 */ 233 struct brw_wm_value input_interp[FRAG_ATTRIB_MAX]; 234 } payload; 235 236 237 const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4]; 238 239 struct brw_wm_ref undef_ref; 240 struct brw_wm_value undef_value; 241 242 struct brw_wm_ref *refs; 243 GLuint nr_refs; 244 245 struct brw_wm_instruction *instruction; 246 GLuint nr_insns; 247 248 struct brw_wm_constref constref[BRW_WM_MAX_CONST]; 249 GLuint nr_constrefs; 250 251 struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2]; 252 253 GLuint grf_limit; 254 GLuint max_wm_grf; 255 GLuint last_scratch; 256 257 GLuint cur_inst; /**< index of current instruction */ 258 259 bool out_of_regs; /**< ran out of GRF registers? */ 260 261 /** Mapping from Mesa registers to hardware registers */ 262 struct { 263 bool inited; 264 struct brw_reg reg; 265 } wm_regs[NUM_FILES][256][4]; 266 267 bool used_grf[BRW_WM_MAX_GRF]; 268 GLuint first_free_grf; 269 struct brw_reg stack; 270 struct brw_reg emit_mask_reg; 271 GLuint tmp_regs[BRW_WM_MAX_GRF]; 272 GLuint tmp_index; 273 GLuint tmp_max; 274 GLuint subroutines[BRW_WM_MAX_SUBROUTINE]; 275 GLuint dispatch_width; 276 277 /** we may need up to 3 constants per instruction (if use_const_buffer) */ 278 struct { 279 GLint index; 280 struct brw_reg reg; 281 } current_const[3]; 282}; 283 284 285/** Bits for prog_instruction::Aux field */ 286#define INST_AUX_EOT 0x1 287#define INST_AUX_TARGET(T) (T << 1) 288#define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1) 289 290 291GLuint brw_wm_nr_args( GLuint opcode ); 292GLuint brw_wm_is_scalar_result( GLuint opcode ); 293 294void brw_wm_pass_fp( struct brw_wm_compile *c ); 295void brw_wm_pass0( struct brw_wm_compile *c ); 296void brw_wm_pass1( struct brw_wm_compile *c ); 297void brw_wm_pass2( struct brw_wm_compile *c ); 298void brw_wm_emit( struct brw_wm_compile *c ); 299bool brw_wm_arg_can_be_immediate(enum prog_opcode, int arg); 300void brw_wm_print_value( struct brw_wm_compile *c, 301 struct brw_wm_value *value ); 302 303void brw_wm_print_ref( struct brw_wm_compile *c, 304 struct brw_wm_ref *ref ); 305 306void brw_wm_print_insn( struct brw_wm_compile *c, 307 struct brw_wm_instruction *inst ); 308 309void brw_wm_print_program( struct brw_wm_compile *c, 310 const char *stage ); 311 312void brw_wm_lookup_iz(struct intel_context *intel, 313 struct brw_wm_compile *c); 314 315bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c, 316 struct gl_shader_program *prog); 317 318/* brw_wm_emit.c */ 319void emit_alu1(struct brw_compile *p, 320 struct brw_instruction *(*func)(struct brw_compile *, 321 struct brw_reg, 322 struct brw_reg), 323 const struct brw_reg *dst, 324 GLuint mask, 325 const struct brw_reg *arg0); 326void emit_alu2(struct brw_compile *p, 327 struct brw_instruction *(*func)(struct brw_compile *, 328 struct brw_reg, 329 struct brw_reg, 330 struct brw_reg), 331 const struct brw_reg *dst, 332 GLuint mask, 333 const struct brw_reg *arg0, 334 const struct brw_reg *arg1); 335void emit_cinterp(struct brw_compile *p, 336 const struct brw_reg *dst, 337 GLuint mask, 338 const struct brw_reg *arg0); 339void emit_cmp(struct brw_compile *p, 340 const struct brw_reg *dst, 341 GLuint mask, 342 const struct brw_reg *arg0, 343 const struct brw_reg *arg1, 344 const struct brw_reg *arg2); 345void emit_ddxy(struct brw_compile *p, 346 const struct brw_reg *dst, 347 GLuint mask, 348 bool is_ddx, 349 const struct brw_reg *arg0, 350 bool negate_value); 351void emit_delta_xy(struct brw_compile *p, 352 const struct brw_reg *dst, 353 GLuint mask, 354 const struct brw_reg *arg0); 355void emit_dp2(struct brw_compile *p, 356 const struct brw_reg *dst, 357 GLuint mask, 358 const struct brw_reg *arg0, 359 const struct brw_reg *arg1); 360void emit_dp3(struct brw_compile *p, 361 const struct brw_reg *dst, 362 GLuint mask, 363 const struct brw_reg *arg0, 364 const struct brw_reg *arg1); 365void emit_dp4(struct brw_compile *p, 366 const struct brw_reg *dst, 367 GLuint mask, 368 const struct brw_reg *arg0, 369 const struct brw_reg *arg1); 370void emit_dph(struct brw_compile *p, 371 const struct brw_reg *dst, 372 GLuint mask, 373 const struct brw_reg *arg0, 374 const struct brw_reg *arg1); 375void emit_fb_write(struct brw_wm_compile *c, 376 struct brw_reg *arg0, 377 struct brw_reg *arg1, 378 struct brw_reg *arg2, 379 GLuint target, 380 GLuint eot); 381void emit_frontfacing(struct brw_compile *p, 382 const struct brw_reg *dst, 383 GLuint mask); 384void emit_linterp(struct brw_compile *p, 385 const struct brw_reg *dst, 386 GLuint mask, 387 const struct brw_reg *arg0, 388 const struct brw_reg *deltas); 389void emit_lrp(struct brw_compile *p, 390 const struct brw_reg *dst, 391 GLuint mask, 392 const struct brw_reg *arg0, 393 const struct brw_reg *arg1, 394 const struct brw_reg *arg2); 395void emit_mad(struct brw_compile *p, 396 const struct brw_reg *dst, 397 GLuint mask, 398 const struct brw_reg *arg0, 399 const struct brw_reg *arg1, 400 const struct brw_reg *arg2); 401void emit_math1(struct brw_wm_compile *c, 402 GLuint function, 403 const struct brw_reg *dst, 404 GLuint mask, 405 const struct brw_reg *arg0); 406void emit_math2(struct brw_wm_compile *c, 407 GLuint function, 408 const struct brw_reg *dst, 409 GLuint mask, 410 const struct brw_reg *arg0, 411 const struct brw_reg *arg1); 412void emit_min(struct brw_compile *p, 413 const struct brw_reg *dst, 414 GLuint mask, 415 const struct brw_reg *arg0, 416 const struct brw_reg *arg1); 417void emit_max(struct brw_compile *p, 418 const struct brw_reg *dst, 419 GLuint mask, 420 const struct brw_reg *arg0, 421 const struct brw_reg *arg1); 422void emit_pinterp(struct brw_compile *p, 423 const struct brw_reg *dst, 424 GLuint mask, 425 const struct brw_reg *arg0, 426 const struct brw_reg *deltas, 427 const struct brw_reg *w); 428void emit_pixel_xy(struct brw_wm_compile *c, 429 const struct brw_reg *dst, 430 GLuint mask); 431void emit_pixel_w(struct brw_wm_compile *c, 432 const struct brw_reg *dst, 433 GLuint mask, 434 const struct brw_reg *arg0, 435 const struct brw_reg *deltas); 436void emit_sop(struct brw_compile *p, 437 const struct brw_reg *dst, 438 GLuint mask, 439 GLuint cond, 440 const struct brw_reg *arg0, 441 const struct brw_reg *arg1); 442void emit_sign(struct brw_compile *p, 443 const struct brw_reg *dst, 444 GLuint mask, 445 const struct brw_reg *arg0); 446void emit_tex(struct brw_wm_compile *c, 447 struct brw_reg *dst, 448 GLuint dst_flags, 449 struct brw_reg *arg, 450 struct brw_reg depth_payload, 451 GLuint tex_idx, 452 GLuint sampler, 453 bool shadow); 454void emit_txb(struct brw_wm_compile *c, 455 struct brw_reg *dst, 456 GLuint dst_flags, 457 struct brw_reg *arg, 458 struct brw_reg depth_payload, 459 GLuint tex_idx, 460 GLuint sampler); 461void emit_wpos_xy(struct brw_wm_compile *c, 462 const struct brw_reg *dst, 463 GLuint mask, 464 const struct brw_reg *arg0); 465void emit_xpd(struct brw_compile *p, 466 const struct brw_reg *dst, 467 GLuint mask, 468 const struct brw_reg *arg0, 469 const struct brw_reg *arg1); 470 471GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog); 472struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type); 473struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name); 474 475bool brw_color_buffer_write_enabled(struct brw_context *brw); 476bool brw_render_target_supported(struct intel_context *intel, 477 struct gl_renderbuffer *rb); 478void brw_wm_payload_setup(struct brw_context *brw, 479 struct brw_wm_compile *c); 480bool do_wm_prog(struct brw_context *brw, 481 struct gl_shader_program *prog, 482 struct brw_fragment_program *fp, 483 struct brw_wm_prog_key *key); 484void brw_wm_debug_recompile(struct brw_context *brw, 485 struct gl_shader_program *prog, 486 const struct brw_wm_prog_key *key); 487 488#endif 489