intel_blit.c revision a0d5c3cfe6582f8294154f6877319193458158a2
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include <stdio.h> 30#include <errno.h> 31 32#include "main/mtypes.h" 33#include "main/context.h" 34#include "main/enums.h" 35 36#include "intel_blit.h" 37#include "intel_buffers.h" 38#include "intel_context.h" 39#include "intel_fbo.h" 40#include "intel_reg.h" 41#include "intel_regions.h" 42#include "intel_batchbuffer.h" 43#include "intel_chipset.h" 44 45#define FILE_DEBUG_FLAG DEBUG_BLIT 46 47/** 48 * Copy the back color buffer to the front color buffer. 49 * Used for SwapBuffers(). 50 */ 51void 52intelCopyBuffer(const __DRIdrawablePrivate * dPriv, 53 const drm_clip_rect_t * rect) 54{ 55 56 struct intel_context *intel; 57 const intelScreenPrivate *intelScreen; 58 59 DBG("%s\n", __FUNCTION__); 60 61 assert(dPriv); 62 63 intel = intelScreenContext(dPriv->driScreenPriv->private); 64 if (!intel) 65 return; 66 67 intelScreen = intel->intelScreen; 68 69 /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets 70 * should work regardless. 71 */ 72 LOCK_HARDWARE(intel); 73 74 if (dPriv && dPriv->numClipRects) { 75 struct intel_framebuffer *intel_fb = dPriv->driverPrivate; 76 struct intel_region *src, *dst; 77 int nbox = dPriv->numClipRects; 78 drm_clip_rect_t *pbox = dPriv->pClipRects; 79 int cpp; 80 int src_pitch, dst_pitch; 81 unsigned short src_x, src_y; 82 int BR13, CMD; 83 int i; 84 dri_bo *aper_array[3]; 85 86 src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); 87 dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); 88 89 src_pitch = src->pitch * src->cpp; 90 dst_pitch = dst->pitch * dst->cpp; 91 92 cpp = src->cpp; 93 94 ASSERT(intel_fb); 95 ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ 96 ASSERT(src); 97 ASSERT(dst); 98 ASSERT(src->cpp == dst->cpp); 99 100 if (cpp == 2) { 101 BR13 = (0xCC << 16) | (1 << 24); 102 CMD = XY_SRC_COPY_BLT_CMD; 103 } 104 else { 105 BR13 = (0xCC << 16) | (1 << 24) | (1 << 25); 106 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 107 } 108 109#ifndef I915 110 if (src->tiling != I915_TILING_NONE) { 111 CMD |= XY_SRC_TILED; 112 src_pitch /= 4; 113 } 114 if (dst->tiling != I915_TILING_NONE) { 115 CMD |= XY_DST_TILED; 116 dst_pitch /= 4; 117 } 118#endif 119 /* do space/cliprects check before going any further */ 120 intel_batchbuffer_require_space(intel->batch, 8 * 4, 121 REFERENCES_CLIPRECTS); 122 again: 123 aper_array[0] = intel->batch->buf; 124 aper_array[1] = dst->buffer; 125 aper_array[2] = src->buffer; 126 127 if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) { 128 intel_batchbuffer_flush(intel->batch); 129 goto again; 130 } 131 132 for (i = 0; i < nbox; i++, pbox++) { 133 drm_clip_rect_t box = *pbox; 134 135 if (rect) { 136 if (!intel_intersect_cliprects(&box, &box, rect)) 137 continue; 138 } 139 140 if (box.x1 >= box.x2 || 141 box.y1 >= box.y2) 142 continue; 143 144 assert(box.x1 < box.x2); 145 assert(box.y1 < box.y2); 146 src_x = box.x1 - dPriv->x + dPriv->backX; 147 src_y = box.y1 - dPriv->y + dPriv->backY; 148 149 BEGIN_BATCH(8, REFERENCES_CLIPRECTS); 150 OUT_BATCH(CMD); 151 OUT_BATCH(BR13 | dst_pitch); 152 OUT_BATCH((box.y1 << 16) | box.x1); 153 OUT_BATCH((box.y2 << 16) | box.x2); 154 155 OUT_RELOC(dst->buffer, 156 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 157 0); 158 OUT_BATCH((src_y << 16) | src_x); 159 OUT_BATCH(src_pitch); 160 OUT_RELOC(src->buffer, 161 I915_GEM_DOMAIN_RENDER, 0, 162 0); 163 ADVANCE_BATCH(); 164 } 165 166 /* Flush the rendering and the batch so that the results all land on the 167 * screen in a timely fashion. 168 */ 169 intel_batchbuffer_emit_mi_flush(intel->batch); 170 intel_batchbuffer_flush(intel->batch); 171 } 172 173 UNLOCK_HARDWARE(intel); 174} 175 176 177 178 179void 180intelEmitFillBlit(struct intel_context *intel, 181 GLuint cpp, 182 GLshort dst_pitch, 183 dri_bo *dst_buffer, 184 GLuint dst_offset, 185 uint32_t dst_tiling, 186 GLshort x, GLshort y, 187 GLshort w, GLshort h, 188 GLuint color) 189{ 190 GLuint BR13, CMD; 191 BATCH_LOCALS; 192 193 dst_pitch *= cpp; 194 195 switch (cpp) { 196 case 1: 197 case 2: 198 case 3: 199 BR13 = (0xF0 << 16) | (1 << 24); 200 CMD = XY_COLOR_BLT_CMD; 201 break; 202 case 4: 203 BR13 = (0xF0 << 16) | (1 << 24) | (1 << 25); 204 CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 205 break; 206 default: 207 return; 208 } 209#ifndef I915 210 if (dst_tiling != I915_TILING_NONE) { 211 CMD |= XY_DST_TILED; 212 dst_pitch /= 4; 213 } 214#endif 215 216 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 217 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); 218 219 assert(w > 0); 220 assert(h > 0); 221 222 BEGIN_BATCH(6, NO_LOOP_CLIPRECTS); 223 OUT_BATCH(CMD); 224 OUT_BATCH(BR13 | dst_pitch); 225 OUT_BATCH((y << 16) | x); 226 OUT_BATCH(((y + h) << 16) | (x + w)); 227 OUT_RELOC(dst_buffer, 228 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 229 dst_offset); 230 OUT_BATCH(color); 231 ADVANCE_BATCH(); 232} 233 234static GLuint translate_raster_op(GLenum logicop) 235{ 236 switch(logicop) { 237 case GL_CLEAR: return 0x00; 238 case GL_AND: return 0x88; 239 case GL_AND_REVERSE: return 0x44; 240 case GL_COPY: return 0xCC; 241 case GL_AND_INVERTED: return 0x22; 242 case GL_NOOP: return 0xAA; 243 case GL_XOR: return 0x66; 244 case GL_OR: return 0xEE; 245 case GL_NOR: return 0x11; 246 case GL_EQUIV: return 0x99; 247 case GL_INVERT: return 0x55; 248 case GL_OR_REVERSE: return 0xDD; 249 case GL_COPY_INVERTED: return 0x33; 250 case GL_OR_INVERTED: return 0xBB; 251 case GL_NAND: return 0x77; 252 case GL_SET: return 0xFF; 253 default: return 0; 254 } 255} 256 257 258/* Copy BitBlt 259 */ 260void 261intelEmitCopyBlit(struct intel_context *intel, 262 GLuint cpp, 263 GLshort src_pitch, 264 dri_bo *src_buffer, 265 GLuint src_offset, 266 uint32_t src_tiling, 267 GLshort dst_pitch, 268 dri_bo *dst_buffer, 269 GLuint dst_offset, 270 uint32_t dst_tiling, 271 GLshort src_x, GLshort src_y, 272 GLshort dst_x, GLshort dst_y, 273 GLshort w, GLshort h, 274 GLenum logic_op) 275{ 276 GLuint CMD, BR13, pass = 0; 277 int dst_y2 = dst_y + h; 278 int dst_x2 = dst_x + w; 279 dri_bo *aper_array[3]; 280 BATCH_LOCALS; 281 282 /* do space/cliprects check before going any further */ 283 do { 284 aper_array[0] = intel->batch->buf; 285 aper_array[1] = dst_buffer; 286 aper_array[2] = src_buffer; 287 288 if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) { 289 intel_batchbuffer_flush(intel->batch); 290 pass++; 291 } else 292 break; 293 } while (pass < 2); 294 295 if (pass >= 2) { 296 GLboolean locked = GL_FALSE; 297 if (!intel->locked) { 298 LOCK_HARDWARE(intel); 299 locked = GL_TRUE; 300 } 301 302 dri_bo_map(dst_buffer, GL_TRUE); 303 dri_bo_map(src_buffer, GL_FALSE); 304 _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset, 305 cpp, 306 dst_pitch, 307 dst_x, dst_y, 308 w, h, 309 (GLubyte *)src_buffer->virtual + src_offset, 310 src_pitch, 311 src_x, src_y); 312 313 dri_bo_unmap(src_buffer); 314 dri_bo_unmap(dst_buffer); 315 316 if (locked) 317 UNLOCK_HARDWARE(intel); 318 319 return; 320 } 321 322 intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS); 323 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 324 __FUNCTION__, 325 src_buffer, src_pitch, src_offset, src_x, src_y, 326 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); 327 328 src_pitch *= cpp; 329 dst_pitch *= cpp; 330 331 BR13 = translate_raster_op(logic_op) << 16; 332 333 switch (cpp) { 334 case 1: 335 case 2: 336 case 3: 337 BR13 |= (1 << 24); 338 CMD = XY_SRC_COPY_BLT_CMD; 339 break; 340 case 4: 341 BR13 |= (1 << 24) | (1 << 25); 342 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 343 break; 344 default: 345 return; 346 } 347 348#ifndef I915 349 if (dst_tiling != I915_TILING_NONE) { 350 CMD |= XY_DST_TILED; 351 dst_pitch /= 4; 352 } 353 if (src_tiling != I915_TILING_NONE) { 354 CMD |= XY_SRC_TILED; 355 src_pitch /= 4; 356 } 357#endif 358 359 if (dst_y2 <= dst_y || dst_x2 <= dst_x) { 360 return; 361 } 362 363 assert(dst_x < dst_x2); 364 assert(dst_y < dst_y2); 365 366 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 367 OUT_BATCH(CMD); 368 OUT_BATCH(BR13 | (uint16_t)dst_pitch); 369 OUT_BATCH((dst_y << 16) | dst_x); 370 OUT_BATCH((dst_y2 << 16) | dst_x2); 371 OUT_RELOC(dst_buffer, 372 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 373 dst_offset); 374 OUT_BATCH((src_y << 16) | src_x); 375 OUT_BATCH((uint16_t)src_pitch); 376 OUT_RELOC(src_buffer, 377 I915_GEM_DOMAIN_RENDER, 0, 378 src_offset); 379 ADVANCE_BATCH(); 380 381 intel_batchbuffer_emit_mi_flush(intel->batch); 382} 383 384 385/** 386 * Use blitting to clear the renderbuffers named by 'flags'. 387 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field 388 * since that might include software renderbuffers or renderbuffers 389 * which we're clearing with triangles. 390 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear 391 */ 392void 393intelClearWithBlit(GLcontext *ctx, GLbitfield mask) 394{ 395 struct intel_context *intel = intel_context(ctx); 396 struct gl_framebuffer *fb = ctx->DrawBuffer; 397 GLuint clear_depth; 398 GLbitfield skipBuffers = 0; 399 unsigned int num_cliprects; 400 struct drm_clip_rect *cliprects; 401 int x_off, y_off; 402 BATCH_LOCALS; 403 404 /* 405 * Compute values for clearing the buffers. 406 */ 407 clear_depth = 0; 408 if (mask & BUFFER_BIT_DEPTH) { 409 clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); 410 } 411 if (mask & BUFFER_BIT_STENCIL) { 412 clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; 413 } 414 415 /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in 416 * the loop below. 417 */ 418 if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) { 419 skipBuffers = BUFFER_BIT_STENCIL; 420 } 421 422 /* XXX Move this flush/lock into the following conditional? */ 423 intelFlush(&intel->ctx); 424 LOCK_HARDWARE(intel); 425 426 intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off); 427 if (num_cliprects) { 428 GLint cx, cy, cw, ch; 429 drm_clip_rect_t clear; 430 int i; 431 432 /* Get clear bounds after locking */ 433 cx = fb->_Xmin; 434 cy = fb->_Ymin; 435 cw = fb->_Xmax - cx; 436 ch = fb->_Ymax - cy; 437 438 if (fb->Name == 0) { 439 /* clearing a window */ 440 441 /* flip top to bottom */ 442 clear.x1 = cx + x_off; 443 clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch; 444 clear.x2 = clear.x1 + cw; 445 clear.y2 = clear.y1 + ch; 446 } 447 else { 448 /* clearing FBO */ 449 assert(num_cliprects == 1); 450 assert(cliprects == &intel->fboRect); 451 clear.x1 = cx; 452 clear.y1 = cy; 453 clear.x2 = clear.x1 + cw; 454 clear.y2 = clear.y1 + ch; 455 /* no change to mask */ 456 } 457 458 for (i = 0; i < num_cliprects; i++) { 459 const drm_clip_rect_t *box = &cliprects[i]; 460 drm_clip_rect_t b; 461 GLuint buf; 462 GLuint clearMask = mask; /* use copy, since we modify it below */ 463 GLboolean all = (cw == fb->Width && ch == fb->Height); 464 465 if (!all) { 466 intel_intersect_cliprects(&b, &clear, box); 467 } 468 else { 469 b = *box; 470 } 471 472 if (b.x1 >= b.x2 || b.y1 >= b.y2) 473 continue; 474 475 if (0) 476 _mesa_printf("clear %d,%d..%d,%d, mask %x\n", 477 b.x1, b.y1, b.x2, b.y2, mask); 478 479 /* Loop over all renderbuffers */ 480 for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) { 481 const GLbitfield bufBit = 1 << buf; 482 if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { 483 /* OK, clear this renderbuffer */ 484 struct intel_region *irb_region = 485 intel_get_rb_region(fb, buf); 486 dri_bo *write_buffer = 487 intel_region_buffer(intel, irb_region, 488 all ? INTEL_WRITE_FULL : 489 INTEL_WRITE_PART); 490 491 GLuint clearVal; 492 GLint pitch, cpp; 493 GLuint BR13, CMD; 494 495 ASSERT(irb_region); 496 497 pitch = irb_region->pitch; 498 cpp = irb_region->cpp; 499 500 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 501 __FUNCTION__, 502 irb_region->buffer, (pitch * cpp), 503 irb_region->draw_offset, 504 b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1); 505 506 BR13 = 0xf0 << 16; 507 CMD = XY_COLOR_BLT_CMD; 508 509 /* Setup the blit command */ 510 if (cpp == 4) { 511 BR13 |= (1 << 24) | (1 << 25); 512 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 513 if (clearMask & BUFFER_BIT_DEPTH) 514 CMD |= XY_BLT_WRITE_RGB; 515 if (clearMask & BUFFER_BIT_STENCIL) 516 CMD |= XY_BLT_WRITE_ALPHA; 517 } 518 else { 519 /* clearing RGBA */ 520 CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 521 } 522 } 523 else { 524 ASSERT(cpp == 2 || cpp == 0); 525 BR13 |= (1 << 24); 526 } 527 528#ifndef I915 529 if (irb_region->tiling != I915_TILING_NONE) { 530 CMD |= XY_DST_TILED; 531 pitch /= 4; 532 } 533#endif 534 BR13 |= (pitch * cpp); 535 536 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 537 clearVal = clear_depth; 538 } 539 else { 540 clearVal = (cpp == 4) 541 ? intel->ClearColor8888 : intel->ClearColor565; 542 } 543 /* 544 _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", 545 buf, irb->Base.Name); 546 */ 547 intel_wait_flips(intel); 548 549 assert(b.x1 < b.x2); 550 assert(b.y1 < b.y2); 551 552 BEGIN_BATCH(6, REFERENCES_CLIPRECTS); 553 OUT_BATCH(CMD); 554 OUT_BATCH(BR13); 555 OUT_BATCH((b.y1 << 16) | b.x1); 556 OUT_BATCH((b.y2 << 16) | b.x2); 557 OUT_RELOC(write_buffer, 558 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 559 irb_region->draw_offset); 560 OUT_BATCH(clearVal); 561 ADVANCE_BATCH(); 562 clearMask &= ~bufBit; /* turn off bit, for faster loop exit */ 563 } 564 } 565 } 566 intel_batchbuffer_emit_mi_flush(intel->batch); 567 } 568 569 UNLOCK_HARDWARE(intel); 570} 571 572void 573intelEmitImmediateColorExpandBlit(struct intel_context *intel, 574 GLuint cpp, 575 GLubyte *src_bits, GLuint src_size, 576 GLuint fg_color, 577 GLshort dst_pitch, 578 dri_bo *dst_buffer, 579 GLuint dst_offset, 580 uint32_t dst_tiling, 581 GLshort x, GLshort y, 582 GLshort w, GLshort h, 583 GLenum logic_op) 584{ 585 int dwords = ALIGN(src_size, 8) / 4; 586 uint32_t opcode, br13, blit_cmd; 587 588 assert( logic_op - GL_CLEAR >= 0 ); 589 assert( logic_op - GL_CLEAR < 0x10 ); 590 591 if (w < 0 || h < 0) 592 return; 593 594 dst_pitch *= cpp; 595 596 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", 597 __FUNCTION__, 598 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); 599 600 intel_batchbuffer_require_space( intel->batch, 601 (8 * 4) + 602 (3 * 4) + 603 dwords * 4, 604 REFERENCES_CLIPRECTS ); 605 606 opcode = XY_SETUP_BLT_CMD; 607 if (cpp == 4) 608 opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 609#ifndef I915 610 if (dst_tiling != I915_TILING_NONE) { 611 opcode |= XY_DST_TILED; 612 dst_pitch /= 4; 613 } 614#endif 615 616 br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); 617 if (cpp == 2) 618 br13 |= BR13_565; 619 else 620 br13 |= BR13_8888; 621 622 blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */ 623 if (dst_tiling != I915_TILING_NONE) 624 blit_cmd |= XY_DST_TILED; 625 626 BEGIN_BATCH(8 + 3, REFERENCES_CLIPRECTS); 627 OUT_BATCH(opcode); 628 OUT_BATCH(br13); 629 OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */ 630 OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */ 631 OUT_RELOC(dst_buffer, 632 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 633 dst_offset); 634 OUT_BATCH(0); /* bg */ 635 OUT_BATCH(fg_color); /* fg */ 636 OUT_BATCH(0); /* pattern base addr */ 637 638 OUT_BATCH(blit_cmd | ((3 - 2) + dwords)); 639 OUT_BATCH((y << 16) | x); 640 OUT_BATCH(((y + h) << 16) | (x + w)); 641 ADVANCE_BATCH(); 642 643 intel_batchbuffer_data( intel->batch, 644 src_bits, 645 dwords * 4, 646 REFERENCES_CLIPRECTS ); 647 648 intel_batchbuffer_emit_mi_flush(intel->batch); 649} 650